Design of an Amplifier for Sensor Interfaces

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1 Design of an Amplifier for Sensor Interfaces Anurag Mangla Electrical and Electronics Engineering Supervised by Dr. Marc Pastre Prof. Maher Kayal

2 Outline Introduction Need for high gain Gain enhancement methods Cross-coupled current mirror Regulated current source Design methodology for high-gain op-amp Simulation Results Summary Master Project 2

3 Sensors Healthcare Monitoring Master Project 3

4 Sensors Structural Monitoring Master Project 4

5 Sensors Weather & Agricultural Monitoring Master Project 5

6 even in the iphone Accelerometer Capacitive touch sensor CCD sensors Master Project 6

7 The Role of Amplifiers Circuitry for Signal Conditioning/ Processing/Transmission Signal amplification required Sensor Produces low-level signal Master Project 7

8 Target Design Specifications Gain: >120 db Noise: < 10nV/sqrt(Hz) GBW:Configurable high speed low speed Power Consumption: Low but variable Master Project 8

9 The Need for High Gain for af >> 1 -> desensitization Master Project 9

10 Classical Miller Amplifier => Master Project 10

11 Classical Miller Amplifier Gain Required > 120 db => Master Project 11

12 Gain Enhancement: Options Modify first stage Cascode load Folded-cascode Cross-coupled current mirror Regulated current source Master Project 12

13 Gain Enhancement: Options Modify first stage Cascode: Reduced voltage headroom Folded-cascode Cross-coupled current mirror Regulated current source Master Project 13

14 Gain Enhancement: Options Modify first stage Cascode: Reduced voltage headroom Folded-cascode: Higher power consumption Cross-coupled current mirror Regulated current source Master Project 14

15 Gain Enhancement: Options Modify first stage Cascode: Reduced voltage headroom Folded-cascode: Higher power consumption Cross-coupled current mirror Regulated current source Master Project 15

16 Gain Enhancement: Cross Coupled Load Master Project 16

17 Cross Coupled Current Mirror Load Loop Gain Effective Transconductance Master Project 17

18 Cross Coupled Load: Stability Issues If η-> 1, amplifier can become unstable If η-> 0, no gain improvement Critical value of ηneeds to be chosen Master Project 18

19 Cross Coupled Load: Stability Issues 1/ 3σ: max. possible gain enhancement Susceptible to instability due to mismatch Very carefully matched design required Master Project 19

20 Gain Enhancement: Options Modify first stage Cascode: Reduced voltage headroom Folded-cascode: Higher power consumption Cross-coupled current mirror: Susceptible to instability Regulated current source Master Project 20

21 Gain Enhancement: Options Modify first stage Cascode: Reduced voltage headroom Folded-cascode: Higher power consumption Cross-coupled current mirror: Susceptible to instability Regulated current source Master Project 21

22 Gain Enhancement: Regulated Current Source Master Project 22

23 Gain Enhancement: Regulated Current Source Master Project 23

24 Regulated Current Source V x tracks V y Master Project 24

25 Regulated Current Source Master Project 25

26 Regulated Current Source: Stability issues -ve +ve Master Project 26

27 Instability: A Detour Master Project 27

28 Compensation Master Project 28

29 Compensation f 2>= 3*GBW Master Project 29

30 Compensation f 2>= 3*GBW g mii /g mi >= 3* C II /C c Master Project 30

31 Regulated Current Source: Stability issues Master Project 31

32 Regulated Current Source: Stability issues Master Project 32

33 Regulated Current Source: Stability issues Master Project 33

34 Regulated Current Source: Stability issues Master Project 34

35 Regulated Current Source: Stability issues For stability: Master Project 35

36 Regulated Current Source: Stability issues For stability: Master Project 36

37 Regulated Current Source: Stability issues - Stability condition Master Project 37

38 Regulated Current Source: Gain Master Project 38

39 Gain Enhancement: Options Modify first stage Cascode: Reduced voltage headroom Folded-cascode: Higher power consumption Cross-coupled current mirror: Susceptible to instability Regulated current source: High gain High dynamic Can be systematically stabilized Master Project 39

40 The Op-Amp: Design Methodology Master Project 40

41 The Op-Amp: Design Methodology Constraints Gain Power GBW Load capacitance Variable power/speed Decisions/Discretion Current allocation between stages Gain allocation between stages Tools Design equations g m /I D method Master Project 41

42 The Op-Amp: Layout Area= 0.16 mm 2 Master Project 42

43 Layout Considerations Large device sizes Minimum distance b/w devices Symmetrical layout Same orientation Same environment Multi-finger transistors Common-centroid layout Master Project 43

44 Layout: PIP vs. MOSCAP MOSCAP PIP Master Project 44

45 Simulation Results: Frequency Response Gain (db) [1] This work [2] Ivanov, IEEE Trans. Ckts& Sys [3] Zhang, IEEE APCCAS 2008 [4] Yang, IEEE Conf. onsensors 2006 Master Project 45

46 Simulation Results: Transient Response Unity gain feedback Slew Rate = 4.90 V/us Settling time = 150 ns Master Project 46

47 Simulation Results: Transient Response Feedback gain = 4 Master Project 47

48 Simulation Results: CMRR CMRR (db) [1] Pertijs, ISSCC 2009 [2] Zhang, IEEE APCCAS 2008 [3] This work [4] Ivanov, IEEE Trans. Ckts& Sys Master Project 48

49 Simulation Results: PSRR PSRR+ (db) [1] This work [2] Zhang, IEEE APCCAS 2008[3] Ivanov, IEEE Trans. Ckts& Sys Master Project 49

50 Simulation Results: Noise 30 Noise (nv/sqrt[hz]) [1] Ivanov, IEEE Trans. Ckts& Sys [2] This work [3] Zhang, IEEE APCCAS 2008 [4] Pertijs, ISSCC 2009 Master Project 50

51 Simulation Results: Power Consumption Power (mw) [1] Ivanov, IEEE Trans. Ckts& Sys [2] This work [3] Zhang, IEEE APCCAS 2008 [4] Pertijs, ISSCC 2009 Master Project 51

52 Simulation Results: Low Speed Mode Power Consumption = 69 uw Master Project 52

53 Performance Summary Parameter Supply Voltage (V) Quiescent Current (µa) DC Gain (db) GBW (MHz) (10 pf load) Slew Rate (V/µs) Settling time (ns) Noise at 100 KHz (nv/ Hz) CMRR (db) PRSR+ (db) PSRR-(dB) Phase Margin (deg) Output Swing (V) Offset (mv) (100 run MC simulation) High Speed Low Speed e Master Project 53

54 Achievements Analysis of cross-coupled current mirror load Gain Stability Analysis of regulated current source load Gain Stability Unified design methodology for two-stage opamp with regulated current source Complete op-amp design Master Project 54

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