Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS
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1 TEHNIAL DATA Analog Muliplexer Demuliplexer HighPerformance SiliconGae MOS IW402B N SUFFIX PLASTI The IW402B analog muliplexer/demuliplexer is digially conrolled analog swiches having low ON impedance and very low OFF leakage curren. onrol of analog signals up o peakopeak can be achieved by digial signal ampliudes of 4. o (if =, a EE of up o can be conrolled; for EE level D SUFFIX differences above a of a leas 4. is required). SOI These muliplexer circuis dissipae exremely low quiescen power over he full and EE supplyvolage ranges, independen of he logic sae of he conrol signals. When a logic is ORDERING INFORMATION presen a he ENABLE inpu erminal all channels are off. IW402BN Plasic DIP IW402BD SOI T A = o 2 for all packages The IW402 is a differenial 4channel muliplexer having wo binary conrol inpus. A and B, and an enable inpu. The wo binary inpu signals selec of 4 pairs of channels o urned on and connec he analog inpus o he oupus. Operaing olage Range:.0 o 8 Maximum inpu curren of μa a 8 over full packageemperaure range; 0 na a 8 and 2 Noise margin (over full package emperaure range):.0 supply 2.0 supply 2. supply PIN ASSIGNMENT LOGI DIAGRAM DoublePole, 4Posiion Plus ommon Off FUNTION TABLE PIN = PIN 7 = EE PIN 8 = onrol Inpus ON Enable Selec hannels B A L L L Y0 X0 L L H Y X L H L Y2 X2 L H H Y X H X X None H = high level L = low level X = don care
2 IW402B MAXIMUM RATINGS * Symbol Parameer alue Uni D Supply olage (Referenced o ) 0. o + IN D Inpu olage (Referenced o ) 0. o +0. I IN D Inpu urren, per Pin ± ma P D Power Dissipaion in Sill Air 00* mw P o Power Dissipaion per Oupu Traisor 0 mw Tsg Sorage Temperaure 6 o +0 T L Lead Temperaure, mm from ase for Seconds 260 (Plasic DIP or SO Package) *Maximum Raings are hose values beyond which damage o he device may occur. Funcional operaion should be resriced o he Recommended Operaing ondiio. * for Plasic DIP from o +0, for SO Package from o +6. +Deraing Plasic DIP: 2 mw/ from 0 o 2 SO Package: 7 mw/ from 6 o 2 REOMMENDED OPERATING ONDITIONS Symbol Parameer Min Max Uni D Supply olage (Referenced o ).0 8 IN D Inpu olage (Referenced o ) 0 T A Operaing Temperaure, All Package Types +2 This device conai proecion circuiry o guard agai damage due o high saic volages or elecric fields. However, precauio mus be aken o avoid applicaio of any volage higher han maximum raed volages o his highimpedance circui. For proper operaion, IN and OUT should be corained o he range ( IN or OUT ). Unused digial pi mus be ied o an appropriae logic volage level (e.g., eiher or ). Unused Analog I/O pi may be lef open or erminaed.
3 IW402B D ELETRIAL HARATERISTIS Digial Secion Symbol Parameer Tes ondiio IH IL I IN I Minimum HighLevel Inpu olage, hannelselec or Enable Inpus Maximum Low Level Inpu olage, hannelselec or Enable Inpus Maximum Inpu Leakage urren, hannelselec or Enable Inpus Maximum Quiescen Supply urren (per Package) IS = hru kω I IS <2μA on all OFF hanels R L =kω o IS = hru kω I IS <2μA on all OFF hanels R L =kω o IN = or hannel Selec = or Guaraneed Limi Uni 8 ±0. ±0. ±.0 μa μa D ELETRIAL HARATERISTIS Analog Secion Symbol Parameer Tes ondiio R ON Maximum ON Resisance IS = o ΔR ON I OFF Maximum Difference in ON Resisance Beween Any Two hannels in he Same Package Maximum Off hannel Leakage urren, Any One hannel Maximum Off hannel Leakage urren, ommon hannel Guaraneed Limi * * * Uni 8 ±0 ±0 ±00 na 8 ±0 ±0 ±00 Ω Ω * Typical alue
4 IW402B A ELETRIAL HARATERISTIS ( L =0pF,Inpu r = f =.0 ) Symbol Parameer PHL( PLH) PHL( PLH) PZL( PZH) PZL2( PZH2) PLZ( PHZ) PLZ2( PHZ2) IN I/O Maximum Propagaion Delay, Analog Inpu o Analog Oupu (Figure ) R L =0kΩ, Maximum Propagaion Delay, hannelselec Inpu o Analog Oupu (Figure ) R L =0 kω, Maximum Propagaion Delay, hannelselec Inpu o Analog Oupu (Figure 2) R L = kω Maximum Propagaion Delay, Enable o Analog Oupu (Figure 2) R L = kω Maximum Propagaion Delay, hannelselec Inpu o Analog Oupu (Figure 2) R L = kω Maximum Propagaion Delay, Enable o Analog Oupu (Figure 2) R L =,0 kω Guaraneed Limi EE =В, = EE =В, = EE =В, = EE =В, = Maximum Inpu apaciance, hannelselec or 7. pf Enable Inpus Maximum apaciance EE == IS * pf OS 8* Feedhrough IOS 0.2* Uni
5 IW402B ADDITIONAL APPLIATION HARATERISTIS Symbol Parameer Tes ondiio BBW f f 2 THD AO/I Maximum On hannel Bandwidh or Minimum Frequency Respoe (db) (40db) Feedhrough Frequency (All hannels OFF) (40db) Signal rossalk Frequency Toal Harmonic Disorion Addressor Enable o Signal rossalk IS ** Limis Typical alue Uni 2 R L =kω log( OS / IS )=db OS a ommon OUT/IN 2, MHz OS a Any hannel 2, 60 R L =kω log( OS / IS )=40db OS a ommon OUT/IN 2, 2 MHz OS a Any hannel 2, 8 R L =kω log( OS / IS )=40db Beween Secio : Measured on ommon Measured on Any hanel f IS =khz sine wave, R L =kω*** r, f = Square Wave ** Peakopeak volage symmerical abou ( EE )/2. *** Boh ends of channel. 2, 2,, 2, MHz % 6 m (Peak)
6 IW402B INPUT ANALOG OUT PLH TLH 0% 0% % 90% PHL THL Figure. Swiching Waveforms r ENABLE HANNELSELET IPUT % PLZ ANALOG OUT PHZ 90% 0% % 90% f 0% PZL 90% OL OH % PZH Figure 2. Swiching Waveforms EXPANDED LOGI DIAGRAM Ucc X HANNELS IN/OUT B 9 6 ENABLE Logic Level onversion Binary o of 4 Decoder wih Enable OMMON X OUT/IN OMMON Y OUT/IN EE Y HANNELS IN/OUT
7 IW402B N SUFFIX PLASTI (MS 00BB) A NOTES: G F 0.2 (0.0) M T 9 8 D N B T K SEATING PLANE M L H J Dimeio, mm Symbol MIN MAX A B D F.4.78 G 2.4 H 7.62 J 0 K L M imeio A, B do no include mold flash or prorusio. Maximum mold flash or prorusio 0.2 mm (0.0) per side. N 0.8 D SUFFIX SOI (MS 02A) A 9 Dimeio, mm Symbol. MIN MAX H B P A B G 8 D R x 4 F T SEATING G.27 D K PLANE J F M H (0.0) M T M J 0 8 K NOTES: M Dimeio A and B do no include mold flash or prorusion. P Maximum mold flash or prorusion 0. mm (0.006) per side for A, for B 0.2 mm (0.0) per side. R
Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS
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