Data Sheet. 10Gb/s Hot Pluggable Ethernet XENPAK Transceiver, 850nm, VCSEL, SC Duplex, Optical Receptacle PXEN-3831MF Issue: January 2009

Transcription

1 Features: XAUI Electrical Interface: Gbit/s Hot Z-Pluggable SC-Duplex Optical Receptacle MDIO, DOM Support 850nm VCSEL PIN Photo-detector Operating Case Temperature: 0 to 70 C Compliant to IEEE 802.3ae 10GBASE-LR Application Compliant to XENPAK MSA Mechanical Footprint: 4.76 L x 1.42 W x 0.46 H RoHS Compliant Part Applications: 10 Gigabit Ethernet Description PeakOptical s 10GbE XENPAK transceiver module is a hot pluggable in the Z-direction module that is usable in typical router line card applications, Storage, IP network and LAN and compliant to XENPAK MSA. The PXENPAK-SR is a fully integrated 10.3Gbit/s optical transceiver module that consists of a 10.3Gbit/s optical transmitter and receiver, XAUI interface, Mux and Demux with clock and data recovery(cdr). This transceiver uses an 850nm VCSEL Laser Diode to achieve 300m over standard single mode fiber as 10GBASE-LR of the IEEE 802.3ae. Specification: Optical Characteristics: (Condition: T a =T OP ) Parameters Symbols Min. Typ. Max. Unit Center Wavelength λc nm Signaling speed Gbit/s Signaling speed variation from nominal ppm Optical modulation amplitude (Note 1) OMA dbm Optical Output Power Pf dbm Extinction Ratio Er db Off Transmit Power Poff dbm Optical Output turn-off Time TTX-OFF µs Receiver Sensitivity in OMA OMArmin dbm Receiver Overload Rro dbm Receiver Return Loss RL db Note 1 : The maximum value of RMDIO depends on bus loading(cl), input capacitance(ci), and MDC frequency(1/tck).

2 Electrical Characteristics: Power Supply Characteristics Parameter Symbol Min. Typ. Max. Unit Remarks Supply Voltage VCC V Supply Voltage VCC V Supply Current ICC A +3.3 V Supply Current ICC A APS Power Consumption PDS W Power supply stabilization time TDF ms Initialization Time TINIT s RESET Assert Time TRESET ms Hold Time after rising edge of RESET THOLD ms XAUI Driver Characteristics Parameter Symbol Min. Typ. Max. Unit Remarks Baud Rate Gbit/s Baud Rate Tolerance ppm Differential Amplitude mvpp AC, near-end value 1.2VCMOS Interface Characteristics Parameter Symbol Min. Typ. Max. Unit Remarks Baud Rate Gbit/s Baud Rate Tolerance ppm Differential Amplitude mvpp AC Parameter Symbol Min. Typ. Max. Unit Remarks Input High Voltage VIH V Input Low Voltage VIL V Input Pull-down Current IIn µa Vih=1.2V Output High Voltage VOH V Pull-up=10k ohm Output Low Voltage VOL V to 1.2V Pull up Resistance RLASI k ohm Capacitance CLASI pf Load Capacitance CLoad pf

3 MDIO Bidirectional Interface Characteristics Parameter Symbol Min. Typ. Max. Unit Remarks Input High Voltage VIHM V Input Low Voltage VILM V Output High Voltage VOHM V Output Low Voltage VOLM V Pull up Resistance RMDIO Note 1 Ohm MDC min high/low time THM,TLM ns MDC Frequency 1/TCK TBD MHz Setup time TDIS ns Hold time TDIH ns MDIO output delay after rising edge of MDC TPD ns Input Capacitance Ci pf Bus Loading CL pf Absolute Maximum Ratings: Parameter Symbol Min. Max. Unit Supply Voltage VCC V Supply Voltage VCC V Supply Voltage VCC V Optical Receiver Input PIMAX dbm Case Temperature Tc C Storage Temperature TSTR C Recommended Operating Environment: Parameter Symbol Min. Typical Max. Unit Supply Voltage VCC V Supply Voltage VCC V Supply Voltage VCC V Case Temperature (Figure 1) TC C

4 Pin Assignment: 70 GND 1 GND 69 GND 2 GND 68 RESERVED 3 GND 67 RESERVED 4 RESERVED 66 GND 5 3.3V 65 TX LANE V 64 TX LANE3+ 7 APS 63 GND 8 APS 62 TX LANE2 9 LASI 61 TX LANE2+ 10 RESET 60 GND 11 VEND SPECIFIC 59 TX LANE1 12 TX ON/OFF 58 TX LANE1+ 13 RESERVED 57 GND 14 MOD DETECT 56 TX LANE0 15 VEND SPECIFIC 55 TX LANE0+ 16 VEND SPECIFIC 54 GND 17 MDIO 53 GND 18 MDC 52 GND 19 PRTAD4 51 RX LANE3 20 PRTAD3 50 RX LANE3+ 21 PRTAD2 49 GND 22 PRTAD1 48 RX LANE2 23 PRTAD0 47 RX LANE2+ 24 VEND SPECIFIC 46 GND 25 APS SET 45 RX LANE1 26 RESERVED 44 RX LANE1+ 27 APS SENSE 43 GND 28 APS 42 RX LANE0 29 APS 41 RX LANE V 40 GND V 39 RESERVED 32 RESERVED 38 RESERVED 33 GND 37 GND 34 GND 36 GND 35 GND XENPAK Pin Configuration

5 Pin Description: Pin # Symbol I/O Logic Description Notes 1 GND I Supply Electrical ground 2 GND I Supply Electrical ground 3 GND I Supply Electrical ground 4 RESERVED - - Reserved V I Supply Power V I Supply Power 7 APS I Supply Adaptive Power Supply 8 APS I Supply Adaptive Power Supply 9 LASI O Open Drain Link Alarm Status Interrupt k ohm pull up on host. 10 RESET I 1.2V CMOS TX OFF when MDIO RESET 11 VEND SPECIFIC - - Vendor Specific Pin. Leave unconnected. 12 TX ON/OFF I 1.2V CMOS Transmitter ON/OFF 13 RESERVED - - Reserved 14 MOD DETECT O - Pulled low inside module through 1k ohm. 15 VEND SPECIFIC - - Vendor Specific Pin. Leave unconnected. Pin # Symbol I/O Logic Description Notes 16 VEND SPECIFIC - - Vendor Specific Pin. Leave unconnected. 17 MDIO I/O Open Drain Management Data IO 18 MDC I 1.2V CMOS Management Data Clock 19 PRTAD4 I 1.2V CMOS Port Address bit 4 (Low=0) 20 PRTAD3 I 1.2V CMOS Port Address bit 3 (Low=0) 21 PRTAD2 I 1.2V CMOS Port Address bit 2 (Low=0) 22 PRTAD1 I 1.2V CMOS Port Address bit 1 (Low=0) 23 PRTAD0 I 1.2V CMOS Port Address bit 0 (Low=0) 24 VEND SPECIFIC - - Vendor Specific Pin. Leave unconnected. 25 APS SET O - Feedback output for APS 26 RESERVED - - Reserved for Avalanche Photodiode use.

6 27 APS SENSE O Analog APS Sense Connection 28 APS I Supply Adaptive Power Supply 29 APS I Supply Adaptive Power Supply V I Supply Power V I Supply Power 32 RESERVED - - Reserved 33 GND I Supply Electrical Ground 34 GND I Supply Electrical Ground 35 GND I Supply Electrical Ground Pin # Symbol I/O Logic Description Notes 36 GND I Supply Electrical Ground 37 GND I Supply Electrical Ground 38 RESERVED - - Reserved 39 RESERVED - - Reserved 40 GND I Supply Electrical Ground 41 RX LANE 0+ O AC Module XAUI Output Lane RX LANE 0- O AC Module XAUI Output Lane 0-43 GND I Supply Electrical Ground 44 RX LANE 1+ O AC Module XAUI Output Lane RX LANE 1- O AC Module XAUI Output Lane 1-46 GND I Supply Electrical Ground 47 RX LANE 2+ O AC Module XAUI Output Lane RX LANE 2- O AC Module XAUI Output Lane 2-49 GND I Supply Electrical Ground 50 RX LANE 3+ O AC Module XAUI Output Lane RX LANE 3- O AC Module XAUI Output Lane 3-52 GND I Supply Electrical Ground 53 GND I Supply Electrical Ground 54 GND I Supply Electrical Ground 55 TX LANE 0+ I AC Module XAUI Input Lane TX LANE 0- I AC Module XAUI Input Lane 0-57 GND I Supply Electrical Ground 58 TX LANE 1+ I AC Module XAUI Input Lane TX LANE 1- I AC Module XAUI Input Lane 1-60 GND I Supply Electrical Ground 61 TX LANE 2+ I AC Module XAUI Input Lane 2+

7 62 TX LANE 2- I AC Module XAUI Input Lane 2-63 GND I Supply Electrical Ground 64 TX LANE 3+ I AC Module XAUI Input Lane TX LANE 3- I AC Module XAUI Input Lane 3-66 GND I Supply Electrical Ground 67 RESERVED - - Reserved 68 RESERVED - - Reserved 69 GND I Supply Electrical Ground 70 GND I Supply Electrical Ground Note: Case is connected to electrical ground in the module. Mechanical Dimensions: Figure 2 Mechanical dimensions Refer to Table 10 for Dimensions

8 DETAIL 1 Figure 3 Mechanical dimensions of End View of Transceiver DETAIL 2 Figure4 Mechanical dimensions of Side Elevation Transceiver

9 Figure 5 Orientation Keying of TX and RX Orientation Vs PCB Package Dimensions KEY VALUE, mm / inch TOLERANCE mm COMMENTS A ±0.20 Width of Bezel overall B ±0.20 Height of Bezel overall C BASIC Distance between captive screws in X axis (Horizontal) D BASIC Datum E to lower captive screw E Maximum Extension of captive screw F ±0.20 Width of Transceiver body G ±0.20 Height of Transceiver body H ±0.20 Datum E to top of Over-hanging Ledge J ±0.25 Datum E to centerline of Transceiver PCB K1 (121.0) REF Length of Transceiver overall minus protruding captive screw heads L ±0.20 Length of captive screw from Datum D to end of threaded end M ±0.20 Thickness of Over-hanging Ledge N ±0.20 Datum D to front of Transceiver Bezel P Minimum Slot or channel formed by Interposer to accommodate Customers PCB range. Use of an Interposer spring is not a requirement of this specification. Q Protrusion of side flange on Transceiver ±0.20 Bezel R ±0.20 Height of side flange on Transceiver Bezel S ±0.20 Width of Transceiver slot to accommodate rail or Customers PCB T BASIC Datum E to bottom of Transceiver U1 (11.98) REF Datum E to top of Transceiver V ±0.20 Datum E to bottom of Transceiver Bezel W Datum B to end of protruding Transceiver ±0.20 PCB

10 Y ±0.20 Datum D to Datum B Z ±0.20 Datum B to end of side protective shroud to mate with EMI/Conn. Shield AA ±0.50 Datum B to end of 45 chamfer BB1 (115.2) REF Length of Module from Datum D to rear Over-hanging Ledge CC ±0.50 Datum B to end of Over-hanging Ledge for EMI Plating DD BASIC Distance between captive screws in Y axis EE Minimum FF ±0.50 GG Minimum (Vertical) Datum B end of recess for insertion clearance Datum E to top of recess for insertion clearance Length of Transceiver side wall for EMI plating HH BASIC Datum A to Datum E JJ ±0.10 Width of Transceiver PCB KK N/A Hole for 3mm screw Thumbscrew, tapped or clearance LL Maximum Length of Thumbscrew RA Minimum External radius or chamfer of Transceiver RB Maximum Internal radius or chamfer on exterior flange of Transceiver Bezel Definition of Datums DATUM DESCRIPTION TRANSCEIVER/LINECARD A CUSTOMERS PCB TOP SURFACE B PHYSICAL HARD STOP FOR TRANSCEIVER C EDGE OF TRANSCEIVER SLOT D BACK SURFACE OF TRANSCEIVER BEZEL, SAFETY HARD STOP E TRANSCEIVER TOP SURFACE OF SLOT P1 F FRONT SURFACE OF CUSTOMERS FACEPLATE G EDGE OF TRANSCEIVER S PCB H LEADING EDGE OF TRANSCEIVER PCB J EDGE OF CUT-OUT IN CUSTOMER S PCB K PHYSICAL HARD STOP ON CUSTOMER S PCB