ENGN8637, Semster-1, 2018 Project Description Project 1: Bit Interleaved Modulation
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1 ENGN867, Semster-1, 2018 Project Description Project 1: Bit Interleaved Modulation Gerard Borg Research School of Engineering, ANU updated on 18/March/2018 1
2 1 Introduction Bit-interleaved coded modulation (BICM) module is a core module of DVB-T2. In this module, raw data bits are first channel coded into codewords, then interleaved, and finally modulated using rotated and Q-delayed modulation. Modulated signals are sent through imperfect channels. The received signal is demodulated and deinterleaved to obtain the codewords, which are then decoded to obtain the raw data bits. In this project, you will use the C programming language to implement the interleaving and modulation parts of the BICM module. There are three components in this implementation: 1. Transmitter, which consists of: Interleaver: it transforms a bit sequence into a bit matrix; Modulator: it transforms a set of bits into a complex symbol which it then rotates and Q-delays; 2. Channel simulator: it corrupts the complex symbols by changing their phase/amplitude and adding noise;. Receiver, which consists of: Demodulator: it reverses the Q-delay and then demaps the complex symbols back to bits either by using maximum likelihood or soft-demapping; De-interleaver: it transforms the bit matrix back to bit sequence. Therefore, we expect three C programs: one each for the transmitter, receiver and channel. In addition, in a separate exercise we will also require a separate routine for the soft-demapper algorithm. We can call these: 1. transmitter.c 2. receiver.c. channel.c 4. softdemapper.c In Sections 2 to 8, we will further specify the inputs and outputs of each function, respectively. Related references will be provided to help you understand the functionality of each function. You will then develop your own algorithms to implement the functions. Then in Section 9, we will ask you research questions, which you will investigate through literature review and simulations as well. Before we move on to these technical sections, it is beneficial to first define more accurately the problem and to clarify the notations and terminology. More importantly, we will differentiate the parameter configuration each group will apply, so that the final results from each group will be different. 2
3 2 The BICM Subsystem Fig. 1 shows the overall block diagram of the DVB-T2 system with the subset of the Bit Interleaved Coded Modulation blocks that we will develop encircled in red. In this project we do not consider the error correction blocks. Our aim is to transmit, receive and play a BICM encoded mpeg2-ts transport stream over a simulated wireless link. To do this we need the speed of the C programming language. Figure 1: Overall block diagram of DVB-T2 showing the BICM sub-modules to be implemented in the project.
4 System Specification.1 Notations and Terminology The following specifications refer to the system in Fig. 2. The different systems are (a) transmitter and (b) channel. There are three versions of the receiver shown. The version in (c) is an advanced receiver showing the BCH and LDPC decoders. It shows how soft information passes from the LDPC decoder to the soft-demapper. Version (c) is not implemented in the project. In the project we consider versions (d) and (e). In (d) and (e) the soft-demapper is provided with an external input log-likelihood prior to check its effect on BER. For bit detection, the slicer can either be after the deinterleaver in (d) or from a maximum likelihood demapper as shown in (e). Data in parity interleaver bit interleaver column twist bit to cell word de-multiplexer Mapping bits into constellations Modulator c c p c b C X Cell rotation and cyclic Q-delay X d (a) Y=HX d +W Channel simulator H (b) Data out BCH slicer LDPC v de-interleaver bit de-interleaver v b cell to bit word multiplexer V soft demapper Demodulator Q-delay reversion (c) parity interleaver column twist bit to cell word de-multiplexer Mapping bits into constellations L pr Data out slicer v de-interleaver bit de-interleaver v b cell to bit word multiplexer V soft demapper Demodulator Q-delay reversion (d) L pr Data out v de-interleaver bit de-interleaver v b cell to bit word multiplexer V Maximum Likelihood demapper Demodulator Q-delay reversion (e) L pr Figure 2: The DVB-T2 modulator / demodulator subsystem. You should first follow the standard [1] to make sure that you can locate and define the inputs and outputs of the various blocks. 4
5 Notation Description c N ldpc R c L pr c p c b C X X θ X d H W Y V v b v the binary LDPC codeword to be interleaved the length of c the code rate of c the a priori log-likelihood ratio (LLR) information of c the codeword after parity interleaving the codeword after bit interleaving the bit matrix after de-multiplexing a rotated constellation symbol, which is a complex number the set of symbols generated from C the rotation angle (anti-clockwise) the set of Q-delayed symbols from X a fading channel coefficient, which is a complex number an AWGN noise instance, which is a complex number the received symbol of X d after channel the bit matrix after de-mapping the codeword after multiplexing the demapped LDPC codeword.2 Parameter Configuration for Each Engineering Group The following table defines the system parameters you consider according to the group you join. Group ID N ldpc R c Modulation Group ID N ldpc R c Modulation A QAM E QAM B QAM F QAM C QAM G QAM D QAM H QAM I QAM J QAM K QAM Note that LDNC with N ldpc = and are referred to as normal and short LDPC, respectively. Please refer to Table 6 of the standard [1] for a complete table of parameter settings.
6 4 Interleaver The input of the interleaver is an LDPC codeword c that contains N ldpc bits. The first K ldpc = N ldpc R c bits are data bits, and the remaining N ldpc K ldpc bits are parity-check bits. Since LDPC encoding is not involved in this project, c is represented by a random binary sequence of length N ldpc. Then c will be interleaved in three steps: 1. Parity interleaving: the N ldpc K ldpc parity-check bits are interleaved, whilst the K ldpc data bits are unchanged. The output is denoted by c p. Please refer to Section 6.1. of the standard [1] and Section..2 of the thesis [2] for details; 2. Column twist: c p is written column-wise into a matrix, and is then read out row-wise. The outcome is denoted by c b. Please refer to Section 6.1. of the standard [1] and Section..2 of the thesis [2] for details;. Bit to Cell Word De-multiplexing: It reshapes c b into a matrix, the rows of which are then swapped. The outcome is denoted by C. The bits in each column of C will be modulated into one or two constellation symbols. Please refer to Section of the standard [1] and Section..2 of the thesis [2] 1 for details. The net effect of the interleaver is to take c as an input and generate C as an output. However it makes sense to divide this task into three individual C-modules which may be called parityinterleave(), columnt wist() and bittocelldemultiplex() which are located in C-program, transmitter.c. The zip-file at http : //users.cecs.anu.edu.au/ Gerard.Borg/anu/tutorials/tute 4.zip shows how to structure C-code. Modulator The input of the modulator is the bit matrix C. Bits in C are read out column-wise. Every M bits is modulated into a constellation cell X, where M is the constellation order (e.g., M = 4 for 16QAM as 16 = 2 4 ). Each constellation symbol is a complex number which can be represented as a pair of double precision numbers in C-language. The output is a vector X of length N cell = N ldpc /M. The imaginary part of X will be then delayed. Specifically, the modulator has two components: 1. Rotated constellation: it is obtained by rotating the classic constellation anti-clockwise by θ degrees. You will need to calculate the new value of each constellation cell. The mapping outcome is a vector X of complex numbers, each taking a form of X(j) = X I (j)+i X Q (j). Please refer to section 6. of the standard [1] and to section.. of the thesis [2] for the value of θ. 1 There is a typo in Table.6 of the thesis: N substream of 64QAM is 12, not 16. 6
7 2. Q-delay: The Q component of each X(j) in X, i.e., X Q (j), is circularly delayed by one cell to form a new vector X d. For example, X d (j) = X I (j) +i X Q (j 1) for all j > 0. Please refer to section 6. of the standard [1] and section.. of the thesis [2] for details. Ultimately the modulator takes C and θ as inputs (we will use this function to find the optimal value of θ),andoutputsx d. HoweveragainthistaskshouldbedividedintoC-modules,bittoConstellationMapper() and rotateqdelay(). which are also located in C-program, transmitter.c. 6 Channel Simulator The channel will corrupt each cell in X d independently into a cell Y, which is of the form: Y = HX d +W, where W is white Gaussian noise. In this project, you need to simulate two types of channels: 1. AWGN channel: H = 1 2. Uncorrelated single path Rayleigh fading channel (USRC): H is a complex Gaussian distributed channel coefficient. The Y (resp. H) of all cells in X d constitute a vector Y (resp. H). Please refer to Section 2.2 of the thesis [2] for the generation of W and H under a given SNR. You can write a single C function channel.c that takes X d and SNR as inputs, and outputs different Y and H depending on the channel type. Be careful how you take into account the SNR. 7 Demodulator There are three inputs for the demodulator: 1. The received cell vector Y ; 2. The channel coefficient vector H;. The a priori LLR information L pr = [L pr (0),L pr (1), L pr (N ldpc 1)] of all the N ldpc bits. You should interleave L in the same way as c to pair the LLR with the bits carried by each constellation cell. As the counterpart of the modulator, the demodulator also works in two steps: 1. Q-delay reversion: the delayed Q components are shifted back. Note that simply shifting the Q components of Y will NOT yield correct demodulation. Explain the reason and design a solution; 7
8 2. Demapping: there are two options: (a) Maximum likelihood demapping: hard decisions on bit values are made based on the minimum distance principle. The outcome is a binary matrix V that estimates C; (b) Soft demapping: a soft decision on each bit is made based on the received cell as well as the a priori LLR information of other bits in the same cell. The soft decision outcome is called the posterior LLR. Please refer to Section..4 of the thesis [2] for details. After soft decisions have been made for all bits, hard decisions are made based on the sign of the soft decisions. The outcome is a binary matrix V that estimates C. 8 Deinterleaver The deinterleaver is the reversion of the interleaver. You should develop a C function, deinterleaver.c that deinterleaves V to v, to estimate c. This is also located in C-program, receiver.c. 9 Soft versus Maximum-Liklihood Demapping We will implement a complete transceiver loop starting at data bits entering trasnmitter.c,propagating through the simulated channel channel.c and outputted with bit errors from receiver.c. We are not going to implement a complete loop involving LDPC soft-decoder with soft-demapping. For the demapper you will develop two C programs. The first is harddemapper.c that takes Y, H and outputs V using a maximum likelihood decision. The second is softdemapper.c that takes Y, H, and L as inputs, and outputs V, The program harddemapper.c is used by receiver.c. The program receiver.c should be able to detect the data bits transmitter by trasnmitter.c corrupted by the channel. It should produce zero BER for SNR 1. We will ask you to find appropriate values of L in Section 10. Be careful how you treat the Ls. Fig. demonstrates how these fit into the FEC blocks. 10 Research Questions Now you have successfully built a C-implementation of bit interleaved modulation. We will use it to test the system s BER performance versus the SNR, where BER is the ratio between the number of error bits in v and N ldpc. This section contains some research questions that you should solve and discuss in your group project. To solve them, you should conduct both analytical studies and simulations. 8
9 decoded data out to BCH slicer Ldc_post LDPC decoder Ldc_prior de-interleaver cell to bit word multiplexer Ldm_ext V = Ldm_post Constellation demapper R-Qdelay Y H Ldc_ext parity interleaver column twist bit to cell word de-multiplexer L = Ldm_prior Figure : Details of the soft demapper including the FEC blocks The value and impact of L pr When soft demapping is applied, the a priori LLR of the bits we feed to the demodulator are from the LDPC decoder. But since received cells must be demodulated first, we should initially set L pr = 0 for every bit. Our first question is: What is the difference between maximum-likelihood hard demapping and soft demapping with L pr = 0? Do they result in different BER) performance? Now assume we have correct LLR information (thanks to a genie) available. In other words, we let L pr (i) > 0 if bit-i is 0 and let L pr (i) < 0 if bit-i is 1. The question is: What is the impact of the amplitude of L pr on BER? Both analytical explanations and simulation results should be provided to verify your answer to the above questions. Note: you should use the optimal rotation angle θ in this subsection. Please refer to Section 6. of the standard [1] for details The optimal rotation angle θ What is the optimal value of θ? To answer this question, you should first find out at least one research paper on this topic, and then rephrase its approach in your own words. You should then conduct simulations that test the BER performance under different values of θ. It suffices to pick about 10 values between 0 and 2θ optimal inclusive. 9
10 10. The gain over classic methods In this subsection, we visualize the gain of interleaving and rotated + Q-delayed modulation. There are two questions: For classic modulation without rotation and Q-delay, does genie-aided (i.e., correct L pr provided) soft-demapping offer lower BER than maximum-likelihood demodulation? With rotated and Q-delayed modulation applied and genie-aided soft-demapping applied, does bit interleaving reduce BER? If yes, what is the reason? If not, why do we still apply it? 11 Conclusion Following this project description, you will be able to implement a self-contained transceiver that applies bit-interleaved modulation. This transceiver will has lower BER than classic ones. You will be able to verify this improvement both analytically and experimentally. References [1] DVB Document A122, Frame Structure, channel coding and modulation for a second generation digital terrestrial television broadcasting system (DVB-T2), June [2] M. Yu, A study of DVB-T2 standard with physical layer transceiver design and implementation, MPhil Thesis, Australian National University,
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