MIMO Iterative Receiver with Bit Per Bit Interference Cancellation

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1 MIMO Iterative Receiver with Bit Per Bit Interference Cancellation Laurent Boher, Maryline Hélard and Rodrigue Rabineau France Telecom R&D Division, 4 rue du Clos Courtel, 3552 Cesson-Sévigné Cedex, France {laurent.boher;maryline.helard;rodrigue.rabineau}@orange-ft.com Abstract In multi-antenna wireless systems, iterative receivers based on MMSE equalization allow to obtain good performance by efficiently cancelling interference. Complexity and latency are two important criteria in implementation of such iterative systems, even if receivers based on MMSE equalization are recognized to have a reasonable complexity. In classical sequencing of iterative receiver, equalization and are iteratively and independently performed leading to peas of calculation. In this paper, we propose to perform in parallel and by updating interference cancellation after each newly decoded bit. Thus, within the proposed receiver are uniformly distributed on iteration duration. Moreover, new information obtained owing to each decoding bit is used in the same decoding iteration to accelerate the process convergence. By this way, calculation power is evenly distributed on the iteration duration and number of iterations is reduced. I. INTRODUCTION Multiple Input Multiple Output (MIMO) schemes allow an efficient exploitation of spatial diversity and/or an increase of capacity. In the presence of co-antenna interferences lie in non orthogonal spatial systems, iterative receivers have been demonstrated to efficiently deal with interferences due to MIMO systems. Nevertheless, iterative receivers suffer from a high complexity. Iterative MIMO receivers based on MAP detection ] have a complexity exponentially growing with the MIMO architecture size and the modulation order. Receivers based on linear equalization 2] have proved to approach optimal decoding with an acceptable complexity. An other point to focus on for the implementation of such system is the processing time. In classic iterative sequencing, is processed on Space-Time (ST) bloc basis, i.e. when all bits transmitted through the same ST bloc have been decoded, as well as for receiver with MAP detection or linear equalization. stage has to wait for bits spread by the interleaver and can not be performed in parallel to. Thus, process involves peas of calculations at the end of each iteration. These peas result either in an increase of latency or in an increase in parallel. To limit this effect, the proposed receiver improves interference cancelling after each output bit. In that way, computed for are distributed over and new information brought by improved interference cancelling can be used in current iteration. This paper is organized as follows. Section II describes system model and notations. In section III, the iterative MIMO receiver is introduced. We describe the proposed architecture in section IV and analyse its complexity in section V. Finally, simulation results are given in section VI and conclusion is drawn in section VII. A. Transmitter II. SYSTEM MODEL The transmitter scheme (Fig. ) is the typical Bit Interleaved Coded Modulation (BICM) 3], which is well adapted to transmission over flat fading Rayleigh channels and to iterative process at reception. Information bits d are first encoded with a channel coder of rate R and memory order M before being interleaved (Π). Groups of b output bits are mapped to complex modulated symbols s. Each group of Q symbols are spacetime encoded and then transmitted over T symbol durations. Assuming N T transmit antennas, the output of the STBC can be represented by T N T matrix C = c pi ], where c pi is either a combination of s or a combination of s transmitted by antenna i at time t + (p )T s. The rate of the space-time code is defined to be R ST = Q/T. d Channel Coding B. Channel model Fig.. Π Mapping s MIMO Bloc coding MIMO transmission scheme We consider a discrete-time MIMO channel model with N T transmit antennas and N R receive antennas. Channel coefficients from transmit antenna i to receive antenna j are modeled by complex samples h ij which follow uncorrelated complex Gaussian law with unitary variance corresponding to flat Rayleigh fading channels. Assuming the flat Rayleigh fading channels are constant over T time slots, the received signal r p,j at antenna j at time t + (p )T s is given by: N T N t r p,j = h i,j c pi + n p,j () i= where the noise samples n p,j are independent samples of a zero-mean complex Gaussian random variable with a variance

2 of σn. 2 By introducing an equivalent receive vector r C NRT, we can write: r = Hs + n (2) where H C NRT Q is the equivalent channel matrix considering ST code transmitting Q symbols over T symbols duration, s = ] T s... s Q is the transmitted vector and NRT n C is the equivalent noise vector. The average power of the symbols transmitted from the N T antennas is normalized to be /N R so that the average power at the receiver is and the signal-to-noise ratio (SNR) is equal to /σn 2. Besides, we assume that perfect channel information is available on the receiver side. NR r MIMO MMSE IC Equalization stage ŝ s Fig. 2. Demapping Mapping Π Π MIMO iterative receiver scheme Channel decoding stage Channel Decoding III. MIMO ITERATIVE RECEIVER The MIMO iterative receiver is depicted on Figure 2. The receiver is composed of a stage and a channel decoding stage, which exchange soft information on coded bits according to turbo equalization principle 4]. A. Low complexity MIMO equalizer The stage mainly consists in a MIMO equalizer that produces equalized vector of transmitted symbols deduced from received signal and estimated symbols. Owing to these estimated symbols, soft interference cancellation and filtering based on Minimum Mean Square Error (MMSE) are performed 5]. The output of the MMSE Interference Canceller (IC) can be expressed as: s = p H r qh ŝ (3) where ŝ is an estimate of s given by previous iteration. The two vectors p and q are respectively N R and Q complex vectors optimized under the MMSE criterion: (p opt, qopt ) = arg min s s 2 (4) p,q Since no prior information on transmitted symbols is available at the first iteration, the equalization process is reduced to a classical linear MMSE solution: s () = H H H + σ2 n σ 2 s I] H H r (5) For next iterations, coefficients of filters depend on estimated symbols ŝ. Exact solution of the calculation of these filters can be found in 2], 6]. However, as each filter has to be determined by matrix inversion, the optimum receiver d would induce a high complexity. Assuming perfect estimation of transmitted symbol (i.e. ŝ = s ) provides a sub-optimal solution 7] corresponding to matched filter. Equalized symbols for iteration l are obtained by: s (l) = diag ( H H H ) ] + σ2 n σs 2 I H H r ddiag ( H H H ) ŝ (l )] (6) with diag(a) and ddiag(a) are respectively matrix containing the diagonal and the off-diagonal elements of A. With this simplification, filter coefficients are given by the expression: { p subopt = h 2 +σ h n 2 /σ2 s q subopt = p H H (7) where h denotes the -th column of H. We can notice that the filtering has to be processed for each iteration whereas computation of filter coefficients will only be done once per space-time bloc for all iterations. B. Demapping/Mapping After MIMO equalization, symbols are sent to the soft demapper that produces Logarithm Lielihood Ratio (LLR) of coded bits Λ i, according to the formula: ( ) Λ i, = ln Σ s X i exp s p H h s 2 σni 2 ) (8) Σ s X i exp ( s p H h s 2 σ 2 NI where Xb i denotes the subset of X for which i-th bit is equal to b whereas σni 2 represents the total variance of the interference terms plus the residual noise that can be easily computed from (2) and (3). { σni 2 = p H Hē 2 σs 2 + p H 2 σn 2 for l = p H 2 σn 2 (9) for l > where ē is a Q vector with all elements equal to excepted the -th element that is equal to. A posteriori LLR on coded bits obtained in output of the channel decoder are first interleaved and then used by the soft mapper to calculate soft estimated symbols ŝ. Low complex mapping and demapping are obtained by simplifications allowed by QAM constellation and Gray mapping use 8]. IV. PROPOSED ARCHITECTURE A. Bit per bit interference cancellation (BPBIC) The principle of the proposed sequencing is to use new information contained in each soft decoded bit as soon as it has been decoded rather than waiting for the end of the frame decoding. Receiver architecture described in section III induces a pea of calculations at the end of each channel decoding iteration. Interference cancellation actually requires all estimated symbols of a ST bloc, all their constituting bits having to be decoded. Presence of an interleaving imposes

3 that interference cancellation is processed only when channel decoding is almost complete. The pea of calculations can be spread on time using serial implementation (Fig.3(a)), which limits complexity but increases processing time. Calculations can also be parallelized (Fig. 3(b)) to limit processing time but the complexity of the receiver will increase. To avoid this pea of calculations and eep a reasonable processing time, an update of interference cancellation is proposed after each bit decoding (Fig. 3(c)). Information contained in each new decoded bit is used through stage where soft mapping, interference cancellation and filtering and soft demapping are processed (Fig. 4). Thus, each decoded bit is used to update the associated estimated symbol. The updated estimated symbol brings new information to the MIMO equalizer which improves interference cancelling on symbols transmitted in the same ST-bloc. These new equalized symbols are then demapped to obtain new LLR on associated bits. If they have not been treated yet by the channel decoder, these LLR can be used by the decoder in the same iteration to accelerate the Fig. 3. (a) interference cancellation serial implementation (b) interference cancellation parallel implementation (c) interference cancellation in bit per bit implementation Sequencing of in turbo-mimo receivers Bit per bit interference cancellation ) The bit b i (p, s, n) corresponding to the p th bit from the s th symbol of the n th ST bloc is channel decoded at iteration i ; 2) The estimated symbol ŝ i (s, n) is updated previously from b i (b, s, n) and the other channel decoded bits constituting the symbol b j (ˆp, s, n) with ˆp p and j = i or i ; 3) For q = to Q, q s equalized symbols s i (q, n) are updated from ŝ i (s, n) and the other estimated symbols ŝ j ( q, n), q s, q from the n th ST bloc; 4) New equalized symbols s i (q, n) are demapped to obtain new estimated bits b i (p, q, n) then transmitted to the channel decoder. Fig. 4. sequencing with BPBIC convergence of the system. B. Selective bit per bit interference cancellation (SBPBIC) Updating all the symbols of a ST-Bloc and so all the associated bits after the of each bit involves a large increase of calculation which is not interesting because some LLR values calculated will be re-updated in the same iteration without being used by the channel decoder. To avoid useless, only one symbol of the ST-Bloc is updated by MIMO equalizer and only one of the corresponding bits is determined (Fig. 5). Thus, one soft decoded bit allows to update one soft equalized bit. To benefit as soon as possible from the information brought by the new decoded bit, the bit to be updated is determined as the next (in the deinterleaved order) of the b Q bits transmitted through the same STbloc. With a random interlaver this selected bit may have been used by the channel decoder before being updated in the current iteration (Fig. 6 (a)). In that case, new equalized bit will be used by channel decoder in the next iteration and more iteration will be required. In this context, a specific interleaver has been designed to facilitate the determination of the bit to be updated. It ensures also that distance between a decoded bit and the updated bit is large enough to use this equalized bit in the current channel decoding iteration (Fig. 6 (b)). A first condition to guarantee this criteria is to consider a number nb ST B of ST bloc per frame superior to the troncature length L t of the channel decoder. By uniformely distributing the b Q bits of a ST bloc in the frame, two bits of a ST bloc are at least distant from nb ST B and so distant from more than L t. The second condition on the interleaver is to mae sure that two bits from the same ST bloc which are consecutive in deinterleaved order are part Selective bit per bit interference cancellation ) The bit b i (p, s, n) corresponding to the p th bit from the s th symbol of the n th ST bloc is channel decoded at iteration i. 2) The estimated symbol Ŝi(s, n) is updated from b i (b, s, n) and the other bits constituting the symbol decoded before b j (ˆp, s, n) with ˆp p and j = i or i : 3) Determination of the position of next bit b i (p next, s next, n) of the n th ST bloc to be used by channel decoder (the next bit of the bloc in desinterleaved order) 4) Associated equalized symbols s i (s next, n) is updated from ŝ i (s, n) and the other estimated symbols ŝ j ( q, n), q s, s next from the n th ST bloc; 5) New equalized symbol s i (s next, n) is demapped to obtain new estimated bit b i (p next, s next, n) then transmitted to the channel decoder. Fig. 5. Second sequencing with SBPBIC

4 of different symbols. Indeed, an estimated symbol allows to cancel interference on all the symbols of the same ST bloc except itself. The bit to be updated, i.e. the next bit of the ST bloc entering the channel decoder, must so correspond to a different symbol than the symbol of the channel decoded bit. We can notice that with an interleaver which respects these two conditions, there is no variation in performance between updating all b Q bits of a ST bloc (BPBIC) or updating only the next bit of the bloc (SBPBIC). Calculation cost is however largely reduced. V. COMPLEXITY ANALISYS On Figure 7 we compare the number of real performed after each output bit between a solution where interference cancellation is done once all bits of the bloc have been decoded (Parallel Interference Cancellation (PIC)) and the proposed solutions where interference cancellation is updated for each decoded bit, for all bits of the ST bloc (BPBIC) or for a selected bit of the bloc (SBPBIC). A 6QAM Gray mapping system with a ST bloc transmitting 4 symbols is considered. 6 bits are so transmitted trough the same ST bloc. bit positions in deinterleaved order bit updated by IC before entering channel decoder bit used by channel decoder before being updated by IC time bits entering the channel decoder decoded bits interference cancellation bits updated by interference cancellation For the first solution, during 94% (5/6) of the channel decoding process duration, only estimated symbols are partially computed, as only 5 of 6 bits transmitted in each ST bloc are available. Consequently interference cancellation and gray demapping are processed in the last 6% of the process duration, when the last bit of each ST bloc has been decoded. This induces a burst of 46 after the decoding of one bit. In the proposed solutions, each new channel decoded bit improves an estimated symbol, which then updates one or (Q- ) equalized symbols, from which one or b bits are extracted. So a constant number of is performed for each decoded bit. In the BPBIC solution, interference cancellation calculations have to be repeated (Q ) times per decoded bit which involves an high average number of ( per decoded bit for update). In the SBPBIC solution, with updating only one bit, the average number of is reduced. Even if this average number is higher (29 instead of per decoded bit) than in typical solution, the number of operators to be used simultaneously for one decoded bit is five time reduced (29 instead of 46). The calculation pea is so avoided. VI. SIMULATION RESULTS Simulations have been carried out for uncorrelated flat fading Rayleigh 2 2 and 4 4 channel environment and perfect channel estimation. 6QAM gray mapping, convolutionnal code with memory order of 6 and interleaving of length 24 bits have been considered. Channel decoding is performed thans to SOVA. Performance are given according to the ratio E b /N, derived from SNR by the following formula : with σs 2 = on one antenna. E b = SNR N brr ST N T N R = N T N R σ 2 S brr ST σ 2 n () the average power of transmit symbols bit positions in deinterleaved order Fig. 6. (a) random interleaver interference cancellation bits entering the channel decoder decoded bits bits updated by interference cancellation time (b) specific interleaver positions of active bits during in function of decoding time number of per decoded bit PIC SBPBIC BPBIC time percentage Fig. 7. Evolution of the number of computed for during

5 2Tx 2Rx, 6QAM genie aided # both #2 SBPBIC #3 SBPBIC #4 SBPBIC #5 SBPBIC #2 PIC #3 PIC #4 PIC #5 PIC 4Tx 4Rx spatial multiplexing,6qam BER Eb/No db] Fig. 8. BER Performance of a 6QAM 2x2 system on flat fading Rayleigh channels BER 2 3 GA Spec. Inter. GA Random Inter. # Spec. Inter. #2 SI #3 SI #4 SI #5 SI # Random Inter. #2 RI #3 RI #4 RI #5 RI Eb/No db] Fig. 9. BER Performance of a SBPBIC 6QAM 4x4 system with flat fading Rayleigh channels Figure 8 shows BER results for PIC receiver and SBPBIC receiver in a 2x2 system with a linear dispersive code as spacetime coding 9] and with a specific interleaver that respects enounced conditions. At the first iteration, no estimated symbols are available and the two systems obtain indeed the same performance. From the second iteration, benefits from updates made during the current iteration in SBPBIC system while new information is used only on the next iteration on PIC system. So SBPBIC system converges faster. As the same algorithm of equalization are used for both system, asymptotical performances are the same. On Figure 9, we consider SBPBIC receiver in a 4x4 system with spatial multiplexing. Comparison is performed between a random interleaver and a specific interleaver respecting conditions listed in section IV. We can see the impact on SBPBIC receiver convergence with an interleaver which doesn t spread enough bits from the same ST bloc. As updated bits are not used in the current iteration, the system converges slower than the system with the specific interleaver. SBPBIC receiver with random interleaver may even converge slower than a PIC receiver, which never occurs with duly deigned specific interleaver. REFERENCES ] A. M. Tonello, Space-time bit-interleaved coded modulation with an iterative decoding strategy, in Proceedings of VTC Fall 2, Boston, USA, Sept. 2, pp ] M. Witze, S. Baro, F. Schrecenbach, and J. Hagenauer, Iterative detection of MIMO signals with linear detectors, 36th Asilomar Conference on signals, systems and computers, vol., pp , Nov ] G. Caire and G. Taricco and E. Biglieri,Bit-interleaved coded modulation, IEEE Trans. Inform. Theory, vol. 44, pp , May ] C. Douillard and A. Picart and P. Didier and M. Jezequel and C. Berrou and A. Glavieux, Iterative correction of intersymbol interference: Turboequalization, Eur. Trans. Telecommunications, vol. 53, n5, Sept ] A. Glavieux and C. Laot and J. Labat, Turbo equalization over a frequency selective channel, in Proceedings of ISTC 97, Brest, France, pp. 96-2, Sept ] D. Reynolds and X. Wang, Low complexity turbo-equalization for diversity channels, Signal Processing, vol. 85, n5, pp , May 2. 7] P.-J. Bouvet, M. Helard and V. Le Nir, Low complexity iterative receiver for non-orthogonal space-time bloc-code with channel coding, Proc. VTC 24 Fall, Sept ] F. Tosato and P. Bisaglia, Simplified soft-output demapper for binary interleaved COFDM with application to HIPERLAN/2, Proc. ICC 22, pp , April 22. 9] B. Hassibi and B. M. Hochwald, High-rate codes that are linear in space and time, IEEE Trans. Inform. Theory, vol. 48, pp , July 22. VII. CONCLUSION This paper proposes a low complex MIMO iterative receiver based on MMSE equalization and interference cancellation that limits processing time. By improving interference cancellation after each newly channel decoded bit, calculation power is evenly distributed along iteration duration and peas of calculations are avoided. Moreover, updated information available during an iteration can be used by during the same iteration to accelerate convergence of the system and so to decrease the number of iterations to be computed.

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