Analysis of Word length Effect in Fir Filter

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1 International Journal of Computer Trends and Technology (IJCTT) volume 3 Number 2 December 215 Analysis of Word length Effect in Fir Filter 1 Er.Sheenu Rana, 2 Er.Ranbirjeet Kaur, 3 Rajesh Mehra 1,2 M.E.Scholar, 3 Associate Professor 1,2 Departmant of Electronics & Communication Engineering NITTTR, Chandigarh, India Abstract This paper presents design and simulation of FIR filter for fixed point. Three different input precision bits are used for design simulation namely 8 bit, 16 bit and 32 bit. The design has been analyzed and compared in terms of accuracy and less stop band attenuation. The hardware requirement is also computed in terms of multipliers and adders. It can be observed from result that using more no of bits gives more accurate output signal. Multiplier and adders requirement will remain same if order is fixed for all 8, 16 and 32 bit input signal. Index term: FIR, Word length, Fixed point,floating Point, Quantization, Direct firm I, High pass filter. I.INTRODUCTION This paper shows a systematic procedure for analyzing round off noise and accuracy in digital filters employing floating point arithmetic. The problem of using fixed point arithmetic and their effect on digital filters has been extensively studied and is reasonably well understood [1, 2]. The analysis of floating point digital filters has also been taken into account. [3, 4]. In case of Digital system for the filter implementation, fixed or floating point arithmetic are used. Floating point implementations are more complex than fixed point, but they offer reduced quantization errors. In this a comparison is made between the use of fixed and floating point arithmetic for FIR filters [5]. In many applications the performance of the simpler fixed point arithmetic can equal or exceed that of floating point.floating point is more accurate then the fixed point. [6, 7] In this paper we discussed about the effects of fixed point and floating point on the output of the system.[8, 9]. II.FIR FILTER Finite impulse response are characterized by the equation: Y(n)=a x(n) + a 1 x(n-1)+ a 2 x(n-2) + +a m x(n-m). (1) Where a, a 1 are constants. In FIR filter, there is no feedback connections from the output to input. An FIR filter does not introduce any losses to signals that get transmitted through it. Block diagram of FIR filter. WE don t use any transformation technique in the design of FIR filter like in IIR. FIR called as constant phase filter. Magnitude and phase angle of transfer function expressed as: H(w)=M e -jwn =Me -jo.. (2) Where M=1 is the Magnitude. Different windowing techniques like hamming, hanning, blackman, barlet are used for increasing the accuracy.in FIR filter design, we are able to meet the required specification by a trial and error procedure or by using an empirical formula such as Kaiser s. Binary no are represented in Digital systems using two formats: A) Fixed point B) Floating Point. We may generalize the representation of numbers in the fixed point arithmetic by expressing the number X given by (3) X= b 1 *2-1 +b 2 * b m *2 -m (3) The in the MSB position, indicates that number is Positive. Range of Numbers. Range of numbers in fixed point arithmetic is depends upon the no of bits Let we have M bit, one nit apart for representing the sign. ISSN: Page 14

M a gn itu d e (db ) International Journal of Computer Trends and Technology (IJCTT) volume 3 Number 2 December 215 The remaining (m-1) bits can be used to represent the numbers.

2 M a gn itu d e (db ) International Journal of Computer Trends and Technology (IJCTT) volume 3 Number 2 December 215 The remaining (m-1) bits can be used to represent the numbers. We can represent a total 2 m-1 positive numbers and 2 m-1 negative numbers in the fixed point format with an m bit Capacity given by(4) R = -(2 m-1-1) to (2 m-1-1) (4) Round off: to restrict the maximum and minimum numbers so that they can be stored and processed in registers of finite lengths, we require truncation and round off. Floating point representation covers a large range of numbers than fixed point. Resolution decreased with an increase in the size of range. In binary floating point format, a restriction has been imposed on it: it should lie between 1/2 M 1 Floating point representation in a 16 bit computer. S M M S E E Where S M is the sign bit of Mantissa, M represent mantissa S E is sign bit of Exponent and E represents exponent. Floating point numbers are often classified as single precision and double precision. Double precision number uses twice as many Bits as a single precision value, so it can represent fractional quantities much more exactly. The more precision a system uses, the more exactly it can represent fractional quantities. The filter length is inversely proportional to the transition width of the filter so more multipliers are used[5]. A type I filter is characterized by following properties: The order N of the filter is even. Its length L=(N+1) is odd. Its impulse response possesses the Symmetry property of H(n) = h(n-n), n N (5) easily reduced the stop band attenuation. In this paper we have designed high pass filter for different bit rate and compare the output response of each. Section II discusses the FIR filter for high pass. Section III explains the simulated result obtained through MATLAB.Section IV concludes the paper by discussing the pros and cons of each bit. III. MATLAB BASED SIMULATION The Floating Point method is used to design a filter for signal to noise ratio in audio applications. In this paper designing of filter used two types of Techniques Fixed And floating point for improving the accuracy. In the MATLAB simulation an audio signal is loaded in the filter having fixed order of N=8with Ast and Ap is of value.3 and.35 and samples are taking up to 1. The input audio signals are of the different length. According to the length of the signal the amplitude vary from low to high or high to low. The magnitude and phase response of the 8, 16, 32 bit fixed point. are shown in Figure..As seen in figure (1) Magnitude response of 8 bit input signal in fixed point FIR filter is having high stop band attenuation. -1 Reference filter 8 bits I/O Precision Fig 1. Magnitude response for 8 Bit I/O precision As seen in figure(2) Magnitude response of 16 bit input signal in fixed point FIR filter is having a low stop band attenuation as compare to 8 bit input signal. High pass filter pass all the frequiencies above cut off frequency and attenuate all those below it.by interchanging R and C we get a first order high pass filter.similarly interchanging the positions of R and C we get a second order high pass filter.the proposed work in this paper is to estimate the more accurate signal at the output. By varying the bit rate we can ISSN: Page 15

) M g M n tu d e ( d ( d B ) International Journal of Computer Trends and Technology (IJCTT) volume 3 Number 2 December 215-1 Reference filter B)-2 16 bits I/O Precision e-3 itu-4 i-4 n ag-5-1 -2-3

Magnitude response for 16 Bit I/O precision In Fig (3) magnitude response of 32 bit input signal precision will give more accurate output as stop band attenuation is less.

Result comparison If the order of filter remains same then number of adders and multiplier required will remain same if increase the no. of bits.

3 ) M g M n tu d e ( d ( d B ) International Journal of Computer Trends and Technology (IJCTT) volume 3 Number 2 December Reference filter B)-2 16 bits I/O Precision e-3 itu-4 i-4 n ag Reference filter 8 bits I/O Precision 16 bits I/O precision 32 bits I/O precision Fig 2. Magnitude response for 16 Bit I/O precision In Fig (3) magnitude response of 32 bit input signal precision will give more accurate output as stop band attenuation is less. e-3 itud-4-1 Reference filter ( d -2 B 32 bits I/O Precision Fig 4.Result comparison If the order of filter remains same then number of adders and multiplier required will remain same if increase the no. of bits. Table 1: Implementation cost 8 bit 16 bit 32 bit No of Multiplier No of adders No of states No of multiplication per input sample Addition per input sample Magn Fig 3. Magnitude response for 32 Bit I/O precision IV. RESULT & DISCUSSION As can be seen from the design simulation the FIR filter has better stability for 32 bit input output precision.8 bit and 16 bit having more stop band attenuation comparing with 32 bit as shown in fig. 2,3.As we increase no of bits we will get more accurate signal with the same hardware cost. CONCLUSION In this paper three signals with bit rate 8 bit,16 bit and 32 bit have been analyzed and compared after passing through FIR filter. From results it can be observed that the magnitude response and normalized frequency is better as we increase the no of bits. Hardware requirement is same for all 8 bit, 16 bit and 32 bit. This means that double precision reduces the maximum noise from the signal make signal more accurate. REFERENCES: [1]Andrew G. Demister, Malcon D. Macleod, Comparision Of Fixed Point FIR Digital Filter Techniques, IEEE Transaction on circuits ISSN: Page 16

4 International Journal of Computer Trends and Technology (IJCTT) volume 3 Number 2 December 215 and system II analog and digital signal processing Vol 44,pp ,No 7, July 1997 [2.]Chia Yuyao,Wei-ChuHsia,Yung-Hsiangho, Designing Hardware Efficient Fixed Point FIR Filters in an Expanding Subexpression space, IEEE transaction on circuits and syatem- I Vol.61,pp ,No. 1,January214. [3]Aparna Tiwari, Vandana Thakre, Karuna Markam, Performance Analysis of FIR Digital High Pass Filters, International Journal of Computer & Communication Engineering Research, Vol. 2, pp , 2 March 214. [4] Manish Trika, Rajesh Mehra, BER and Cost Analysis of FIR filter For digital Transmission System, International Journal Of Industrial Elctronic and electrical engineering, Vol. 2,Issue 9,September 214 [5].Jean Jacques vandenbussche,peter lee,joan peutemen Multiplicative finite impulse response filters:implementations and application using field programmable gate arrays, IET journal of signal processing,vol. 9,ISS. 5,pp ,16 th February 215. [6].Arushi Garg,Rajesh mehra, Design analysis of high pass filter using different techniques,international journal of Advance Research in science and engineering IJARSE,Vol.3,pp ,September 214. AUTHORS: Ms. Sheenu Rana: Ms. Sheenu Rana is currently associated with ARYANS College of Engineering and Technology, Nepra, Punjab, India since 214. She is currently pursuing M.E from National Institute of Technical Teachers Training and Research, Chandigarh India. She has completed her B. Tech from DWIET Engineering College, Punjab, India. She is having four years of teaching experience. Her areas of interest include Advanced Digital Signal Processing. Ms.Ranbirjeet Kaur: Ms.Ranbirjeet Kaur is currently working as Assistant Proffesor in Ropar IMT group of colleges, Shekhupur, Punjab, India since August 211.She is pursuing ME from NITTTR Chandigarh Sec,26.She completed her Btech from Yadawindra College of engg. Under Punjabi University Patiala. [7].Rajesh mehra,sawapna Devi, FPGA based design of high performance Decimator using DA LUT algo ACEEE International Journal on Signal and Image Processing,Vol.1,pp-9-13,issue 2,21. [8] Rajesh mehra,lajwant singh, Cost analysis and simulation of decimator for multirate application International journal of computer and electronics engineering,vol.1,pp ,issue 2,21. [9].Kanu priya and Rajesh mehra. Area efficient design of FIR filter using symmetric Structure. International Journal of Advanced research in computer and communication Engineering, Vol.1,Issue 1,pp ,212. Dr. Rajesh Mehra: Dr. Mehra is with Electronics and Communication Engineering Department of National Institute of Technical Teachers Training & Research, Chandigarh, India since He has received his Doctor of Philosophy in Engineering and currently associatedtechnology from Panjab University, Chandigarh, India in 215. Dr. Mehra received his Master of Engineering from Panjab Univeristy, Chandigarh, India in 28 and Bachelor of Technology from NIT, Jalandhar, India in Dr. Mehra has 2 years of academic and industry experience. He has more than 25 papers in his credit which are published in refereed International Journals and Conferences. Dr. Mehra has 55 ME thesis in his credit. He has also authored one book on PLC & SCADA. His research areas are Advanced Digital Signal Processing, VLSI. Design, FPGA System Design, Embedded System Design, and Wireless & Mobile Communication. Dr. Mehra is member of IEEE and ISTE. ISSN: Page 17

5 International Journal of Computer Trends and Technology (IJCTT) volume 3 Number 2 December 215 ISSN: Page 18

Oversampling D/A Converter Design for Improved Signal to Quantization Noise Ratio

International Journal of Computer Trends and Technology (IJCTT) volume 8 Number 4 October 5 Oversampling D/A Converter Design for Improved Signal to Quantization Noise Ratio Himanshu Mahatma, Rajesh Mehra,