LED Driver Based on UCC28060 Interleaved ACDC Single Stage Flyback. Application Report

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1 LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback Application Report Literature Number: SLUA65 October 011

2 Application Report SLUA65 October 011 LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback Tony Huang Power management products/field Applications ABSTRACT UCC8060 can be implemented in an ACDC single stage solution with transition mode interleaved Flyback topology. This note will discuss the design considerations and give a practical design example. Contents 1 Single stage LED lighting ntroduction...3 Design considerations Transition mode single stage analysis With CC load With LED load With CR load Ripple current cancellation of UCC8060 single stage nterleaved single stage design considerations for the UCC Loop stability analysis A practical interleaved single stage LED driver design based on the UCC W nterleaved Single Stage Design and Test Results Test Data Efficiency versus Line Power Factor versus Line Voltage Output Peak to Peak Ripple Voltage Conclusion:...3 1

3 SLUA65 Figures Figure 1. Primary side switching current and input average current waveforms....4 Figure. THD Vs. (Vp/nVo)...6 Figure 3. Secondary side peak current and average current waveforms....7 Figure 4. Secondary side parameters Vs. with CC load...10 Figure 5. A typical V/ characteristic of a single die LED...11 Figure 6. Dynamic model for an LED load...11 Figure 7. Secondary side parameters Vs with LED load (C1000uF, RLED3R)...1 Figure 8. The average model of the single stage...15 Figure 9. The small signal model of the single stage...15 Figure 10. The LED current closed loop control implementation...16 Figure 11. nput RMS current and its 1st Harmonic at 85VAC & 65VAC...17 Figure 1. Closed-loop compensation with 85V line input...18 Figure 13. Closed-loop compensation with 65V line input...19 Figure 14. A 60W LED driver overall schematic...0 Figure W nterleaved Single Date Schematic...1 Figure W Efficiency versus input voltage and load... Figure 17. Power factor versus input voltage and load... Figure 18. Output peak to peak ripple voltage,.6vpp...3 Table 1. Table. Tables Parameter table for primary side single stage...6 Parameter table for secondary side...9 LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback

4 SLUA65 1 Single stage LED lighting ntroduction A recent trend in LED lighting is to implement the driver with a single stage offline ACDC. A single stage ACDC employs only one controller and one Flyback power stage to implement an isolated PFC (power factor correction) solution. The benefit is a very low BOM cost and high efficiency. The usual approach is to employ a transition mode Flyback topology for increased efficiency, as well as a regulated constant t on (switch on-time) to implement the PFC. This solution can significantly decrease the turn-on power loss not only in the main MOSFET, using valley voltage mode, but also the turn-off power loss in the secondary side rectifier with ZCS (zero current switching). However, the one phase transition mode, with boundary current mode in the transformer, produces much higher input and put ripple current than continuous current mode. This significantly reduces EM performance and efficiency, so that a bigger EM filter is necessary. The higher the power rating of the ACDC, the higher the ripple current and EM filter volume. Moreover, very high peak currents in a one phase single stage LED driver may increase the risk and cost on the main MOSFET and put rectifier. An interleaved transition mode PFC controller such as the UCC8060, can be used to implement an interleaved, two phase single stage Flyback, which significantly decreases the ripple current due to the ripple current cancellation effect. Thereby the input EM filter and put capacitor volume can be decreased greatly. t also allows for higher flexibility in selecting the MOSFET, rectifier etc. because they only handle half the peak current of the original single phase. LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback 3

5 SLUA65 Design considerations.1 Transition mode single stage analysis Using the following parameter definitions and analysis of the transition mode single stage flyback can be performed. AC input voltage (RMS): V AC ; Line AC frequency: f AC ; Rated input power: Pin Output voltage: V O ; Transformer turns ratio: nnp/ns; Let: ω πf AC ; On the primary side, it s essential that the transition mode single stage can maintain the switching current and input average current as shown in figure1. Figure 1. Primary side switching current and input average current waveforms. During the high frequency switching cycle t [τ, τ+t sw ], the duty cycle and primary side peak current should follow the equations below: nvo D( ωt) nv + V Sin( ωt) ; V ACtON i ( t) Sin( t L ) peak ω ω o AC p Let: V AC AC, And m ton nvo Lp V, then the duty cycle is: 1 D( ωt) 1+ Sin( ωt) ; And peak current i ( t) Sin( t ) peak ω m ω 4 LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback

6 SLUA65 As a result, during the high frequency switching cycle t [τ, τ+t sw ], the continuous input current can be solved as below: i in ( ω t ) Sin ( ω t ) m 1 + Sin ( ω t ) (Eq.1) Considering a practical design for peak current mode, should be greater than 1. The above equation shows the input current isn t a pure sine wave, but contains higher order harmonic elements. The total input RMS current can be found as below: in π 0 i in ( ω t ) d ω t π m π π (1 + Sin ( ω t ) Sin ( ω t )) 0 d ω t Then, in m π ( π 4 + ( 1) Ln( ( + 1) 1) ) 1 (Eq.) Considering the harmonic elements of the input current, the 1st harmonic RMS current would be: 1RMS 1 π iin( ωt) Sin( ωt) dωt 0 π m 1+ π 0 π Sin ( ωt) dωt Sin( ωt) Then: 1RMS π m Ln( + [ π + 1 1) ] (Eq.3) n practice, most of the input power comes from the input line AC voltage times the 1st harmonic RMS current. The total harmonic distortion THD should be: THD 1 Ln( + 1) ( π + ) 1 ( 1) Ln( 1) π [ π 4 + ( + )] 1 1 (Eq.4) Figure 1 shows how THD changes with different values. LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback 5

7 SLUA65 Figure. THD Vs. (Vp/nVo) Figure shows that increasing increases THD (total harmonic distortion). Also, the higher the input voltage, the higher the THD. The transformer turns ratio, n (nnp/ns) should be high enough to allow for a lower. Then the calculated values for the primary side parameters can be found in table 1. Table 1. Parameter table for primary side single stage (1.414xVin/nV) 1RMS / m in / m THD(%) LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback

8 SLUA65 Figure 3. Secondary side peak current and average current waveforms. On the transformer secondary side, during the high frequency switching cycle t [τ, τ+t sw ], the average put current of the secondary side transformer can be found as below: i s ( ω t ) S Sin ( ω t )[ 1 D ( ω t )] S 1 + Sin ( ω t ) Sin ( ω t ) x S is the peak current of the secondary side transformer. Consider a low frequency cycle ωt [0,π], during ωt [φ,π-φ], the put capacitor is being charged, and during ωt [0,φ] [π-φ,π], the put capacitor is being discharged. Then: i ( φ) s S Sin φ 1+ Sinφ π Then: π S 0 i ( ωt) dωt And S Ln( + [ π + π 1 1) ] (Eq.5) Ln( + πsin φ 1+ Sinφ [ π + ] 1 1) (Eq.6) LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback 7

9 SLUA65 According to table and figure 4, the approximated rectifier angle φ is 0.7rad. Obviously the ripple frequency in the secondary is double the line AC frequency. An approximated analysis is to use the 1st harmonic element to estimate the put ripple. Based on this assumption, we can get the results below: Consider the AC current part, is ( t), and a doubled AC line frequency, the amplitude of the 1 st harmonic element should be: SAC Then: π 1 [ i ( ωt)] Cos(ωt) dωt π 0 s 8 Ln( + s 3 SAC 1 [ + + ] 3 π 8 3 [ 3 3 π 4 π 1 1) π π Ln( + 1) + + ] 4 1 Ln( + 1 [ π + ] 1 SAC 1 Table and Figure 4 reveals a critical phenomena is the current ratio constant with an approximated value of SAC 1 (Eq.7) (Eq.8), it is almost 8 LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback

10 SLUA With CC load The put peak to peak ripple voltage: U p p SAC πf C πf C AC AC (Eq.9) The calculated values for the secondary side parameters for various values can be found in table. Table. Parameter table for secondary side. (1.414xVin/nV) s / φ (RAD) U p-p / (C1mF) SAC-1 / LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback 9

11 SLUA65.5 U p-p / Vs SAC-1 / Vs. 0.5 Rectifer Angle Vs. 0 ( 1.414Vin/V) Figure 4. Secondary side parameters Vs. with CC load. With LED or CR load setup, the ripple current flowing into capacitor C can be decreased by a part of it flowing into RLED or RL, which decreases the put ripple voltage significantly. The lower the RLED or RL resistance, the lower the put ripple voltage. 10 LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback

SLUA65.1. With LED load A typical V- characteristic of an LED: Figure 5.

at the working point specified for the LED R LED nled LED Δi LED light brightness.

Based on the V/ characteristic, the practical electrical characteristic can be

12 SLUA65.1. With LED load A typical V- characteristic of an LED: Figure 5. A typical V/ characteristic of a single die LED ΔV ; This represents the slope rate at the working point specified for the LED R LED nled LED Δi LED light brightness. n LED is the quantity of the LEDs in series. Based on the V/ characteristic, the practical electrical characteristic can be simulated by the circuit below : + Figure 6. Dynamic model for an LED load LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback 11

13 SLUA65 The put peak to peak ripple voltage Up-p should be: U p p SAC R LED π RLEDC f AC R 16π R LED LED C f AC (Eq.10) With RLED3R & C1000uF, the secondary side parameters are as shown in Figure 7. Secondary Side Parameters Figure 7. Secondary side parameters Vs with LED load (C1000uF, RLED3R) 1 LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback

14 SLUA With CR load Similar to the LED load, the put peak to peak ripple voltage will be: U p p SAC R L π RLC f AC R L 16π R C L f AC. Ripple current cancellation of UCC8060 single stage The UCC8060 employs natural interleaving transition mode control. Two flyback power stages work in transition mode allowing for lower switching power dissipation in the MOSFET and rectifier because of valley voltage switching in MOSFET and zero current turn-off of the secondary side rectifiers, this also results in a better EM performance. Furthermore, considering the higher input peak current in transition mode than in average mode, UCC8060 s natural interleaving mode, with peak current ripple cancellation, can significantly decrease the current ripple, which benefits the volume reduction of the EM filter, and also increases the efficiency..3 nterleaved single stage design considerations for the UCC8060 Step 1: Define the input maximum power, AC voltage range and put voltage range: P ; V ; V ; V ; V MAX ACMN ACMAX MAX Step : Transformer design. MN V nv ACMN MAX > 1 According to the THD analysis in.1, a lower produces a lower THD. So for example we can let 1.1 at low line. Thereby we can get a turns ratio n for the transformer. At low line input: A. the 1st harmonic RMS current in each phase will be: P MAX 1 RMS ; V ACMN B. Assuming a minimum operating frequency is f MN, then the constant On-Time is t on 1 (Eq.11) f (1 + ) MN According to Eq.3, we can get m as LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback 13

15 SLUA65 m V peak ACMN ton L (Eq.1) p Per the above t on and m, we can find the primary side inductor value L p. Step 3. From the datasheet for the UCC8060: t on ( V 15mv) T comp Using t on and T, a maximum V comp at low line can be calculated. An optimized T can be used to set up a suitable V comp, considering a typical limit value of 4.95V. A resistor on TSET pin of the UCC8060 can configure an optimized T. Step 4. According to equation 9, the put capacitor can be selected by the pre-decided put low frequency peak to peak ripple voltage: According to equation 9, or table, as input AC Line varies from 85V to 65V, or varies from 1.1 to 3.4, assuming an put peak to peak ripple voltage range, then the put capacitor value can be found. 14 LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback

16 SLUA65 3 Loop stability analysis Consider the boundary mode, the magnetizing current of the transformer will be discharged fully, and the lossless resistor Rm and constant transferred power P model can be used to describe the average model per figure 8. Figure 8. The average model of the single stage Here, Rm L (1 + p n < V > ; And t < V on > ) < V > P Rm Note, <*> means the average value during a switching cycle. The small signal circuitry can be found as in figure 9: Figure 9. The small signal model of the single stage LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback 15

17 SLUA65 And, F T V ; V Lp(1 + ) nv o F VO V ton ; V nlpv (1 + ) nv r 1 V Lp(1 + nv t on ) M T V ; V Lp(1 + ) V nv M V V V ( + ) ton nv ; V LpV (1 + ) nv L (1 + V p nv r V ton ) V Here, V V AC Thereby, the control block diagram can be implemented as in figure10: Consider the low frequency ripple, a lower crossover frequency is necessary to dampen the low frequency ripple caused by the input AC voltage. The recommended crossover frequency should be far less than the AC line frequency. Figure 10. The LED current closed loop control implementation 16 LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback

18 SLUA65 4 A practical interleaved single stage LED driver design based on the UCC8060 PMAX 60 W; VACMN 85V ; VACMAX 65V ; V 35V Using the steps in section.3, assuming f MN 65hz and 1.1 at low line input AC voltage, the transformer can be designed as below: L p 440uH; n 3 At low line input, on time of the UCC8060 is 7.1us. At high line input, on time of UCC8060 is 1.46us. The input current and 1st harmonic element in phase A or B can be simulated as below: st 85VAC VAC st 65VAC VAC 0 t Figure 11. nput RMS current and its 1st Harmonic at 85VAC & 65VAC Output capacitor on the secondary side: According to table, as input AC line varies from 85V to 65V, or varies from 1.1 to 3.4, assuming RLED3R, and the put peak to peak ripple voltage is within 1.7V, then the put capacitor can be selected based on equations (8) and (10). 60W 1. 7A 35V U p p 1.7 Then C 00uF LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback 17

19 TGain (db) SLUA65 As a result, we can use 3x 680uF/68V Capacitors in parallel for the put capacitor configuration. Loop compensation consideration: According to the compensation solution in figure 9, loop compensation can be implemented as figure 9. The simulated closed loop regulation bode plot are shown in figures 1 and Phase [deg] k 10k 100k 1M Frequency (Hz) Figure 1. Closed-loop compensation with 85V line input 18 LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback

20 TGain (db) SLUA65 At 85V AC input, the phase margin is 110 O, and crossover frequency is 10Hz Phase [deg] k 10k 100k 1M Frequency (Hz) Figure 13. Closed-loop compensation with 65V line input With 65VAC input, phase margin is 80 O, and crossover frequency is 60Hz. LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback 19

21 SLUA65 Figure 14. A 60W LED driver overall schematic 0 LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback

22 5 150W nterleaved Single Stage Design and Test Results SLUA65 Figure W nterleaved Single Date Schematic LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback 1

23 SLUA Test Data Efficiency versus Line Figure W Efficiency versus input voltage and load 5.1. Power Factor versus Line Voltage Figure 17. Power factor versus input voltage and load LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback

24 SLUA Output Peak to Peak Ripple Voltage Test conditions: nput 0Vrms at 50Hz. Output current 3A. 6 Conclusion: Figure 18. Output peak to peak ripple voltage,.6vpp This note shows the analysis of a single stage Flyback LED driver, and the benefit of using an interleaved single stage topology for an LED driver based on the UCC8060. Meanwhile, a practical design has been implemented. t showed UCC8060 solution benefits with low cost and high efficiency. LED Driver Based on UCC8060 nterleaved ACDC Single Stage Flyback 3

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