Forced Convergence Decoding of LDPC Codes EXIT Chart Analysis and Combination with Node Complexity Reduction Techniques (Invited Paper) 1

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1 Forced Convergence Decoding of LDPC Codes EXIT Chart Analysis and Combination with Node Complexity Reduction Techniques (Invited Paper Ernesto Zimmermann, Wolfgang Rave and Gerhard Fettweis Dresden University of Technology Vodafone Chair Mobile Communications Systems D-62 Dresden, Germany Abstract: Recently, the concept of forced convergence decoding for Low-Density Parity-Check Codes has been introduced. Restricting the message passing in the iterative process to the nodes that still significantly contribute to the decoding result, this approach allows for substantial reduction in decoding complexity at negligible deterioration in performance. We analyze this novel technique using EXIT charts and show how it compares to and can be combined with other complexity reduction techniques. Our findings imply that forced convergence works effectively in conjunction with other complexity reduction techniques while retaining its attractiveness in terms of the complexity-performance trade-off. Introduction Low-Density Parity-Check Codes (LDPCC were developed by Gallager in the early sixties [4] and appear to have been largely forgotten until their rediscovery by MacKay and Neal [] in the late nineties. In recent years, a lot of effort has been dedicated to this research area [2], as LDPCC emerged as a promising candidate technology for forward error correction (FEC in future wireless systems due to their near-capacity error correction performance [, 2, ]. LDPCC are defined in terms of a sparse parity check matrix H. Codes with a fixed number of non-zero elements per row and column of H are commonly referred to as regular LDPCC. Significant improvement in error correction performance (in terms of an earlier waterfall region can be achieved by using irregular LDPCC [2]. The different algorithms used for LDPC decoding (belief propagation, sum-product decoding and variations on the topic all iteratively approximate the solution to the maximum likelihood decoding problem, i.e., the task of finding the codeword with minimum Euclidean distance from the received signal. This is done by passing messages on the edges between the nodes of the bipartite Tanner graph [6] that represents the parity check matrix of the LDPCC (cf. Figure. The average complexity of the decoding process is hence the product of three factors:. the number of operations per node, 2. the average number of iterations, and 3. the number of active nodes in each iteration. This work was supported in part by the German ministry of research and education within the framework of the WIGWAM project Wireless Gigabit With Advanced Multimedia Support under grant BU 37, and the European Union within the framework of the IST project IST WINNER (World Wireless Initiative New Radio Most of the techniques known so far aim at the first factor, i.e., try to minimize the number of operations per node. By contrast, the forced convergence approach [2] is to the best of our knowledge the only technique that tries to reduce the number of active nodes. In this paper, we comparatively assess the performance of different complexity reduction techniques related to LDPCC. We also use EXIT charts [7] to investigate the effect such approximations have on the information transfer characteristics of the iterative decoding process. The remainder of this paper is structured as follows: Section 2 describes the standard LDPC decoding algorithm and the system setup. Section 3 gives an overview of the state of the art followed by an introduction to the forced convergence approach in Section 4. EXIT chart analysis and complexity assessment results are presented in Sections 5 and 6, respectively. We finally draw conclusions in Section 7. 2 Fundamentals 2. Standard LDPC Decoding The Tanner graph of a LDPCC contains two types of nodes the variable nodes v i, representing the bits of the codeword (usually depicted on the left hand side of the graph and the check nodes c j, representing the constraints imposed by the parity checks (usually depicted on the right hand side. v v 2 v 3 c v 4 c 2 v 5 c 3 v 6 c 4 v 7 v 8 Figure : Tanner graph representation of a block length 8 (3,6 regular LDPCC. Nodes on the left hand side represent the code bits, nodes on the right hand side the parity check constraints. Throughout the decoding process, the nodes exchange messages Q v,c and R c,v over the edges of the bipartite graph.

2 Two nodes v i and c j are connected, if (and only if h i,j, that is, the i th bit of the codeword is checked by the j th parity check equation. At the outset of the decoding process, each variable node is initialized with the corresponding soft output F i from the detector, which denotes the log-likelihood-ratio 2 of variable bit v i, conditioned on the observed channel output: F i log Pr(v i = y i Pr(v i = y i. ( Decoding is done by consecutively passing messages from one side of the Tanner graph to the other. During the first half-iteration, each variable node v i sends its belief (log-likelihood-ratio of being in a certain state, given the input from all adjacent check nodes c j,j j (denoted by Q i,j to check node c j. During the second half-iteration, each check node c j sends its probability of being satisfied (denoted by R j,i, given the belief of v i and taking into account the messages Q i,j of all other adjacent variable nodes v i, i i, to variable node v i. The message passing is repeated until all checks are satisfied (successful decoding or a maximum number of iterations is reached and a decoding failure must be declared. Note that thus, decoding errors are detectable and that for sufficiently large block lengths, the number of undetected block errors tends to zero []. 2.2 System Setup Throughout this paper, we use two different LDPCC for evaluation whose error correction performance over the AWGN channel is depicted in Figure 2, along with that of a Parallel Concatenated Convolutional Code (PCCC and a Convolutional Code (CC. The first LDPCC is a (3,6 regular code of block length 4 bits (more specifically, the code from MacKay s encyclopedia of sparse graph codes [9]. Simulations showed that a maximum of 4 iterations is a reasonable number, after which performance does no longer improve significantly. The second code is a rate /2 irregular LDPCC, as proposed by the TGnSync consortium in the standardization process of 82.n [9]. We used an expansion factor of L = 8 [9] to create a code of block length 532 bits, somewhat larger than the regular LDPCC. Note that the code is in fact almost row regular (check node degree 6 and has roughly the same number of degree 2 and degree 4 variable nodes it is hence almost equivalent to the (3,6 regular LDPCC in terms of average node degrees. This code shows good performance already at a maximum of 2 iterations. It is easily seen that applying the min-sum-algorithm instead of true message passing results in a performance loss of roughly.4 db for both codes (details on the min-sum algorithm are given in the following section. Note that a memory 8 (56,753 convolutional code of the same block length would require E b /N 3.5dB to achieve a target FER of 2, while a rate /2, memory 2, (7 R,5 PCCC can achieve roughly the same performance as the LDPCC, depending on the number of decoder iterations and whether one uses logmap or 2 Unless stated otherwise all logarithms in this paper are natural logarithms. FER 2 MPA Reg. LDPCC, MSA Irreg. LDPCC, MSA Reg. LDPCC, MPA Irreg. LDPCC, MPA (7 R,5 PCCC (4 it. PCCC MSA (56, 753 CC E b /N [db] Figure 2: Frame error rate of the two rate /2 LDPCC used for evaluation, both under Message Passing (MPA and Min-Sum (MSA decoding, on the AWGN channel. The performance of a (7 R,5 PCCC (using logmap decoding and 4 internal iterations and a memory 8 CC is plotted for reference. maxlogmap decoding (only results for logmap decoding with 4 decoder iterations are shown. The block length for the PCCC was 4 bits, equal to that of the regular LDPCC, and we used a random interleaver for scrambling the input sequence before the second encoder. 3 State of the Art It is easily shown that the (log domain messages exchanged during iterative decoding are of the form [8]: Q i,j = F i + R j,i, and (2 j,j j + R j,i = log e Q i,j e Q i,j+ e Q i,j e Q i,j+ CC Q i,j (3 where is the box-plus operator [5]. From equation (2 we see that the complexity of a variable node in a log domain LDPC decoder is more or less irreducible; we need two operations per incoming edge: one to calculate the sum B i = F i + R j,i taking into account all adjacent check nodes (this value will have to be calculated either way for tentative decoding and one subtraction per edge to calculate the outgoing message. The target of any node complexity reduction scheme in LDPCC decoding is therefore not the variable node decoder (VND, but the check node decoder (CND. 3. Check Node Complexity Reduction Rewriting equation (3 as follows [6, 8] R j,i = 2tanh ( tanh ( Q i,j/2 (4 makes apparent that the main complexity in LDPC decoding is due to the non-linear functions required for

3 calculating the check node messages. An efficient implementation is possible by exploiting the fact that [6, 3] Q,j Q 2,j = sgn ( Q,j Q 2,j min{q,j,q 2,j } +log ( + e Q,j+Q2,j ( log + e Q,j Q2,j, (5 which is nothing else than the (multiple application of the Jacobian logarithm also known from PCCC decoding [4]. Since for each outgoing message of the check node, one of the incoming messages has to be omitted in the calculation, implementations often use a forwardbackward iteration to calculate the individual messages [6]. A similar approach, which does not require any forward-backward iterations has been presented in [2]. The basic idea of the complexity reduction techniques presented so far is to make an approximation of the correction factor log ( +e x, either by using look-up tables [3, 6, 2] or by piece-wise linear interpolation [6, 3]. The memory overhead incurred by look-up tables can be expected to be negligible for future practical implementation, since the number of table entries is usually very low. For interpolation based approaches, using powers of 2 for the slope of any linear interpolation segment obviously facilitates implementation. Both approached can be expected to yield a more or less comparable reduction in check node complexity, as the proposed approximations require only few simple operations (like bit-shift, compare, etc.. Careful parameter design enables almost retaining the original error correction performance (cf. e.g. [3]. Observe from the relations in (5 that the term in (4 is clearly dominated by the smallest factor Q i,j. This motivates for the introduction of the Min-Sum Algorithm (MSA, where the calculations in the check nodes are approximated by taking only into account the incoming message with the lowest reliability: R j,i = sign ( Q i,j min Q i,j (6 The performance loss resulting from this approximation is depicted in Figure 2 and the expected complexity reduction is discussed in Section 6. Considering the above statements, the significant complexity reduction when using the min-sum-algorithm becomes evident: one needs only to calculate sign ( Q i,j, find the two smallest values among Q i,j, and can then send out the same message to all adjacent variable nodes (save the one which sent the minimum Q i,j. Hence, when using min-sum decoding, the CND needs only to perform very basic arithmetic operations and attempts to further reduce check node complexity can be expected not to yield substantial benefits. 4 Forced Convergence Forced convergence (FC takes another approach to reducing decoding complexity by exploiting the fact that a large number of variable nodes converges to a strong belief after very few iterations, i.e., these bits have already been reliably decoded and we can skip updating their messages in subsequent iterations. In order to identify such nodes, we define the aggregate messages B i for each variable node and C j for each check node. Checking these values against the thresholds t v and t c, respectively, allows for identification of converged nodes at almost zero overhead. An equivalent representation of (4 proposed in [5] facilitates the calculation of C j for the check node messages: R j,i = where Φ( is defined as sgn ( ( Q i,j Φ Φ ( Q i,j (7 Φ(x = log ex + e x, x >. (8 The transfer function Φ( is depicted in Figure 4. Based on (2 and (7 we can now define the aggregate messages for variable and check nodes as follows: B i = F i + R j,i C j = Φ ( Q i,j, (9 where B i and Φ(C j are the confidences the respective nodes to be in state or. Note that based on C j, calculating the individual check node messages only requires building the product sgn ( Q i,j, as well as one multiplication (for the sign, this is equivalent to division, one subtraction and one calculation of Φ( for each outgoing edge. Whenever B i > t v or C j < t c we deactivate the node for the following iterations, i.e., no longer update the messages it sends to its neighboring nodes. Note that t c is an upper bound since it operates on the sum before applying the transform Φ. The above approach is easily extended to min-sum decoding, where the threshold t c at the check nodes can then be used equivalently as a lower bound operating on Φ( C j = min Q i,j. Choosing the thresholds t v and t c appropriately thus allows us to trade computational complexity for decoding performance. To avoid freezing nodes that have converged to a wrong decision, check nodes that do not fulfill their parity check during tentative decoding are reactivated, as well as the connected variable nodes. For a practical implementation, one may store a vector containing the indices of the active nodes to avoid checking during message passing at each node whether it is still active, or not. Figure 3 shows the performance of forced convergence decoding in conjunction with MPA for the regular LDPCC, and MSA for the irregular LDPCC. It is easily seen that by choosing the thresholds high enough, one can retain error correction performance within.db of the original result, at a target block error rate of 2 which appears to be reasonable in current wireless systems employing ARQ mechanisms. For minsum decoding, the forced convergence approach even slightly outperforms the MSA result for a threshold of t v = t c = 5. Similar results have been obtained when

4 FER 2 3 Reg. LDPCC (MPA MPA MPA, FC (t v = 3, t c =.5 MPA, FC (t v = 4, t c =.2 MSA MSA, FC (t v =t c =3 MSA, FC (t v =t c =5 MPA (Φ 3, FC (t c Irreg. LDPCC (MSA E /N [db] b Figure 3: Performance of forced convergence LDPC decoding in comparison to standard LDPC decoding, in terms of FER over E b /N. Choosing convergence thresholds appropriately allows for almost retaining original decoding performance. Choosing thresholds too low quickly leads to error floors. combining forced convergence with other settings, e.g., message passing decoding of the irregular LDPCC, and min-sum decoding of the regular LDPCC (not shown. It is, however, apparent that decoding performance depends crucially on the correct selection of t c and t v for the specific code, and it can be expected that these values have to be carefully chosen in environments with varying channel statistics, i.e., Rayleigh fading instead of AWGN channel. A conservative choice of the thresholds might still yield good results in such environments. This topic should be addressed in further work. 4. Combination with Check Node Complexity Reduction Techniques As for the approaches based on calculating (4 or (5, the main complexity during message passing lies in the CND, where calculating the outgoing messages requires repeated evaluation of the non-linear function Φ(. Φ n (x Φ (x Φ 2 (x Φ 3 (x Φ(x x Figure 4: The transfer function Φ(x used in check node calculations. Various piecewise linear approximations used throughout this paper are plotted for comparison. Following the propositions from [6, 3] we employ the piece-wise linear interpolation functions Φ i using i segments (cf. Figure 4. Observe that all approximations have to fulfill the symmetry condition Φ i (Φ i (x = x of the original Φ(. Figure 5 illustrates that performance close to real message passing can be achieved by using 3 linear interpolation segments. Check node complexity can thus be reduced by about roughly 5%, depending on the specific implementation architecture. FER 2 Exact MPA Irr. LDPCC, MPA(Φ Irr. LDPCC, MSA Irr. LDPCC, MPA(Φ Irr. LDPCC, MPA(Φ 2 Irr. LDPCC, MPA(Φ 3 MSA E b /N [db] Figure 5: Frame error performance of the irregular LDPCC when using different approximations of the transfer function Φ. By using 3 interpolation segments the original message passing performance can almost be attained. An interesting combination of forced convergence decoding and check node complexity reduction techniques has also been evaluated and its performance is depicted in Figure 3. Since the main complexity lies in the CND anyway, we let all variable nodes remain active during the whole decoding process, e.g., by choosing t v extremely large or even deactivating this functionality. At the same time, note that Φ,...,3 (x =, for x sufficiently large. If now t c is chosen, the forced convergence decoder will only deactivate check nodes for which all incoming messages exceed a certain threshold (cf. Figure 4. It is intuitively clear that the performance loss now resulting from deactivating the considered node should be quite low, as the output of the check node would not change anyway, even if the incoming messages Q i,j would rise further in magnitude. This notion is confirmed by our results (cf. Figure 3. Time did unfortunately not allow for extensive optimizations one would expect that the error floor present in the current setting could be further lowered, should a lower target FER be required. 5 EXIT Chart Analysis Figure 6 shows the EXIT chart of the irregular LDPCC. Observe how using Φ(x (dashed curve, Φ (x and Φ 3 (x affects the transfer characteristic of the check node decoder. The curve for the variable nodes (shown for.7 db remains unchanged. The curves were generated by feeding the variable/check node decoder with an Gaussian source of appropriate variance to model the a-priori information, and measuring the ex-

5 trinsic information at the output using the binary entropy function. I E,VND, I A,CND,8,6,4,2 VND (.7dB CND (Φ CND (Φ CND (Φ I, I A,VND E,CND.8 using EXIT chart analysis is clearly an interesting path for further research. Figure 7 shows the EXIT chart of the irregular LDPCC when using min-sum decoding, for E b /N =.3dB. The check node curve is significantly lowered by this modification (cf. Figure 6, however, the Gaussian assumption for the distribution of the extrinsic messages sent to the variable nodes does no longer seem to be a good approximation, as decoding fails although the tunnel is wide open. We therefore resorted to using the average mutual information at the output of the VND and CND, averaged over a high number of decoding trajectories to create the variable node decoder transfer curve. It can now be seen how using the minsum approach narrows the tunnel it would be hence advantageous to work with a higher number of maximum iterations when using the MSA for decoding. Figure 6: Extrinsic information transfer chart of the irregular LDPCC when using different approximations for Φ(x. Note how the check node curve is pushed upwards, closing the tunnel for the decoding trajectory at high extrinsic information values..96 Our simulation results (for exact message passing match with the analytical results presented in [8], which are based on the assumption of Gaussian distributed input messages (a subset of these results is given in the appendix, for completeness. Upper and lower bounds on the transfer functions without using the Gaussian approximation have been derived in [7, 8]. It is clearly visible how using Φ (x closes the tunnel for the decoding trajectory at a level of I E,CND.65, which is insufficient for successful decoding and explains the observed error floor. Using Φ 3 (x, the tunnel closes only at I A,CND, I E,VND VND, MPA CND, MPA CND, MPA, FC, t c =.2 VND, MPA, FC, t v =4. CND, MPA, FC, t c =.5 VND, MPA, FC, t =3. v I, I A,VND E,CND I E,VND, I A,CND CND VND,.3 db (Gaussian VND,.3 db (Envelope I A,VND, I E,CND Figure 7: Extrinsic information transfer chart of the irregular LDPCC under MSA decoding. The envelope of several decoding trajectories reveals how the decoding tunnel is narrowed when using this approximation. I E,CND.82, which appears to be a sufficiently high level of extrinsic information. Optimizing Φ i further by Figure 8: Extrinsic information transfer chart of the regular LDPCC when using forced convergence decoding (E b /N =.7dB. The deactivation of nodes closes the decoding tunnel for high values of extrinsic information and may thus prevent successful decoding. Finally, Figure 8 shows the impact of forced convergence decoding on the EXIT chart of the regular LDPCC. The curves for variable and check node decoder remain largely unchanged (solid lines, again created by averaging over decoding trajectories, save for the upper right part of the EXIT chart. Deactivating the nodes and thus limiting the magnitude of the exchanged L-values obviously limits the extrinsic information exchanged and thus closes the decoding tunnel at high values which explains the observed error floors. On the other hand, since decoding has largely converged at such high amount of extrinsic information, the number of bit error per block is very low. We are currently investigating how this property can be exploited to suppress the observed error floors.

6 6 Complexity Assessment Summarizing the statements in the previous section, it is now possible to calculate the node complexity of the different LDPC decoder architectures compared in this paper. For the following, let γ v, γ c and γ d denote the number of operations required to calculate the messages at one variable and check node, respectively, as well as the complexity of tentative decoding per check node. γ t [,] corresponds to the overhead incurred whenever using the forced convergence technique: it represents the additional complexity of checking a value against a threshold (CND,VND or reactivating a check node (tentative decoding. γ v γ c,mpa γ c,msa Operations per node 2d v (5 + 2c Φ d c 5d c γ d 2d c + 2 Table : Operations required per variable/check node for decoding an LDPCC under message passing and minsum decoding. Table summarizes the operations per node required for LDPC decoding. Here, d c and d v are the (average check and variable node degrees, respectively, and c Φ is the relative complexity of calculating Φ(, in operations. Establish meaningful figures for the total decoding complexity is difficult since they depend largely on the chosen implementation architecture. Processors can usually be optimized to meet specific delay requirements (i.e., number of cycles per operation even for more complex operations, at the expense of larger chip area and higher energy consumption. However, apart from Φ(, all operations required for LDPCC decoding are very simple arithmetic operators (such as addition, multiplication with ±, compare, abs, sign, etc. for which it is reasonable to assume that they are all of comparable complexity in terms of chip area, cycle count, and energy consumption. In the following, we assume c Φ = as the complexity for calculating the accurate Φ(x, relative to a simple arithmetic operator. Non-linear functions (such as division, square root are usually implemented using iterative approximations with a low number of iterations (somewhere below. c Φ = is therefore probably a somewhat pessimistic choice in terms of required cycle count, but rather optimistic in terms of energy consumption (e.g. when the iterations require complex operations like multiplications. We further assume that c Φ = 5 for calculating Φ 3 (x. This figure is motivated by an average of 2 comparisons, one subtraction, one bit-shift (we chose the slope of all linear segments of Φ i to be a power of 2 to facilitates implementation, and one assignment required to calculate the output. For our considered codes we set d c = 6 and d v = 3 as stated in the introduction. The above stated complexity figures have to be multiplied with the number of active nodes (or the number of check nodes, for the tentative decoding step to obtain the complexity per iteration step. Taking the sum over all iterations and dividing by the difference between the number of variable and check nodes yields the total complexity per received information bit, which we denote as: where Θ D = Θ V ND + Θ CND + Θ TD, ( Θ V ND = i Θ CND = i Θ TD = i n v,i (γ v + γ t N v N c ( n c,i (γ c + γ t N v N c (2 N c Pr(N i >= i(γ d + γ t N v N c (3 N c, N v and N i are the numbers of check nodes, variable nodes, and iterations, respectively; n v,i and n c,i is the average number of active variable/check nodes at iteration step i. Thus, the complexity figure Θ D denotes the number of operations involved in decoding a single information bit. It obviously is a function of the average number of iterations and hence of the signal-to-noise ratio. Ratio of active nodes [%] Forced Convergence Irreg. LDPCC, MSA, t v =t c =5 Irreg. LDPCC, MSA Reg. LDPCC, MPA, t v =4, t c =.2 Reg. LDPCC, MPA Exact MSA Exact MPA Iteration Figure 9: Average ratio of active variable nodes during LDPC decoding, for the regular LDPCC employing message passing decoding and a maximum number of 4 iterations, and the irregular LDPCC using the min-sum algorithm and a maximum of 2 iterations. It is clearly visible how the forced convergence approach reduces the number of active nodes. Results for check nodes are similar (not shown. One active node profile illustrating the variation of n c,i with the number of iterations is depicted in Figure 9. The target FER was set to 2, corresponding to E b /N = 2dB for min-sum decoding and the irregular LDPCC, and E b /N =.7dB for message passing and the regular LDPCC. The curves show the ratio of average active variable nodes to all variable nodes (N v = 4 for the regular, N v = 532 for the irregular LDPCC and include the fact that the number of iterations in LDPC decoding is a random event. That is, the curves represent the product of two factors: the number of active variable nodes in a certain iteration and the

7 probability of this iteration being required to decode the codeword. The graph nicely illustrates how complexity is reduced via forced convergence in the regime of interest. The average number of active nodes decays very fast as we introduce the threshold t v and t c to deactivate nodes. However, the curves for FC finally converge with the curves for standard LDPC decoding, which is a clear indicator that the average number of iterations is essentially unaffected, which was confirmed by our simulation results. The error floor in the curves for standard decoding is obviously equivalent to the FER. Having obtained the necessary statistics on the average number of active nodes, we can proceed to calculate the mean complexity of the different decoder implementations, in the respective regimes of interest at (E b /N.7 db for message passing, E b /N 2dB for min-sum decoding. By determining Θ D, the expected complexity reduction can now be easily calculated: Operations per information bit MPA, Regular LDPCC Φ Φ 3 Φ, FC Φ 3, FC Θ V ND Reduction 8% % Θ CND Reduction 35% 22% 45% Θ TD Sum Reduction 29% 8% 36% Table 2: Operations required for decoding a single information bit with the regular LDPCC under message passing, at E b /N =.7dB. For FC decoding the thresholds are t c =.2,t v = 4 when using Φ and t c,t v for use with Φ 3. Operations per information bit MSA, Irregular LDPCC MSA MSA (FC Θ V ND 6 9 Reduction 32% Θ CND Reduction 26% Θ TD 7 95 Sum Reduction 8% Table 3: Operations required for decoding a single information bit with the irregular LDPCC under min-sum decoding, at E b /N = 2.dB. For FC decoding the thresholds are t c = t v = 5. We see that a 2% reduction in decoding complexity can be achieved while almost retaining the original error performance, if we introduce forced convergence decoding, for message passing as well as min-sum decoding, at a target FER of 2. Approximating Φ can provide an even higher reduction (up to 29% and combining the two approaches reduces decoding complexity by 36% under the taken assumptions for the complexity of calculating Φ. Note that as a result, only 5 operations are required for MPA decoding of the regular LDPCC which is roughly twice the MSA complexity (also for the regular LDPCC, results not shown while a considerably lower performance loss is incurred. The complexity of different decoding algorithms for PCCC and CC has been characterized in [4]. Based on these figures, we can establish the complexity for decoding of the PCCC and CC considered for performance comparison with the LDPCC investigated in this paper. Code Complexity PCCC (m=2, logmap, 4 it. 22 PCCC (m=2, maxlogmap, 4 it. 66 CC (m=8, SOVA 865 Table 4: Operations required for decoding a single information bit when using PCCC or CC. Using CC for forward error correction appears to be quite unattractive for the considered block lengths, since decoding complexity is higher than that of the LDPCC under min-sum decoding or the PCCC under maxlogmap decoding with 4 iterations, while the error correction performance is quite low compared to the capacity-approaching codes. The decoding complexity for the PCCC is comparable to that of LDPCC, with similar performance-complexity trade-offs. It is important to keep in mind that we considered the average decoding complexity of LDPCC the maximum decoding complexity is obviously determined by the maximum number of decoder iterations and can be somewhat higher than that of a PCCC of comparable performance. 7 Conclusion We compared several approaches for reducing the complexity of LDPC decoding, namely, min-sum decoding, the approximation of non-linear transfer functions in message passing decoding, and the forced convergence approach. Dwelling on the notion that a large number of nodes converges very fast in the message passing process, the latter uses a threshold rule to identify nodes that already have converged to a final decision. These nodes are deactivated and their respective messages no longer updated resulting in reduced decoding complexity. We have shown that by appropriate selection of the threshold, error performance may be retained and complexity be lowered by around 2 % for two exemplary LDPCC at a target FER of 2, for both message passing and min-sum decoding. We also showed that a combination of forced convergence with other complexity reduction techniques is feasible. In fact, we believe that the latter approach to use a piece-wise linear approximation for Φ and deactivate only check nodes is a very interesting path for further investigation. Joint optimization of these two approaches with the help of EXIT chart analysis constitutes an interesting path for further research that could yield substantial complexity reduction at very low deterioration in bit error performance.

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