PD-94583B AHV28XX SERIES HYBRID-HIGH RELIABILITY DC-DC CONVERTER. Description AHV. 28V Input, Single, Dual and Triple Output. Features.

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1 PD-9583B HYBRID-HIGH RELIABILITY DC-DC CONERTER AH28XX SERIES 28, Single, Dual and Triple Output Description The AH Series of DC-DC converters are designed to replace the AHE/ATO family of converters in applications requiring compliance to MIL-STD-A through E, in particular the input surge requirement of 80 specified to withstand transient input voltage of 80. No input voltage or output power derating is necessary over the full military temperature range. These converters are packaged in an extremely rugged, low profile package that meets all requirements of MIL- STD-883 and MIL-PRF Parallel seam weld sealing and the use of ceramic pin feed thru seals assure long term hermeticity after exposure to extended temperature cycling. The basic circuit is a push-pull forward topology using power MOSFET switches. The nominal switching frequency is 0kHz. A unique current injection circuit assures current balancing in the power switches. All AH series converters use a single stage LC input filter to attenuate input ripple current. A low power.5 series regulator provides power to an epitaxial CMOS custom pulse width modulator integrated circuit. This single integrated circuit provides all PM primary circuit functions. Power is transferred from primary to secondary through a ferrite core power transformer. An error voltage signal is generated by comparing a highly stable reference voltage with the converter output voltage and drives the PM through a unique wideband magnetic feedback circuit. This proprietary feedback circuit provides an extremely wide bandwidth, high gain control loop, with high phase margin. The feedback control loop gain is insensitive to temperature, radiation, aging, and variations in manufacturing. The transfer function of the feedback circuit is a function of the feedback transformer turns ratio which cannot change when subjected to environmental extremes. Features AH n 80 Transient (0 ec max.) n DC (Continous) n 6 to 0DC Range n Single, Dual and Triple Outputs n 5 Output Power (No Temperature Derating) n Low / Output Noise n Full Military Temperature Range n ideband PM Control Loop n Magnetic Feedback n Low Profile Hermetic Package (0.05 ) n Short Circuit and Overload Protection n Constant Switching Frequency (0kHz) n True Hermetic Package (Parallel Seam elded, Ceramic Pin Feedthru) n Standard Microcircuit Drawings Available Manufactured in a facility fully qualified to MIL-PRF-3853, these converters are fabricated utilizing DLA qualified processes. For available screening options, refer to device screening table in the data sheet. ariations in electrical, mechanical and screening can be accommodated. Contact IR San Jose for special requirements. 0//5

2 Specifications (Single Output Models) T CASE = -55 C to +25 C, IN = +28 ± 5% unless otherwise specified Absolute imum Ratings voltage -0.5 to +DC (Continous), 80 (0 ec) Power output Internally limited, 7.5 typical Soldering temperature 300 C for seconds ( pin at a time) Operating case temperature -55 C to +25 C Storage case temperature -65 C to +35 C TEST SYMBOL Condition -55 C T C +25 C, IN = 28 DC ±5%, C L=0, unless otherwise specified Group A AH2805S AH282S AH285S Subgroups Min Min Min Units STATIC OUTPUT OUT IN = 6, 28, and 0 DC oltage I OUT = Current I OUT IN = 6, 28, and 0 DC A Ripple oltage RIP IN = 6, 28, and 0 DC mp-p B = DC to MHz Power P OUT IN = 6, 28, and 0 DC REGULATION Line Load RLINE RLOAD IN = 6, 28, and 0 DC I OUT = 0, half load and full load IN = 6, 28, and 0 DC I OUT = 0, half load and full load INPUT Current Ripple Current I IN I RIP I OUT = 0, Inhibit (pin 2) = 0 I OUT = 0, Inhibit (pin 2) = Open I OUT = Full load, p-p EFFICIENCY E FF I OUT = Full Load % T C = +25 C ISOLATION ISO to output or any pin to case (except pin 8) at 0 DC MΩ Capacitive Load C L No effect on DC performance µf Load Fault Power Dissipation P D Overload, 8,5 Short Circuit, Switching Frequency F S I OUT = Full Load KHz DYNAMIC Step Load Changes Output Transient 5 Recovery 5,6 Step Line Changes Output Transient Recovery OT LOAD TT LOAD OT LINE TT LINE % Load 35 0% Load No Load 35 % % Load 35 0% No Load 335 % Load % Load 335 No lload step 6 to 0 DC 3,7 step 0 to 6 DC 3,7 step 6 to 0 DC 3,6,7 step 0 to 6 DC 3,6,7 TURN-ON Overshoot Delay Ton os T on D I OUT = OA and Full Load I OUT = O and Full Load 8,5,6,5, Load Fault Recovery TR LF IN = 6 to 0 DC,5,6 Notes to Specifications (Single Output Models). Bandwidth guaranteed by design. Tested for 20kHz to 2MHz. 2. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability but will interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on. 3. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter shall be guaranteed to the limits specified.. An overload is that condition with a load in excess of the rated load but less than necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 5. Load step transition time between 2 to. 6. Recovery time is measured from the initiation of the transient to where OUT has returned to within ±% of OUT at % load. 7. step transition time between 2 and. 8. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhinbit pin (pin 2) while power is applied to the input. Above 25 C case temperature, derate output power linearly to 0 at 35 C case m

3 Specifications (Dual Output Models) T CASE = -55 C to +25 C, IN = +28 ± 5% unless otherwise specified Absolute imum Ratings voltage -0.5 to +DC (Continous), 80 (0 ec) Power output Internally limited, 7.5 typical Soldering temperature 300 C for seconds ( pin at a time) Operating case temperature -55 C to +25 C Storage case temperature -65 C to +35 C TEST SYMBOL Condition -55 C T C +25 C, IN = 28 DC ±5%, C L=0, unless otherwise specified Group A Subgroups AH2805D AH282D AH285D Min Min Min Units STATIC OUTPUT oltage OUT I OUT = 0 ±.95 ±.90 ±5 ±5. ±.88 ±.76 ±2.2 ±2.2 ±.85 ±. ±5.5 ±5.30 Current,2 IOUT IN = 6, 28, and 0 DC 0.0 ± 0.0 ± ±0 Ripple oltage,3 RIP IN = 6, 28, and 0 DC mp-p B = DC to 2 MHz Power,2, P OUT IN = 6, 28, and 0 DC REGULATION Line,5 Load INPUT Current Ripple Current 3 RLINE I OUT RLOAD I IN IRIP IN = 6, 28, and 0 DC I OUT = 0, half load and full load IN = 6, 28, and 0 DC IOUT = 0, half load and full load I OUT = 0, Inhibit (pin 2) Tied to input return (pin ) IOUT = 0, Inhibit (pin 2) = Open IOUT = Full load B = DC to 2MHz, EFFICIENCY EFF IOUT = Full Load % T C = +25 C ISOLATION ISO to output or any pin to case (except pin 8) at 0 DC, MΩ Capacitive Load 6,7 CL No effect on DC performance µf Load Fault Power Dissipation PD Overload, 8 8,5 Short Circuit, Switching Frequency FS IOUT = Full Load khz DYNAMIC Step Load Changes Output Transient 9 OTLOAD Recovery 9, Step Line Changes Output Transient 7, Recovery 7,, TT LOAD OTLINE TTLINE % Load 35 0% Load No Load 35 % % Load 35 0% No Load 335 % Load % Load 335 No lload step 6 to 0 DC step 0 to 6 DC step 6 to 0 DC step 0 to 6 DC TURN-ON Overshoot Delay,2 Ton OS T on D I OUT = O and Full Load IOUT = O and Full Load,5,6,5, Load Fault Recovery 7 TRLF,5, m p-p For Notes to Specifications, refer to page 5 3

4 Specifications (Triple Output Models) T CASE = -55 C to +25 C, IN = +28 ± 5% unless otherwise specified Absolute imum Ratings voltage -0.5 to +DC (Continous), 80 (0 ec) Power output Internally limited, 7.5 typical Soldering temperature 300 C for seconds ( pin at a time) Operating case temperature -55 C to +25 C Storage case temperature -65 C to +35 C TEST SYMBOL Condition -55 C T C +25 C, IN = 28 DC ±5%, CL=0, unless otherwise specified Group A Subgroups AH282T AH285T Min Min Units STATIC OUTPUT oltage OUT IOUT = 0 (main) IOUT = 0 (dual) ±.88 ± ±2.2 ± ±.85 ± ±5.5 ±5.30 Current I OUT IN = 6, 28, and 0 DC (main) Ripple oltage, RIP IN = 6, 28, and 0 DC (dual) IN = 6, 28, and 0 DC B = DC to 2 MHz (main) IN = 6, 28, and 0 DC B = DC to 2 MHz (main) Power POUT IN = 6, 28, and 0 DC (main) (+dual) (-dual) (total) REGULATION Line,3 R LINE IN = 6, 28, and 0 DC I OUT = 0, %, and 0% load (main) IOUT = 0, %, and 0% load (dual) Load,3 RLOAD IN = 6, 28, and 0 DC I OUT = 0, %, and 0% load (main) I OUT = 0, %, and 0% load (dual) 0.0 ± ±67 80 mp-p 0 0 Mp-p ±60 ± ±75 ±75 m INPUT Current Ripple Current IIN I RIP IOUT = 0, Inhibit (pin 8) Tied to input return (pin ) IOUT = 0 Inhibit (pin 2) = open I OUT = 2000 (main) I OUT = ±208 (±2) I OUT = ±67 (±5) B = DC to 2MHz EFFICIENCY E FF I OUT = 2000 (main) IOUT = ±208 (±2) I OUT = ±67 (±5) ISOLATION ISO to output or any pin to case (except pin 7) at 0 DC, Capacitive Load 6,7 CL No effect on DC performance (main) (dual) Load Fault Power Dissipation 3 P D Overload, 5 Short Circuit, Switching Frequency F S I OUT = 2000 (main) I OUT = ±208 (±2) I OUT = ±67 (±5) 5 5 p-p % 0 0 MΩ KHz µf For Notes to Specifications, refer to page 5

5 Specifications (Triple Output Models) - continued TEST DYNAMIC Step Load Changes Output Transient 9 Recovery 9, Step Line Changes Output Transient Recovery 7,, SYMBOL OTLOAD TTLOAD OTLINE TTLINE Condition -55 C T C +25 C, IN = 28 DC ±5%, C L=0, unless otherwise specified % Load 35 0% Load No Load 35 % % Load 35 0% No Load 335 % Load % Load 335 No lload step 6 to 0 DC step 0 to 6 DC step 6 to 0 DC step 0 to 6 DC AH28XX Series Group A Subgroups AH282T AH285T Min Min Units TURN-ON Overshoot Delay,2 TonOS T on D IOUT = o and ±625 IOUT = o and ± Load Fault Recovery 7 TRLF Notes to Specifications (Triple Output Models). Tested at each output. 2. Parameter guaranteed by line and load regulation tests. 3. At least 25% of the total power should be taken from the (+5) main output.. Bandwidth guaranteed by design. Tested for 20kHz to 2MHz. 5. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on. 7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits specified. 8. Above 25 C case temperature, derate output power linearly to 0 at 35 C case. 9. Load step transition time between 2 and.. Recovery time is measured from the initiation of the transient to where OUT has returned to within ±% of OUT at % load.. step transition time between 2 and. 2. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit pin (pin 8) while power is applied to the input. Notes to Specifications (Dual Output Models). Tested at each output. 2. Parameter guaranteed by line and load regulation tests. 3. Bandwidth guaranteed by design. Tested for 20kHz to 2MHz.. Total power at both outputs. 5. hen operating with unbalanced loads, at least 25% of the load must be on the positive output to maintain regulation. 6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on. 7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits specified. 8. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 9. Load step transition time between 2 and.. Recovery time is measured from the initiation of the transient to where OUT has returned to within ±% of OUT at % load.. step transition time between 2 and. 2. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit pin (pin 2) while power is applied to the input. 3. Above 25 C case temperature, derate output power linearly to 0 at 35 C. 5

6 Application Information Inhibit Function Connecting the inhibit pin (Pin 2 of single and dual models, pin 8 of triple models) to the input return (pin ) will cause the converter to shutdown and operate in a low power standby mode. Power consumption in this mode is calculated by multiplying in times the input current inhibited, typically 225m at in equal to 28. The input current inhibited is relatively constant with changes in in. The open circuit inhibit pin voltage is typically.5 and can be conveniently driven by an open collector driver. An internal pull-up resistor enables the user to leave this pin floating if the inhibit function is not used in their particular application. All models use identical inhibit internal circuits. Forcing inhibit pin to any voltage between 0 and 6 will assure the converter is inhibited. The input current to this pin is 0µA maximum at pin2 = to 0. The converter can be turned on by opening Pin 2 or forcing a voltage from to. Inhibit pin current from to is less than ± µa. EMI Filter An optional EMI filter ( AFC6) will reduce the input ripple current to levels below the limits imposed by MIL-STD- 6 CEO3. The output voltage of the AH28XXS can be adjusted upward by connecting a resistor between the Output Adjust (Pin 3) and the Output Common (Pin ) as shown in Table. Table : Output Adjustment Resistor alues * Resistance (Oh) Output oltage Increase (%) Pin 3 to None K +.0% +.6% +.7% 5 K +2.0% +3.2% +3.% 63 K +3.% +.9% +5.% 22 K +.% +6.5% +6.8% 0 +% +7.9% +8.3% * Output Adjust (Single Output Models Only) Standard Microcircuit Drawing Equivalence Table Standard Microcircuit endor Cage IR Standard Drawing Number Code Part Number AH2805S AH282S AH285S AH282D AH282T AH285T 6

7 Figure. (Single Output) Block Diagram 5 +out + EMI Filter Output 8 Case 2 Enable Drive Pulse idth Modulator FB Drive 2 Error Amp & Ref 3 ADJ Figure 2. (Dual Output) Block Diagram 3 +out + EMI Filter Output 2 Enable 8 Case Drive Pulse idth Modulator FB Drive 2 Error Amp & Reference Regulator 5 -out Figure 3. (Triple Output) Block Diagram 5 +out Regulator + Enable 8 7 Case EMI Filter Drive Pulse Drive 2 idth Modulator FB Error Amp & Reference -out out Output 7

8 Mechnical Outlines Single and Dual Output Model 0.0 Typical D X 0.26 L Pins X 0.00 = Ø Holes Typical Triple Output Model Pin Designation Pin # Single Output Dual Output Triple Output Enable Enable + 5DC Output 3 Output Adjust * + Output Output Output Output - Dual Output (2/5DC) 5 + Output - Output + Dual Output (2/5DC) 6 NC NC NC 7 NC NC Case Ground 8 Case Ground Case Ground Enable 9 NC NC NC * Output Adjust (Single Output Models Only) 8

9 Device Screening Requirement MIL-STD-883 Method No Suffix ES d HB CH Temperature Range -20 C to +85 C -55 C to +25 C e -55 C to +25 C -55 C to +25 C Element Evaluation MIL-PRF-3853 N/A N/A N/A Class H Non-Destructive Bond Pull 2023 N/A N/A N/A N/A Internal isual 207 c Yes Yes Yes Temperature Cycle N/A Cond B Cond C Cond C Constant Acceleration 200, Y Axis N/A 0 Gs 3000 Gs 3000 Gs PIND 2020 N/A N/A N/A N/A Burn-In 5 N/A 8 hrs@hi temp 60 hrs@25 C 60 hrs@25 C Final Electrical MIL-PRF C 25 C d -55 C, +25 C, -55 C, +25 C, ( Group A ) & Specification +25 C +25 C PDA MIL-PRF-3853 N/A N/A N/A % Seal, Fine and Gross Cond A Cond A, C Cond A, C Cond A, C Radiographic 202 N/A N/A N/A N/A External isual 2009 c Yes Yes Yes Notes: Best commercial practice Sample tests at low and high temperatures ƒ -55 C to +5 C for AHE, ATO, AT Model oltage Nominal 28 = 28 Output oltage Part Numbering AH 28 5 T F /CH Single 05 = 5, 2 =2, 5 =5 Dual 05 = ±5,2 = ±2, 5 = ±5 Triple 2 = 5, ±2 5 = 5, ±5 Screening Level (Please refer to Screening Table) No Suffix, ES, HB, CH Package Style F = Flange Output S = Single D = Dual T = Triple ORLD HEADQUARTERS: N Sepulveda Blvd, El Segundo, California 9025, Tel: (3) IR SAN JOSE: 2520Junction Avenue, San Jose, California 953, Tel: (08) 3-00 isit us at for sales contact information. Data and specifications subject to change without notice. 0/