ANALYSIS AND IMPLEMENTATION OF AN INTEGRATED SEPIC-FORWARD CONVERTER FOR PHOTOVOLTAIC-BASED LIGHT EMITTING DIODE LIGHTING

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1 Volume 119 No , ISSN: (on-line version) url: ijpam.eu ANALYSIS AND IMPLEMENTATION OF AN INTEGRATED SEPIC-FORWARD CONVERTER FOR PHOTOVOLTAIC-BASED LIGHT EMITTING DIODE LIGHTING Dr.S.P.Vijayaragavan 1, Dr.S. Prakash 2 Professor 1 2, Department of EEE, BIST, BIHER, Bharath University, Chennai. vijayaragavan.eee@bharathuniv.ac.in Abstract: This study presents an integrated sepic-forward converter for photovoltaic (PV)-based light emitting diode (LED) lighting system. In the proposed converter, the sepic converter is used to deliver the solar energy via PV cell modules to battery bank in charging mode during the daytime. During the nighttime, the soft switching forward converter is adopted to drive LED lighting system in discharging mode. Power switches of sepic and soft switching forward converters are integrated to reduce the component count and the synchronous switch technique is used in the circuit to reduce the conduction losses. Thus, the smaller size, lighter weight and higher efficiency can be achieved in the proposed converter. Finally, experimental results, taken from a laboratory prototype rated at 100 W, are presented to verify the effectiveness of the proposed converter. 1.Introduction The greenhouse-effect reduction, the environmental pollution elimination and the global climate balance are very important issues in recent years. To reduce the environmental impacts because of the widespread utilization of fossil fuels, the renewable sources are developed very fast in past few years[1-5]. These renewable sources are solar, water flow, biogas, biomass, wind and so on. Combining multiple renewable sources via a common dc bus of the power converter has been widespread. Solar power is a quiet and clean way to convert the sunlight into electrical energy via the photovoltaic (PV) cells. On the other hand, it is also an important issue to save the energy demand and increase the energy efficiency[6-9]. High brightness light emitting diodes (LEDs) are becoming more widespread for the lighting applications such as automobile safety and signal lights, aircraft passenger reading lights, LED backlights, traffic signals, street lighting and so on. In street lighting applications with solar energy, the charger is adopted to convert the sunlight for storing in battery during the daytime. In the nighttime, a discharger is used to release energy in battery and drive the LED lighting system[10-12]. Normally, the power range of LED street lighting system is in the range of W. Thus the low-power dc dcconverter can be used for the charger and discharger. Since the PV voltage from solar panel is unstable, the buck boost converter or boost converter is more suitable for charger circuit. The forward converter can be used in the discharger circuit. Sepic converter with the buck and boost features is presented in. In the non-linear current control scheme is provided to sepic converter for power factor correction (PFC). The highfrequency operation in the sepic converter is desirable because of the reduction in reactive component size and cost[13-18]. In the sepic converter is operated as a charger to convert the sunlight into the electricity energy via solar panel. The conventional forward converter with hard switching results in low efficiency and high voltage and current stress on power semiconductors. The passive clamp circuit techniquecan limit the voltage stress on switch. However, the total efficiency of the converter is not greatly improved[19-24]. The active-clamp technique has been proposed to absorb the surge energy stored in the leakage inductance and suppress the voltage stress at the main switch using the auxiliary switch and clamp capacitor. Power switches can be turned on at zero voltage switching (ZVS) at the transition interval. However, the main drawbacks of the conventional twostage converter for PV-based LED lighting system are large circuit components and high cost[25-28]. This paper presents an integrated sepic-forward converter for PV-based LED lighting system. The synchronous sepic converter is used to convert the sunlight to dc power stored in battery bank during the daytime. Active-clamping forward converter is used to deliver the battery energy to drive the LED street lighting system during the nighttime. Since the synchronous switch technique is adopted in the sepic converter, the conduction losses on semiconductors are reduced[29-34]. Active-clamping technique is used in the forward converter such that the switching losses on power switches are reduced. In the adopted circuit, power switches of synchronous sepic converter and soft switching forward converters are integrated to reduce the component count. Thus, the smaller size, lighter weight and higher efficiency can be achieved in the proposed converter. The detailed operational principle and mathematical analysis are analysed. Finally, the experimental results based on a 5W prototype circuit are given to demonstrate the performance characteristics of the proposed converter[35-39]. 2 System description The conventional PV-based LED street lighting is given in Fig. 1a. During the daytime, the solar energy is stored in battery bank. The energy stored in the battery will drive the LED street lighting during the nighttime. Fig. 1b shows the 4287

2 circuit blocks of the conventional PV-based LED lighting system. The charger is used to convert the unstable dc voltage from solar panel module to charge battery bank. The discharger is adopted to deliver energy stored in battery bank to LED lighting system. Generally, the circuit of the charger is based on the buck boostconverter and the flyback or forward converter is used in the discharger circuit. Fig. 2 gives the circuit configuration of the proposed converter. S1 and S2 are electronic switches. During the daytime, S1 is in the on-state and S2 is in the off-state. The battery is charged from the input PV cell voltage by charger Circuit[40-45]. On the other hand, S1 is in the off-state and S2 is in the on-state during the nighttime. The power switches Q 1and Q 2 are operated only after one of switches S1 and S2 isturned on. That means S1 and S2 cannot be turned on at thesame time. If both S1 and S2 are turned off, then Q 1 andq 2 are both all turned off. Thus the circuit is not operatedand the battery is neither charged nor discharged. S1 isturned off during the nighttime. Therefore the input power from the PV panel is low. At the moment of S1 turn-off, a the components of Cin, L, Q 1, C1, Q 2, C2 and Lm. The Cin is used as the input buffer capacitor that will make the input voltage constant and smooth the input current. The input voltage is Vpv and the output voltage is vc2 or battery voltage VB. Power switches Q 1 and Q 2 are operated in the complementary way. The LED lighting system is driven from the battery by discharger circuit. The discharger circuit is based on the active clamping forward converter including the components of Q 1, C1, Q 2, C2, Lm, D3, D4, Lo and Co. In the ZVS forward converter, Q 2 is the main switch, Q 1 is the auxiliary switch and C1 is the clamping capacitor. Based on the clamping circuit with Q 1 and C1, switches Q 1 and Q 2 are both turned on at ZVS. Thus the circuit efficiency in the discharging state is improved. In order to reduce the circuit component, power switches in charger and discharger circuits are integrated in the proposed converter. Components Q 1, C1, Q 2, C2 and Lm are used in both Fig 2 Circuit configuration of the proposed converter for PV-based LED lighting system charger and discharger circuits. Thus the component counts in the proposed converter are less than the component counts in the conventional PV-based LED lighting system. Furthermore, the synchronous switch technique is used in the charger circuit to reduce the conduction losses and active-clamping technique is adopted in the discharger circuit to reduce the switching losses. Thus the proposed converter has higher circuit efficiency. 3 Principles of operation Figure 1 Street lighting and circuit block a PV-based LED street lighting b Circuit blocks of PV-based LED lighting system spike voltage will be observed on inductor L. However, the input current il is much lower. Thus the voltage spike does not make the serious problem in the power switches. The charger circuit is based on the sepic converter including In the system analysis of the proposed converter, the following assumptions are made. Capacitance Co, C1 and C2 are larger than Cr1 and Cr2 such that the voltages Vo, vc1 and vc2 are constant. The inductances L, Lm and Lo are greater than resonant inductance Llk. The energy stored in the resonant inductor Llk is greater than energy stored in the resonant capacitor Cr1 and Cr2 to achieve ZVS conditions for Q 1 and Q 2 in the discharging state. 3.1 Charging state (S1 on, S2 off) In the daytime, sepic converter with synchronous switch converts the unstable input voltage vpv to charge the battery bank. The sepic converter is operated in the continuous conduction mode. Q 1 and Q 2 are operated in the complementary way. Based on the on/off states of Q 1 and Q 2, there are two operation modes in the adopted sepic converter. Fig. 3 gives the equivalent circuits of two 4288

3 operating modes in a switching cycle. Fig. 4 shows the time sequence of key waveforms in one switching cycle. At time t1, main switch Q 1 is turned off and synchronous switch Q 2 is turned on. Since the inductor currents il and ip are positive, the switch current iq2 = -il - ip. The inductor currents il and ip are approximately expressed as Figure 4 Key waveforms of the synchronous sepic converter Figure 3 Operation modes of the synchronous sepic converter a Mode 1 (Q1 on, Q2 off) b Mode 2 (Q1 off, Q2 on) Mode 1 [t0 < t< t1]: In this mode, Q1 is in the on-state and Q 2 is in the offstate. The inductor voltages VL= vpv and VLm + Vlk = VC1. The input power is stored in the inductor L. The input current increases and is expressed as il(t) = il(to)+(vpv/l ) (t-to) (1) The inductor current ip is expressed as ip(t) = ip(to) + (Vc1/(Lm+Llk)) (t-to) (2) The switch currents iq1 =il + ip and iq2 = 0. This mode ends at time t1 when Q 1 is turned off. The input and output inductor currents il and ip at t = t1 = t0 + δt (δ isduty cycle of Q 1) are expressed as il(t1) = il(to) + (Vpv/L) δt (3) ip(t1) = ip(to) + (Vc1/(Lm+Llk)) δt (4) Mode 2 [t1, t, t0 + T]: il(t) = il(t1)+ ((Vpv-Vc1-VB)/L)(t-t1) (5) ip(t) = ip(t1) (VB/Lm+Llk) (t-t1) (6) Since Vpv- Vc1-VB< 0, il and ip decrease in this mode. This mode ends at time t0 + T when synchronous switch Q 2 is turned off. Then the operating mode goes to Mode1 to begin the next switching cycle. Inductor currents at time t0 + T are given as il(to+t) = il(t1) + ((Vpv-Vc1- VB)/L) (1-δ)T (7) ip(to+t) = ip(t1) (VB /(Lm+Llk)) (1- δ)t (8) In steady state, the inductor currents il and ip at time t0 and t0 + T are equal. Thus we can obtain the following equations il(to+t) = il(to) + (Vpv/L) δt +((Vpv-Vc1- VB)/L) (1-δ)T =il(to) (9) Ip(to+T)=ip(to)+(Vc1/(Lm+Llk))δT (VB /(Lm+Llk)(1-δT) =ip(to) (10) From (9) and (10), we can obtain the voltage conversion ratio of VB/Vpv and VC1/Vpv 4289

4 VB/Vpv = δ/(1-δ), Vc1/Vp1=1 (11) Thus the input voltage Vpv can be higher or lower than the battery voltage VB. The average capacitor voltage VC1 equals input voltage Vpv. The battery can be charged using the constant current scheme or constant voltage scheme during the daytime. 3.2 Discharging state (S1 off, S2 on) In the nighttime, active-clamping forward converter transfers the energy stored in battery to drive the LED lighting. Q2 is the main switch in the forward converter and Q1 and C1 represent the active-clamping circuit to absorb the surge energy due to the leakage inductance Llk such that the voltage stresses of switches are limited. The resonant capacitances Cr1 and Cr2 and leakage inductance Llk are resonant to achieve ZVS turn-on for both switches. Based on the on/off states of switches Q1 and Q2 and the rectifier diodes D3 and D4, there are eight operation modes in the adopted ZVS forward converter. Fig. 5 gives the equivalent circuits of eight operating modes in a switching cycle. Fig. 6 shows the time sequence of key waveforms in one switching cycle. Mode 1 [t0 < t < t1]: In this operating mode Q 2 and rectifier switch D3 are on. The voltage across Lm and Llk equals battery voltage VB. The primary current of transformer decreases ip(t) = -ilm(t)-id3(t)/n=-ilm(t)- ilo(t)/n (12) The output inductor current flows through the rectifier diode D3. The energy stored in battery bank is delivered to drive LED lighting through Q 2, transformer, D3, Lo and Co. This mode ends at time t1 when Q 2 is turned off. Mode 2 [t1 < t < t2]: This mode starts at time t1 when Q 2 is turned off. The diode D3 is still conducting. The primary current ip charges capacitor Cr2 from 0 to VB and discharges capacitor Cr1 from VC1 + VB to VC1. The components of Cr1, Cr2, Llk and Lm are resonant. The capacitor voltage and primary current are given as VCr1(t) = VC1 + VB cos(w1(t - t1)) +ip(t1)z1 sin(w1(t - t1)) (13) Vcr2(t) =VB[1 - cos(w1(t t1))] - ip(t1)z1 sin(w1(t - t1)) (14) Figure 5 Operation modes of the active-clamping forward converter a Mode 1 b Mode 2 c Mode 3 d Mode 4 e Mode 5 f Mode 6 g Mode 7 h Mode 8 where w1=1/ (2Cr*(Lm+Llk), Z1= (Lm+Llk)/2Cr and Cr1 ¼ Cr2 ¼ Cr. Since the capacitances Cr1 and Cr2 are smaller such that the resonant capacitor voltages. This mode ends at time t2 when capacitor voltage vcr2 equals vb. Mode 3 [t2 < t < t3]: At time t2, VCr1 = VC1 and VCr2 =VB. The primary and secondary side voltages of transformer equal zero such that the rectifier diode D3 and freewheeling diode D4 are both conducting. The diode current id3 decreases and the diode current id4 increases. The components of Cr1, Cr2 and Llk are resonant. Mode 4 [t3 <t< t4]: After time t3 the anti-parallel diode of switch Q 1 is turned on. Since iq1 is negative in this mode, Q 1 can be turned on at ZVS. In this mode, the rectifier diode current id3 decreases and freewheeling diode current id4 increases. The primary current ip increases with the slope of VC1/Llk. This mode ends at time t4 when id3 = 0. ip(t) = ip(t1) cos[w1(t - t1)] VB/Z1 *sin(w1(t - t1)) (15) 4290

5 Prat=5w, Vpv=12v, Vb=12v, f=50hz, Vd=0.5v, Switching frequency=330khz Reqdio=1.4A, reqd.vo=12v (for battery) Duty cycle Consideration: Figure 6 Key waveforms of the active-clamping forward converter Mode 5[t4<t<t5]: At time t4 the secondary side current id3=0 and id4 =ilo. The voltage across Lm and Llkequals -VC1. In this mode, the components of C1, Llk and Lm are resonant. Mode 6 [t5 <t < t6]: At time t5, Q 1 is turned off. The positive current ip charges Cr1 from 0 V to VC1 and discharges Cr2 from VC1 + VB to VB. The components of Cr1, Cr2, Llk and Lm are resonant. Mode 7 [t6 < t < t7]: At time t=t6, the capacitor voltage VCr2 = VB and primary side voltage VLm =0. The rectifier diode D3 and freewheeling diode D4 are in the commutation state. The current id3 increases and id4 decreases. The components of Cr1, Cr2 and Llk are resonant. Mode 8 [t7 < t < t0 + T]: At time t7 the capacitor voltage VCr2 = 0 and the anti-parallel diode of Q 2 is conducting. In this mode, D3 and D4 are still in the commutation mode. The current id3 increases and id4 decreases. The primary current ip decreases with the slope of- VB/Llk.. This mode ends at time t0 + T when the diode current id4 =0. Then the circuit goes to Mode 1 to begin the next switching cycle. DESIGN CONSIDERATION: (CHARGING CIRCUIT SEPIC CONVERTER) at continuous conduction mode the duty cycle is ᵟ =(Vo+Vd)/(Vin+Vout+Vd) (8+0.5)/( ) =0.346 So for switch1, ᵟ=(Ton / Ton+Toff) Ton=25us, Toff=15us Duty cycle =0.625 for switch 2, ᵞ= (Toff/Ton+Toff) ᵞ=0.375 Inductor selection: Ripple current: to allow 40% of the maximum input current. The ripple current through the inductor is il=iin*40%=iout*(vout/vin)*40% = 1.4*(12/12)*0.04 il= A Inductor value is L=ᵟT*Vpv/ il=(0.346*30)/0.33=180uh L1=L2=L=Vin/(dIL*fsw)*Dmax L=180uH The peak current for L1 IL1=Io*((Vo+Vd)/Vin)*(1+40%/2) IL1=1.89A The peak current for L2 IL2=Io*(1+(40%/2)) IL2 = A MOSFET selection: MOSFET peak current IQ1= IL1+IL2= therms current is IQ(rms)=Io* (Vo+Vin+Vd)* (Vo+Vd)/Vin^2) =1.4* ( )*(12+12)/30^2 =.184A Estimated power loss PQ1=IQ1(rms)sq*RDS(on)*Dmax *(Vin(min)+Vout)*IQ1*((Qgd*fsw)/Ig) where Qgd=conductance between gate and ground Ig=gate current (char of IRF640) PQ1=1.53^2*0.085*0.625*(12+12)*2.904*42*10^- 9*(300/1.5*10^-3) 4291

6 =0.21W Output Diode selection: Rated reverse voltage: The rated reverse voltage must be higher than Vin+Vout Vrd1=Vin+Vout Vrd1=78V So HFA08TB60 is used. SEPIC coupling capacitor selection: RMS current of cs is Ics(rms)=Io* (Vout+Vd)/Vin(min) =1.4* (12+.5)/30 Ics(rms) =0.9036A Fig 8 Input voltage waveform Ripple voltage is Vcs=(Io*Dmax)/(Cs*fw) =(1.4*0.625)/(2.2*10^-6*330*10^3) Vcs=1.2v Gate triggering voltages: Gate1: Output capacitor selection: Ico(rms)=Io* (Vo+Vd)/Vin =1.4* (12+.5) /12 Ico(rms)=1.428A Input capacitor selection: Icin(rms)= il/ 12 =0.33/ 12 Icin(rms)=0.095A SIMULATION OF CHARGING CIRCUIT( FOR vb=48v) Fig9 Gate pulse (Mosfet1) Fig7 Simulation of charging circuit Fig10 Gate pulse (Mosfet2) 4292

7 Fig 11 Output voltage with ripple Fig 14 Output current without ripple Ripples: The output voltage from the simulation is Vomax=45.24v, Vomin=44.74v Ripple voltage Vci=(max Vo-min Vo) = =0.5v Reduction in ripple voltage is depending on the proper selection of capacitor value. C1=ilm* ᵟ T/ Vci Fig12 Output voltage without ripple Here Capacitor C1=2.2uF is fixed. So depends on duty cycle the ripple voltage is minimized to get constant dc. From calculation ᵟ=0.006, Ton=39us Ripple current il=(max Io-min Io) =( ) =0.02 A Reduction in ripple current is depending on the proper selection of Inductance value. L=ᵟT* Vpv/ il Taking inductor value as constant and ripple current is minimized by duty cycle. 4.2 Discharger (ZVS forward converter) We assumed that the maximum duty cycle of Q 2 is α. The turn ratio between the transformer primary side and secondary side is expressed as Fig13 Output current with ripple Np/Ns = α(vb/vo) Here VB=12V, Vo= 260V Np/Ns=20, α= Experimental results The proposed converter shown in Fig. 2 was implemented withthe following specifications: vpv=12 V, vb=12 V, vo=260 V, io= 1.4 A and switching frequency fs¼=330 khz. The circuit parameters of power stage are the following: 4293

8 switches Q 1 and Q 2: IRF640; diodes D3 and D4: HFA08TB60; capacitance Cin = 110 mf, C1 = 2.2 mf, C2 =470 mf and Co =680 mf; transformer Np : Ns ¼ 20 : 70; inductance L =180 mh, Lm =180 mh, Llk =3 mh and Lo = 800 mh. Microcontroller 89S52, LDR Voltage regulator LM7805 Fig17Measured output waveform from proposed converter Output voltage with load =8V Output voltage without load = 260V Efficiency = Output/Input =8/12 =66.7% 6 Conclusion Fig 15 Pin Diagram for 89S52 Fig16 Voltage Regulator 7805 In the conventional PV-based LED lighting system, the buck boost or sepic converter is used to convert the unstable voltage from solar panel into the stable dc voltage and stored in the battery bank. The other isolated converter such as forward converter is used as discharger to drive the LED lighting system. Both two converters are operated with hard switching PWM scheme. Thus the circuit efficiency is lower than 66.7% in charging and discharging modes. An integrated sepic-forward converter for PVbased LED lighting system is proposed in this paper. Using the synchronous switch technique, the sepic converter can be operated in bidirectional direction. Thus the conduction losses in power semiconductors are reduced. Power switches in sepic converter are also used in the ZVS forward converter. Thus the total circuit components in the proposed integrated sepic-forward converter are reduced. Using the active-clamping technique, the power switches in the forward converter are turned on at ZVS. Thus, the turn-on switching loss on power switches is reduced. Compared with the conventional sepic-forward converter for LED lighting system, the merits of the proposed converter are high efficiency, less circuit components and ZVS PWM operation. The proposed converter can be implemented by a commercial PWM IC and an isolated gate driver. The detailed mathematical analysis and design consideration of the proposed converter are presented. Experimental results are provided to verify the effectiveness of the proposed converter. REFERENCES 1. Nimal, R.J.G.R., Hussain, J.H., Effect of deep cryogenic treatment on EN24 steel, 4294

9 Mathematics, V-116, I-17, PP , Parameswari, D., Khanaa, V., Deploying lamport clocks and linked lists, International Journal of Pharmacy and Technology, V-8, I- 3, PP , Parameswari, D., Khanaa, V., Case for massive multiplayer online role-playing games, International Journal of Pharmacy and Technology, V-8, I-3, PP , Parameswari, D., Khanaa, V., Deconstructing model checking with hueddot, International Journal of Pharmacy and Technology, V-8, I- 3, PP , Parameswari, D., Khanaa, V., The effect of self-learning epistemologies on theory, International Journal of Pharmacy and Technology, V-8, I-3, PP , Pavithra, J., Peter, M., GowthamAashirwad, K., A study on business process in IT and systems through extranet, International Journal of Pure and Applied Mathematics, V- 116, I-19, PP , Pavithra, J., Ramamoorthy, R., Satyapira Das, S., A report on evaluating the effectiveness of working capital management in googolsoft technologies, Chennai, Mathematics, V-116, I-14, PP , Pavithra, J., Thooyamani, K.P., A cram on consumer behaviour on Mahindra two wheelers in Chennai, International Journal of Pure and Applied Mathematics, V-116, I-18, PP-55-57, Pavithra, J., Thooyamani, K.P., Dkhar, K., A study on the air freight customer satisfaction, Mathematics, V-116, I-14, PP , Pavithra, J., Thooyamani, K.P., Dkhar, K., A study on the working capital management of TVS credit services limited, International Journal of Pure and Applied Mathematics, V- 116, I-14, PP , Pavithra, J., Thooyamani, K.P., Dkhar, K., A study on the analysis of financial performance with reference to Jeppiaar Cements Pvt Ltd, International Journal of Pure and Applied Mathematics, V-116, I-14, PP , Peter, M., Dayakar, P., Gupta, C., A study on employee motivation at Banalari World Cars Pvt Ltd Shillong, International Journal of Pure and Applied Mathematics, V-116, I-18, PP , Peter, M., Kausalya, R., A study on capital budgeting with reference to signware technologies, International Journal of Pure and Applied Mathematics, V-116, I-18, PP-71-74, Peter, M., Kausalya, R., Akash, R., A study on career development with reference to premheerasurgicals, International Journal of Pure and Applied Mathematics, V-116, I-14, PP , Peter, M., Kausalya, R., Mohanta, S., A study on awareness about the cost reduction and elimination of waste among employees in life line multispeciality hospital, International Journal of Pure and Applied Mathematics, V- 116, I-14, PP , Peter, M., Srinivasan, V., Vignesh, A., A study on working capital management at deccan Finance Pvt Limited Chennai, Mathematics, V-116, I-14, PP , Peter, M., Thooyamani, K.P., Srinivasan, V., A study on performance of the commodity market based on technicalanalysis, Mathematics, V-116, I-18, PP , Philomina, S., Karthik, B., Wi-Fi energy meter implementation using embedded linux in ARM 9, Middle - East Journal of Scientific Research, V-20, I-12, PP , Philomina, S., Subbulakshmi, K., Efficient wireless message transfer system, Mathematics, V-116, I-20, PP ,

10 20. Philomina, S., Subbulakshmi, K., Ignition system for vechiles on the basis of GSM, Mathematics, V-116, I-20, PP , Philomina, S., Subbulakshmi, K., Avoidance of fire accident by wireless sensor network, Mathematics, V-116, I-20, PP , Pothumani, S., Anuradha, C., Monitoring android mobiles in an industry, International Journal of Pure and Applied Mathematics, V- 116, I-20, PP , Pothumani, S., Anuradha, C., Decoy method on various environments - A survey, Mathematics, V-116, I-10, PP , Pothumani, S., Anuradha, C., Priya, N., Study on apple icloud, International Journal of Pure and Applied Mathematics, V-116, I-8, PP , Pothumani, S., Hameed Hussain, J., A novel economic framework for cloud and grid computing, International Journal of Pure and Applied Mathematics, V-116, I-13 Special Issue, PP-5-8, Pothumani, S., Hameed Hussain, J., A novel method to manage network requirements, Mathematics, V-116, I-13, PP- 9-15, Pradeep, R., Vikram, C.J., Naveenchandra, P., Experimental evaluation and finite element analysis of composite leaf spring for automotive vehicle, Middle - East Journal of Scientific Research, V-12, I-12, PP , Prakash, S., Jayalakshmi, V., Power quality improvement using matrix converter, Mathematics, V-116, I-19, PP , Prakash, S., Jayalakshmi, V., Power quality analysis & power system study in high voltage systems, International Journal of Pure and Applied Mathematics, V-116, I-19, PP-47-52, Prakash, S., Sherine, S., Control of BLDC motor powered electric vehicle using indirect vector control and sliding mode observer, Mathematics, V-116, I-19, PP , Prakesh, S., Sherine, S., Forecasting methodologies of solar resource and PV power for smart grid energy management, Mathematics, V-116, I-18, PP , Prasanna, D., Arulselvi, S., Decoupling smalltalk from rpcs in access points, Mathematics, V-116, I-16, PP- 1-4, Prasanna, D., Arulselvi, S., Exploring gigabit switches and journaling file systems, Mathematics, V-116, I-16, PP , Prasanna, D., Arulselvi, S., Collaborative configurations for wireless sensor networks systems, International Journal of Pure and Applied Mathematics, V-116, I-15 Special Issue, PP , Priya, N., Anuradha, C., Kavitha, R., Li-Fi science transmission of knowledge by way of light, International Journal of Pure and Applied Mathematics, V-116, I-9 Special Issue, PP , Priya, N., Pothumani, S., Kavitha, R., Merging of e-commerce and e-market-a novel approach, International Journal of Pure and Applied Mathematics, V-116, I-9 Special Issue, PP , Raj, R.M., Karthik, B., Effective demining based on statistical modeling for detecting thermal infrared, International Journal of Pure and Applied Mathematics, V-116, I-20, PP , Raj, R.M., Karthik, B., Energy sag mitigation for chopper, International Journal of Pure and 4296

11 Applied Mathematics, V-116, I-20 Special Issue, PP , Raj, R.M., Karthik, B., Efficient survey in CDMA system on the basis of error revealing, International Journal of Pure and Applied Mathematics, V-116, I-20 Special Issue, PP , Rajasulochana, P., Krishnamoorthy, P., Ramesh Babu, P., Datta, R., Innovative business modeling towards sustainable E- Health applications, International Journal of Pharmacy and Technology, V-4, I-4, PP , Rama, A., Nalini, C., Shanthi, E., An iris based authentication system by eye localization, International Journal of Pharmacy and Technology, V-8, I-4, PP , Rama, A., Nalini, C., Shanthi, E., Effective collaborative target tracking in wireless sensor networks, International Journal of Pharmacy and Technology, V-8, I-4, PP , Ramamoorthy, R., Kanagasabai, V., Irshad Khan, S., Budget and budgetary control, Mathematics, V-116, I-20, PP , Ramamoorthy, R., Kanagasabai, V., Jivandan, S., A study on training and development process at Vantec Logistics India Pvt Ltd, International Journal of Pure and Applied Mathematics, V-116, I-14, PP , Pradeep, R., Vikram, C.J., Naveenchandran, P., Experimental evaluation and finite element analysis of composite leaf spring for automotive vehicle, Middle - East Journal of Scientific Research, V-17, I-12, PP ,

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2 t. The output voltage of the converter can be calculated with (2) by assuming that i a is zero when ωt =

2 t. The output voltage of the converter can be calculated with (2) by assuming that i a is zero when ωt = Volume 119 No. 12 2018, 7299-7307 ISSN: 1314-3395 (on-line version) url: http://www.ijpam.eu ijpam.eu AN IMPROVED POWER FACTOR CORRECTION SYSTEM FOR THREE PHASE DIODE RECTIFIER 1 S.AARTHISURIYA, 2 S.SHRINE,

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