AMONG the various emerging applications of power electronics,

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1 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 4, APRIL High Power Density Series Resonant Inverter Using an Auxiliary Switched Capacitor Cell for Induction Heating Applications Bishwajit Saha, Student Member, IEEE, and Rae-Young Kim, Member, IEEE Abstract This paper proposes a unique topology of voltage-fed high-frequency series load resonant inverter with a lossless snubber capacitor and an auxiliary switched cell for induction heating appliances. The main objective of this paper is to demonstrate how high power density can be achieved by including a switched capacitor cell with the capacitor-clamped half-bridge zero voltage switching high-frequency inverter circuit using the PWM control scheme. The operation principle of the proposed inverter circuit is based upon an asymmetrical duty cycle pulsewidth modulated (PWM) control scheme. The operating performances of high-frequency ac regulation and power conversion efficiency characteristics are shown through experiments with their soft-switching operating ranges. Index Terms Induction heating (IH) series resonant tank, pulsewidth modulated (PWM) control scheme, switched capacitor cell, total harmonic distortion (THD). I. INTRODUCTION AMONG the various emerging applications of power electronics, induction heating (IH) plays a great role in industry and home applications. IH systems have many positive properties, including cleanliness, CO 2 less than the fossil burners, safety, high thermal efficiency [1], [3] [7]. The IH is a kind of highly efficient heat conversion system. For the same quantity of heat energy, IH cookers have 84% efficiency of energy transfer where noninduction electrical cookers achieve only 74.2% [7]. IH systems simply consist of an inverter and an IH coil and a heating object. AC current flows through the surface of a conductor and home IH systems produce heat based on eddy current and skin effect resistance of the coil and metal pots. Fig. 1(b) shows an example of high-frequency skin effect of a conductor. As can be seen, high-frequency current moves around the surface of the conductor, so it is necessary to use litz wire planar-type induction coil for utilizing whole area of the conductor. IH load functions like a transformer in which metallic pot is considered as a single turn. The induction coil and the metallic pot function Manuscript received November 20, 2012; revised January 22, 2013, March 29, 2013, and May 19, 2013; accepted May 20, Date of current version October 15, Recommended for publication by Associate Editor T. Suntio. B. Saha is with the Energy Electronics Control System Lab, Hanyang University, Seoul , Korea, and also with IUBAT, Dhaka 1230, Bangladesh ( saha.b@ieee.org). R.-Y. Kim is with the Energy Electronics Control System Lab, Hanyang University, Seoul , Korea ( rykim@hanyang.ac.kr). Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TPEL IEEE Fig. 1. (a) Block diagram of IH system. (b) High-frequency skin effect in a copper conductor for 25 khz switching frequency. as the primary and the secondary of a transformer, respectively (see Fig. 2). The greatest advantages of high-frequency IH appliances are to save energy while serving the same temperature and to take less heat loss [1], [3] [6]. In IH applications, higher switching frequency carries two benefits: reducing the components size, and higher flux density around the surface of the heating objects. Consequently, high frequency reduces the size of the converter at the same power rating. Motivated by these properties, researchers intend to extend its application to various consumer appliances. In particular, domestic IH cooker requires miniaturized, cost effective and efficient power conversion unit. The IH appliances employ a high-frequency inverter circuit: a single stage, a two stages high-frequency inverter circuit, and a high-frequency cycloconverter. These developed topologies operate on the basis of soft-commutation and quasi-resonant principles [15] [18], [21]. In the case of a two stages inverter, rectifier is replaced with a power factor correction (PFC) stage,

2 1910 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 4, APRIL 2014 Fig. 2. Basic circuit topology of the proposed soft-switching high-frequency inverter (insisted an IH load simplified model). as shown in Fig. 1(a). Not a higher harmonics only appears in the input current but some acoustic noises or flicker emissions also occur in the power stages because of high switching frequency and switching edges of switches. Hence, an electromagnetic compatibility (EMC) filter is used to prevent the input side from the noises and/or flicker emissions which are generated by the power stages. The EMC standardization has to be taken into account to design an EMC filter for the IH systems [31], [32]. There are various high-frequency inverter topologies on series resonant, parallel resonant, and LLC resonant circuit operating principles [10] [14], [20]. Besides, the dual-duty-cycle-controlled inverter circuits are available in IH appliances. The inverter output power is controlled by tuning the both duty cycles for high power and low power ranges [13]. The control scheme of this kind inverter is complex and distressing to operate the system. At present, researchers in power electronics are investigating how to develop a compact-sized, low-cost, efficient inverter system using either new semiconductor devices or a new circuit topology with the simple control technique. A cycloconverter with minimum number of components is more attractive to IH due to low losses and compact size [21]. Besides, dual-mode operation system is become a popular strategy for multiple burners IH systems [30]. Because of nonuniform heat on the object to be heated, a zone control scheme with multiple inverters is introduced [22]. A minimum harmonic distortion in output current of the inverter can reduce the heat nonuniformity. With an old control technique, a new circuit could be introduced for developing a highly effective power conversion unit. To have a better performance and to fulfill this goal, it is necessary to emphasize overcoming not only power devices but also circuit topologies limitations. In order to promote both high-frequency ac power and homogeneously current following around the surface of the cooking object, a capacitor-clamped switched capacitor circuit topology of load resonant soft-switching inverter is originally proposed and demonstrated in this paper. The capacitor-clamped inverters are more attractive regarding device losses and cost than the switch and diode-clamped inverters. In addition, the concept of switched capacitor has been introduced to boost up the output power of the proposed inverter. Thus, the new inverter circuit offers a high power density with zero voltage switching (ZVS) Fig. 3. [(a), (b), and (c)] Equivalent circuits of the proposed inverter circuit at each mode corresponding to Fig. 4. operation that is in demand for higher switching frequency, miniaturized inverter and light weight. A design example of the proposed inverter circuit considering the THD value of the output current and its operation principle and implementation are discussed. II. PROPOSED SOFT-SWITCHING PWM INVERTER TOPOLOGY A. Circuit Description Fig. 2 shows the basic configuration of the proposed highfrequency inverter circuit. The inverter circuit mainly comprises input dc voltage V s, switches Q 1 (S W 1 /D 1 ), Q 2 (S W 2 /D 2 ),IH load (L o and R o ), resonant capacitors, and auxiliary switched capacitor cell composed of Q 3 (S W 3 /D 3 ) and C s. The switches are Q 1 and Q 2 and the auxiliary switch Q 3 are the reverseconducting-type MOSFET. C r is engaged in series with IH load and creates resonance with L o. Switched capacitor C s is connected in parallel with Q 3 and also creates the resonance and zero voltage soft-switching condition of S W 3. C 1 acts as an edge resonant snubber of Q 1 and Q 2 and creates the zero voltage soft-switching condition of S W 1,S W 2. C 1 functions during the dead time and reduces turn-off losses. L o and R o are the lumped effective inductance and resistance of the IH coil and load, respectively. The operation of the auxiliary switch cell depends on the main switches. Consequently, the switched capacitor function fully depends on the duty factor. It works by charging and discharging while turning OFF the auxiliary switch. B. High-Frequency Power Regulation Scheme Fig. 4 demonstrates the schematic gate pulse (V g1,v g2, and V g3 ) timing sequences for the bidirectional semiconductor switches Q 1,Q 2, and Q 3 of the proposed high-frequency resonant inverter. The output power of the proposed high-frequency inverter is regulated by a constant frequency asymmetrical duty factor control scheme. The main switches Q 1 and Q 2 are driven

3 SAHA AND KIM: HIGH POWER DENSITY SERIES RESONANT INVERTER USING AN AUXILIARY SWITCHED CAPACITOR CELL 1911 by the asymmetrical pulsewidth modulated (PWM) signals with a dead time T d. The auxiliary switch is also driven by the same frequency and the same duty factor of the upper switch Q 1.The duty factor D for the proposed inverter circuit is simply defined as D = T on1 + T d (1) T s where T on1 is the conduction time of the high side switch Q 1 and the auxiliary switch Q 3, and T s is the one complete switching cycle time that is inversely proportional to the applied switching frequency. The conduction time of each of the main switches is not more than (T s /2 T d ). In addition, the dead time for each switch gate pulse is fixed and has the constant value. Since the snubber capacitor charges and discharges during dead time between two main switches, the dead time can be derived as T d = C 1V SW 2 (2) I C 1 where V SW 2 is the voltage across the switch Q 2 and I C 1 is the current flowing through the snubber capacitor. Sufficient dead time (including switching delays and gate driver propagation delay) is required to operate the switches properly because of possibility of cross conduction between upper and lower main switches. C. Auxiliary Cell and Its Performance The proposed circuit has become a promising inverter topology because of this auxiliary cell in which an active switch and a capacitor are composed in parallel. This cell is called switched capacitor cell because capacitor action depends on the switch action. Moreover, the duration of capacitor function depends on the capacitance. The switch of this cell operation follows the upper main switch. When the gate signal V g3 is inserted to the switch, the switch acts like short circuit, as shown in Fig. 3(a). During S W 3 OFF condition, the capacitor starts to charge and stores the energy. The amount of stored energy is Therefore, the reactive power into C s is E C s = 1 2 C sv 2 C s. (3) P C s = C svc 2 s. (4) 2T C s The capacitor C s functions as an energy booster; however, it can be an energy absorber when the condition C s C r is violated. Consequently, the maximum capacitor voltage can be the input voltage. This is a power improvement scheme which makes the circuit unique and excellence. III. CIRCUIT ANALYSIS AND STATES OPERATION A. Operation Principle The half-bridge inverters have peak voltages on the main switches that are the lowest that are the same as input dc voltage. The auxiliary switch peak voltage depends upon the C s values under full load conditions. The gate signals, V g1,v g2, and V g3 Fig. 4. Operating waveforms of the proposed inverter with gate signals at each mode. sequentially regulate the switches Q 1,Q 2, and Q 3 respectively. All active switches are bidirectional-type MOSFETs. D 1,D 2, and D 3 are the antiparallel body diodes of each switch, and every critical time in a cycle has been pointed out. Operation of this new resonant inverter circuit depends on the auxiliary switched capacitor cell function. For description of the circuit operation, assuming some energy stored into C r, and T d as well as C 1 are neglected due to the very small values. The operating waveforms concentrate steady state switching equivalent circuits in Fig. 3. Every single state of operation of the proposed circuit in a period is described later, corresponding with Figs. 3 and 4. Mode1(t 0 < t t 2 ): Prior to the main switch turn ON, the stored energy of the resonant capacitor C r discharges via D 1 and D 3 when the gate signals are injected. At time t 1,S W 1 turns ON together with S W 3 at the zero voltage switching condition since the C r discharging current flows through the body diode and creates an equivalent circuit as in Fig. 3(a). In this mode, resonance appears in the current between the inductor L o and the capacitor C r. The equations of the load current and the capacitor voltage are in (16) and(17).

4 1912 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 4, APRIL 2014 Mode 2 (t 2 < t t 4 ): S W 1 and S W 3 are turned OFF, V g2 is injected to Q 2, and due to zero voltage switching, D 2 begins operation. The equivalent circuit of this mode is shown in Fig. 3(b). During this mode, the switched capacitor C s is charged until S W 2 is turned ON. When S W 2 is turned ON, C s starts to discharge its stored energy through load and S W 2.The current of C s goes down gradually until it is fully discharged. In this state, the flowing load current equation and the capacitors C r and C s voltage equations are in (18) (20). The value of C s cannot be higher than that of C r because C s is not a part of the resonant tank; if C s is larger than C r, then the effective power decreases because the capacitor acts as a reactive component and absorbs some energy. This mode continues until C s is discharged. The duration of this mode is the same as (21). Mode 3 (t 4 < t t 0 ): In mode 3, D 3 is forced to conduct due to C s being fully discharged, and the current flows through D 3 and S W 2.This mode continues until S w 2 is turned OFF and the resonance in the current appears between C r and L o.during the resonant condition, the resonance frequency is the same as that of the first mode. The operating time of this mode can be determined using (24). The current and voltage equations are in (22) and (23). At the end of this mode, the cycle is repeated in the same way. The gate signal is injected to switches, and C r is fully discharged via D 1 and D 3. Therefore, the current flows through D 1 and load resonant tank and D 3. B. Output Power and Proper ZVS Ranges The concept of switched capacitor is used to boost up the total output power. The capacitor C s releases and stores energy during turning off auxiliary switch. During analysis, the following assumptions have been considered: 1) the switches are ideal, so no switching losses are taken into account; 2) the current through the load is sinusoidal as its loaded quality factor (Q) is sufficiently high. For the proper damp operation of the circuit, 4L o >RoC 2 r condition is to be maintained. Since the IH load branch is resonance then the flowing current can be called resistive current due to only resistance resists the flowing current in the pure series resonant tank. When the capacitor C s is connected to the load branch, C s provides its energy to the entire circuit, in which the flowing current increases. As a result, the resultant current of the circuit can be derived as the vector sum of the current of the C s [see (6)] and the resistive current [see (5)]. The resonant tank current is Then, current for the C s is 2 DV s I r =. (5) πr o 1+Q 2 (u 1/u) 2 I C s = C sv C s T C s (6) where T C s is acting time of the C s, and V C s is voltage across the C s, the loaded quality factor is Q = ω s L o /R o, and the normalized frequency is u = f s /f r. For ZVS operation, it is defined as u>1. Consequently, using Pythagoras theorem the total rms current of the proposed topology is derived as I Lrms = Ir 2 + IC DV s s (7) πr o 1+Q 2 (u 1/u) 2 When the all switches operate under a proper soft-switching condition, the load current equation can be expressed as 3 DV s I L sin(ω s t) (8) πr o 1+Q 2 (u 1/u) 2 where ω s is the angular frequency and t is the instantaneous time. Then the output power of the proposed circuit can be obtained as P o = ILrmsR 2 4.4DVs 2 o ( (9) π 2 R o 1+Q 2 (u 1/u) 2). According to the circuit operation, the maximum energy of the coil serves the maximum output power under a complete ZVS condition for all the switches. Moreover, to obtain a proper ZVS operation, the minimum duty factor can be found as D min = π. (10) ω 2 T s Consequently, the maximum conduction of each switch under the proper ZVS condition is T c = T s π ω 2. (11) Soft-switching operation of main switches is not available below the mentioned duty factor (10). If the soft-switching area is wider, then the overall performances can be dramatically improved. IV. DESIGN PROCEDURE OF THE CIRCUITCONSTRAINTS A. A Resonant Load Tank Design Analysis The analysis is carried out on a simple R o L o C r series resonant tank where R o L o is the equivalent resistance and inductance of IH load. The total impedance of the resonant tank is ( Z t = Ro 2 + ω s L o 1 ) 2 tan (ω sl 1 o 1 ω s C r ) ω s C r R o = R o 1+Q 2 (u 1/u) 2 tan 1 Q(u 1/u). (12) The output power for the resonant tank only is obtained as P o = 2V s 2 cos(tan 1 Q(u 1/u)) π 2 R o 1+Q2 (u 1/u). (13) 2 For nth harmonics, total harmonic distortion (THD) factor for the output current can be 1+Q 2 (u 1/u) 2 THD = (14) n=3,5,7,... n2 (1 + Q 2 (nu 1/nu) ). 2

5 SAHA AND KIM: HIGH POWER DENSITY SERIES RESONANT INVERTER USING AN AUXILIARY SWITCHED CAPACITOR CELL 1913 Fig. 5. Plots of ZVS normalized power diagram as a function of loaded quality factor Q and normalized frequency u. Fig. 7. Three-dimensional plot of THD as a function of Q and u. TABLE I PRACTICAL PARAMETERS VALUES TABLE II COMPARISON OF PRACTICALEVALUATION RESULTS AT 50% DUTY CYCLE Fig. 6. Plots of loaded quality factor as a function of normalized frequency at ZVS operation. B. Selection of Q and u A normalized power curve is shown in Fig. 5, which is perfect for the ZVS operation inverter circuit. The normalized power is expressed as P n =(P o /(Vs 2 /R o )). It is seen that Q and u are the key design factors to achieve the desired output power. As mentioned earlier, increasing the switching frequency reduces the circuit s reactive parameter size. If the output power, the input voltage and the load resistance are given, the X value can be determined from (15). This equation is derived from (13) and this equation carries only two parameters namely quality factor and normalized frequency. The designer can choose any of them first when one parameter is already selected. As affecting switching losses by switching frequency, to reduce affecting, the switching frequency on losses must be considered to utilize some soft-switching techniques such as ZCS or ZVS. This techniques show significant results of circuit efficiency while switching losses dominate conduction losses. Fig. 6 depicts a simple design curve, which is a function of the load quality factor and the normalized frequency. From this curve, either the Fig. 8. Exterior view of the proposed inverter prototype evaluation.

6 1914 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 4, APRIL 2014 Fig. 9. Switching and load voltage and current waveforms at D = 0.5, T d = 1.5 μs. (a) Upper main switch (Q 1 ) waveforms (100 V/div, 10 A/div, 5 μs/div), (b) bottom main switch (Q 2 ) waveforms (100 V/div, 10 A/div, 5 μs/div), (c) auxiliary switch (Q 3 ) waveforms (50 V/div, 10 A/div, 5 μs/div), and (d) load waveforms (200 V/div, 5 A/div, 5 μs/div). switching frequency or Q can be selected after any one of them has been chosen under a condition of given power, input voltage, and load resistance ratings ( Q u 1 ) = X. (15) u C. Selection of THD Generally, switching devices and nonlinear loads causes harmonics in output current. Fig. 7 represents the THD diagram where the impact of Q and u is detailed. Taking the THD into consideration, the output current has almost no distortion. As a result, the heat spreads out uniformly around the surface of the heating object. Harmonic contents are responsible for lower distortion power factor (DPF), which affects the power transferred to the load. If DPF is low, then the output power is reduced. THD has been considered for reducing the output current harmonics and have been found to have better output power [9]. V. PRACTICAL IMPLEMENTATION AND EVALUATIONS A. Prototype Implementation A 600 W prototype of the proposed inverter circuit has been implemented and evaluated using the parameters values without considering any parasitic elements. The specifications are given in Table I. The load equivalent values are calculated when Q = Because of zero-voltage soft-switching operation, bidirectional MOSFETs have been chosen as the switching devices. The switching devices (IPP60R099C6 made by Infineon Technologies) are rated of 600 V, 37 A, R DS = Ω. A composite view of proposed inverter implementation is shown in Fig. 8. The feature of this inverter topology is capable to handle a high power under a load resonance (see Table II). For this experiment, a DSP TMS320F28335 chip has been used to generate PWM signals. Gate driver MC33153 have been used because of its desaturation fault protection and optoisolation advantages to save the switch (system) from any type of unexpected fault condition. B. Switches and IH Load Waveforms A 220 V dc power supply is connected directly to the circuit. Fig. 9 illustrates the main and auxiliary switches and IH load voltage and current waveforms at 50% duty factor. Turning OFF state of each switch is zoomed in and inserted in each switch waveforms to observe soft-switching clearly. It is noticed that each switch turns ON in ZVS condition and turning OFF current

7 SAHA AND KIM: HIGH POWER DENSITY SERIES RESONANT INVERTER USING AN AUXILIARY SWITCHED CAPACITOR CELL 1915 Fig. 10. PWM power regulation characteristics curves, duty factor versus output power. Fig. 11. Plots of THD characteristics curve as a function of duty factor (measured by using PPA5530 power analyzer). slightly overlaps the voltage, thus turning OFF can be called softswitching turn OFF. The load current waveform is completely sinusoidal and does not have any distortion during dead time as the voltage waveform shows. During the dead time snubber capacitor C 1 charges and discharges; therefore, the load voltage gradually increases in both polarities, as seen in Fig. 9(d). C. Output Characteristics Evaluation Fig. 10 depicts the output power regulation curve along with soft-switching range of the newly proposed high-frequency inverter. It is identified that the proposed inverter provides higher power (about 8% at full-load condition) than that of previously developed inverter topology (see Fig. 1) [1], [2] for the same parameter values. The output power characteristics are performed by using the PPA5530 power analyzer made by the Newton4th Ltd. The total output power of proposed inverter is clearly higher because of auxiliary switched cell performance. In fact, it is a narrower banded soft-switching range than the other topologies [3], [12] [14]; however, the maximum power is under softswitching condition. The highest efficiency can be achieved in arrow headed area. To realize the large soft-switching range for the proposed inverter topology, parameters designed values need to be flexible. Fig. 11 depicts current harmonic distortion of newly developed and previously developed ZVS-PWM high-frequency inverters. It is reported that the proposed inverter can operate at maximum duty cycle excellently under the allowable THD value (obtained minimum 4.7%), which satisfies the current harmonic limit (5% for 120 V 69 kv) referred to as the IEEE Std The current harmonic distortions have been considered to yield the heat uniformly on the object to be heated. Moreover, newly developed inverter operates without C s and with C s, when C s functions a higher resonance frequency is generated. As a result, a distortion occurred during the commutation time and continued. Consequently, a large deviation at lower duty factor ranging between the proposed inverter and the previously Fig. 12. Conversion efficiency characteristics curve as a function of duty factor (measured by using PPA5530 power analyzer). developed inverter because the low duty factor area is not under soft-switching. Further, THD under the standardization value for all duty factors can be made for this inverter with high quality factor where there is a tradeoff among THD and power, and peak load voltage that affects the component selection. D. Power Conversion Efficiency Fig. 12 shows the conversion efficiency characteristics of the proposed inverter and the previous ZVS half-bridge inverter. The maximum efficiency of the proposed inverter circuit is practically obtained 94.6%, which is lower than that of the previous ZVS half-bridge inverter due to the auxiliary switch losses. In addition, the proposed inverter yields higher current than that of the previous inverter, thus all the conduction losses comparatively get increased. If the input voltage is increased for a certain output power, efficiency is higher as conduction losses decrease

8 1916 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 4, APRIL 2014 due to lower current. As seen in Fig. 9, the switches of the proposed inverter topology operate under soft-commutation at turning OFF, this phenomenon affects significantly on efficiency as well. To improve the overall efficiency of the inverter practically, the parasitic inductances and capacitances produced within the PCB layout and device legs need to be minimized. However, efficiency can be higher in the case of three-switch topology if the switching frequency and duty factor are lower comparatively as well as auxiliary switch conducts for a very short time (Fig. 5) [1]. As a result, all switching losses reduce and efficiency increases. Minimum component inverters have higher efficiency due to minimum device losses [21], [29]. Contrariwise, voltageclamped-type inverters exhibit lower efficiency owing to higher conduction losses produced by higher current [4]. A minimum drain-to-source resistance R ds-on for MOSFETs or a minimum saturation voltage V ce-sat for insulated gate bipolar transistors (IGBTs) is required to reduce conduction losses. When a device with the lowest conduction losses element (R ds-on or V ce-sat ) is selected to be used, then only soft-switching range has to be considered to increase the overall efficiency. Diode capacitorclamped-type inverter topologies [15] also may demonstrate lower efficiency due to diodes losses such as reverse recovery losses. In this case, silicon carbide schottky barrier diode (SiC-SBD) can be a promising replacement because this type of device has little reverse recovery effects. Nevertheless, it is expected that efficiency of the proposed inverter topology can be higher if turning OFF losses are reduced and some promising advanced switching devices are used. Although low duty range is not under soft-switching range, it provides allowable efficiency due to low conduction losses at low duty range. Since the ZVS operation is broken, the switching frequency needs to be increased in order to continue the ZVS operation while snubber capacitance has to be decreased using a sensitive relay or a command. Moreover, voltage cancellation control [20] can be implemented to extend ZVS range of the proposed topology. Recently, a quasi-resonant converter has been developed that demonstrates comparatively higher ZVS range because of nonresonant load current [17]. To improve efficiency significantly in the low duty ranges, pulse density modulation (PDM) control can be used instead of PWM because of the number of pulses control the output power [6], [30]. It is pronounced that dual control operation can enhance soft-switching range as well as overall efficiency of the inverter. E. Comparative Study of High Power Density The credibility of the proposed inverter concerning high power density is thoroughly discussed compared with multioutputs, matrix inverter with multioutputs, multiinverters, and multiload inverter topologies for IH applications [22], [23], [28], [33]. The switching devices of a converter mainly prescribe the power density because of their numbers, properties (such as semiconductor dimensions, behaviors, etc.), and aiding circuits for operation. Multiinverter systems increase the switches and complexity, whereas they produce heat rapidly. To highlight the proposed topology as a high-power-density inverter, numbers of switches and output power have been taken into account as compared with [28], [33] regardless of efficiency. VI. CONCLUSION In this paper, a proposed novel switched capacitor ZVS-PWM high-frequency resonant inverter circuit is practically introduced for IH appliances. The greatest advantage of this topology is a high power density capability, which is obtained practically. The performance characteristics of the proposed HF inverter circuit have been compared with previously developed single-ended ZVS-PWM half-bridge inverter circuit for the same parameter values. The closer designed value of THD is also achieved by using PWM control for the proposed inverter at the maximum load condition. Most significantly, switched capacitor cell boosts up power characteristic. It is obtained that the output power is about 8% more than the previously developed inverter at full-load condition. The proposed circuit shows its limitation of soft-switching range because of the designed output current distortion factor limit. In future work, advanced IGBT as switch and SiC-SBD as antiparallel diode will be used in higher power applications to avoid the reverse recovery behavior and to improve the total circuit efficiency performance. Mode 1: APPENDIX I 1 = I 0 e αt 1 cos(ω 1 T 1 )+ ω 1C r e αt 1 1 ζ 2 ( ) VR0 2 + V cr0 V s sin(ω 1 T 1 ) (16) [ ( V cr1 = V s e αt 1 (V s V cr0 ) cos(ω 1 T 1 ) + ω ) ] 1C r R o 2(1 ζ 2 ) sin(ω 1T 1 ) V L0 sin(ω 1 T 1 ) (17) where I 0 and V cr0 are initial load current and resonant capacitor voltage, respectively. The resonant angular frequency ω 1, damping ratio ζ, T 1, and α are as follows: ζ = R o Cr, ω 1 = 2 L o Mode 2: 1 ζ 2, T 1 = DT s T d, α= R o. L o C r 2L o I 2 = e αt 2 I 1 cos(ω 2 T 2 ) e αt 2 (2V cr1 + V R1 )sin(ω 2 T 2 ) 2ω 2 L o (18) [( V cr2 = e αt 2 2Vcr1 ζ 2 C s + I ) 1(C s + C r ) sin(ω 2 T 2 ) C r + C s ω 2 C r R o ω 2 C r ] + C s V cr1 cos(ω 2 T 2 ) + V cr1c r (19) C r + C s [( V cs = e αt 2 2Vcr1 ζ 2 + I ) 1(C s + C r ) sin(ω 2 T 2 ) C r + C s ω 2 R o ω 2 C s ] + V cr1 C r cos(ω 2 T 2 ) V cr1c r (20) C r + C s

9 SAHA AND KIM: HIGH POWER DENSITY SERIES RESONANT INVERTER USING AN AUXILIARY SWITCHED CAPACITOR CELL 1917 where I 1 and V cr1 are initial load current and resonant capacitor voltage at the second stage, respectively. And the resonant angular frequency ω 2 is C s + C r ζ ω 2 = 2 C s L o C r C s T 2 = Mode 3: ( 4(1 D) tan 1 ω 2 + 2ω 2L o V L1 R o V cr1 ω 2 L o (2V cr1 + V R1 ) I 3 = e αt 3 (1 ζ 2 ) V cr1 C s ζ 2 (Ro 2 +4ω2 2 L 2 o) R o ω 2 L o (C r + C s )(2V cr1 + V R1 ) ). (21) [( ζvcr2 ω 1 C r ( VR2 2 + V cr2 (2 ζ 2 )+I 2 2R o ) ] sin(ω 1 T 3 ) ) cos(ω 1 T 3 ) 2e αt 3 R o ζv cr2 cos(ω 1 T 3 ) (22) V cr3 = e αt 3 V cr2 cos(ω 1 T 3 )+ Qe αt 3 u(1 ζ 2 ) (V R2 +2ζ 2 V cr2 )sin(ω 1 T 3 ) (23) where T 3 is T 3 =(1 D)T s T 2 (24) REFERENCES [1] H. Ogiwara, M. Itoi, and M. Nakaoka, PWM-controlled soft-switching SEPP high-frequency inverter for induction-heating applications, IEE Proc. Electr. Power Appl., vol. 151, no. 4, pp , Jul [2] M. K. Kazimierczuk and W. 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10 1918 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 4, APRIL 2014 induction heating system, IEEE Trans. Power Electron., vol. 28, no. 3, pp , Mar [31] W. M. V. Loock, Electromagnetic heating applications faced with EMC regulations in Europe, in Proc. Int. Symp. EMC,Aug.1999,pp [32] U.S. CFR. 47 part 0 19, pp , (2005, Oct.). [Online]. Available: [33] O. Lucia, J. M. Burdio, L. A. Barragan, J. Acero, and I. Millan, Seriesresonant multiinverter for multiple induction heaters, IEEE Trans. Power Electron., vol. 25, no. 11, pp , Nov Bishwajit Saha (S 06) received the M.Sc. degree in electrical engineering from Kyungnam University, Masan, Korea, in He is currently working toward the Ph.D. degree from Hanyang University, Seoul, Korea. Since 2008, he has been a Faculty Member at the IUBAT, Dhaka, Bangladesh. His current research interests include high-frequency resonant inverters and dc dc converters design using soft-switching techniques. Mr. Saha received the Korean Government Scholarship for his Ph.D. degree and the IEEE IES-Student Scholarship Award at Industrial Electronics Conference (IECON) in Rae-Young Kim (S 06 M 10) received the B.S. and M.S. degrees from Hanyang University, Seoul, Korea, in 1997 and 1999, respectively, and the Ph.D. degree from the Virginia Polytechnic Institute and State University, Blacksburg, USA, in 2009, all in electrical engineering. From 1999 to 2004, he was a Senior Researcher at the Hyosung Heavy Industry R&D Center, Seoul. In 2009, he was a Postdoctoral Researcher at the National Semiconductor Corporation, where he was involved in a smart home energy management system. Since 2010, he has been with the Hanyang University, where he is currently an Assistant Professor in the Department of Electrical and Biomedical Engineering. His current research interests include modeling and control of power converter systems, soft-switching techniques, energy management systems in smart grid applications, power converter systems for renewable energies, and motor drive systems. Dr. Kim received the First Prize Paper Award from the IEEE Industry Applications Society (IAS) Since 2009, he has been a member of the IAS Industry Power Converters Committee and also served as a Reviewer for the IEEE TRANSACTION ON INDUSTRIAL ELECTRONICS and theieee TRANSACTION ON INDUSTRY APPLICATIONS.