TSU101, TSU102, TSU104

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1 TSU11, TSU12, TSU14 Nanopower, rail-to-rail input and output, 5 V CMOS operational amplifiers Datasheet - production data Application performances guaranteed over industrial temperature range Fast desaturation Applications Ultra long life battery-powered applications Power metering UV and photo sensors Electrochemical and gas sensors Pyroelectric passive infrared (PIR) detection Battery current sensing Medical instrumentation RFID readers Description Features Submicro ampere current consumption: 58 na typ per channel at 25 C at VCC = 1.8 V Low supply voltage: 1.5 V V Unity gain stable Rail-to-rail input and output Gain bandwidth product: 8 khz typ Low input bias current: 5 pa max at 25 C High tolerance to ESD: 2 kv HBM Industrial temperature range: -4 C to +85 C The TSU11, TSU12, and TSU14 operational amplifiers offer an ultra low-power consumption of 58 na typical and 75 na maximum per channel when supplied by 1.8 V. Combined with a supply voltage range of 1.5 V to 5.5 V, these features allow the TSU1x series to be efficiently supplied by a coin type Lithium battery or a regulated voltage in low-power applications. The 8 khz gain bandwidth of these devices make them ideal for sensor signal conditioning, battery supplied, and portable applications. Benefits 42 years of typical equivalent lifetime (for TSU11) if supplied by a 22 mah coin type Lithium battery Tolerance to power supply transient drops Accurate signal conditioning of high impedance sensors July 213 DocID24317 Rev 2 1/33 This is information on a product in full production.

2 Contents TSU11, TSU12, TSU14 Contents 1 Package pin connections Absolute maximum ratings and operating conditions Electrical characteristics Application information Operating voltages Rail-to-rail input Input offset voltage drift over temperature Long term input offset voltage drift Schematic optimization aiming for nanopower PCB layout considerations Using the TSU1x series with sensors Fast desaturation Using the TSU1x series in comparator mode ESD structure of TSU1x series Package information SC7-5 (or SOT323-5) package mechanical data SOT23-5 package mechanical data DFN8 2x2 package information MiniSO8 package information QFN16 package information TSSOP14 package information Ordering information Revision history /33 DocID24317 Rev 2

3 TSU11, TSU12, TSU14 Package pin connections 1 Package pin connections Figure 1. Pin connections for each package (top view) SC7-5/SOT23-5 (TSU11) SC7-5/SOT23-5 (TSU11R) DFN8 2x2 (TSU12) MiniSO8 (TSU12) Out Out In1- In4- In In4+ Vcc Vcc- In In In2- In3- Out2 7 8 Out3 QFN16 3x3 (TSU14) TSSOP14 (TSU14) DocID24317 Rev 2 3/33 33

4 Absolute maximum ratings and operating conditions TSU11, TSU12, TSU14 2 Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings (AMR) Symbol Parameter Value Unit V cc Supply voltage (1) 6 V id Differential input voltage (2) ±V cc V V in Input voltage (3) V cc- -.2 to V cc+ +.2 I in Input current (4) 1 ma T stg Storage temperature -65 to +15 C R thja Thermal resistance junction to ambient (5)(6) SC7-5 SOT23-5 DFN8 2x2 MiniSO8 QFN16 3x3 TSSOP14 1. All voltage values, except the differential voltage are with respect to the network ground terminal. 2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal. 3. (V cc+ - V in ) must not exceed 6 V, (V in - V cc- ) must not exceed 6 V. 4. The input current must be limited by a resistor in series with the inputs. 5. Short-circuits can cause excessive heating and destructive dissipation. 6. R th are typical values T j Maximum junction temperature 15 C ESD HBM: human body model (7) MM: machine model (8) CDM: charged device model (9) All other packages except SC7-5 SC7-5 Latch-up immunity (1) 7. Related to ESDA/JEDEC JS-1 Apr Related to JEDEC JESD22-A115C Nov Related to JEDEC JESD22-C11-E Dec Related to JEDEC JESD78C Sept C/W V ma Table 2. Operating conditions Symbol Parameter Value Unit V cc Supply voltage 1.5 to 5.5 V icm Common mode input voltage range V cc- -.1 to V cc+ +.1 V T oper Operating free air temperature range -4 to +85 C 4/33 DocID24317 Rev 2

5 TSU11, TSU12, TSU14 Electrical characteristics 3 Electrical characteristics Table 3. Electrical characteristics at V cc+ = 1.8 V with V cc- = V, V icm = V cc /2, T amb = 25 C, and R L = 1 MΩ connected to V cc /2 (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance V io Input offset voltage C < T< 85 C ΔV io /ΔT Input offset voltage drift -4 C < T< 85 C 5 μv/ C ΔV io Long-term input offset voltage drift T = 25 C (1).18 I io Input offset current (2) C < T< 85 C 3 I ib Input bias current (2) C < T< 85 C 3 CMR A vd V OH V OL I out I CC AC performance Common mode rejection ratio 2 log (ΔV icm /ΔV io ) Large signal voltage gain High level output voltage (drop from V CC +) Low level output voltage Output sink current Output source current Supply current (per channel) V icm = to.6 V, V out = V CC / C < T< 85 C 65 V icm = to 1.8 V, V out = V CC / C < T< 85 C 55 V out =.3 V to (V CC+ -.3 V) R L = 1 kω C < T< 85 C 95 R L = 1 kω 4-4 C < T< 85 C 4 R L = 1 kω 4-4 C < T< 85 C 4 V out = V CC, V ID = -2 mv C < T< 85 C 4 V out = V, V ID = + 2 mv C < T< 85 C 4 No load, V out = V CC / C < T< 85 C 8 mv μv month GBP Gain bandwidth product 8 khz F u Unity gain frequency 8 R L = 1 MΩ, C L = 6 pf Φ m Phase margin 6 degrees G m Gain margin 1 db pa db mv ma na DocID24317 Rev 2 5/33 33

6 Electrical characteristics TSU11, TSU12, TSU14 Table 3. Electrical characteristics at V cc+ = 1.8 V with V cc- = V, V icm = V cc /2, T amb = 25 C, and R L = 1 MΩ connected to V cc /2 (unless otherwise specified) (continued) Symbol Parameter Conditions Min. Typ. Max. Unit SR Slew rate (1 % to 9 %) R L = 1 MΩ, C L = 6 pf V out =.3 V to (V CC+ -.3 V) 3 V/ms e n Equivalent input noise voltage f = 1 Hz 265 f = 1 khz 265 nv Hz e n Low-frequency peak-topeak input noise Bandwidth: f =.1 to 1 Hz 9 µv pp i n Equivalent input noise current f = 1 Hz.64 f = 1 khz 4.4 fa Hz t rec Overload recovery time 1 mv from rail in comparator R L = 1 kω, V ID = ±V CC -4 C < T< 85 C 3 µs 1. Typical value is based on the Vio drift observed after 1h at 125 C extrapolated to 25 C using the Arrhenius law and assuming an activation energy of.7 ev. The operational amplifier is aged in follower mode configuration. 2. Guaranteed by design. 6/33 DocID24317 Rev 2

7 TSU11, TSU12, TSU14 Electrical characteristics Table 4. Electrical characteristics at V cc+ = 3.3 V with V cc- = V, V icm = V cc /2, T amb = 25 C, and R L = 1 MΩ connected to V cc /2 (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance V io Input offset voltage C < T< 85 C ΔV io /ΔT Input offset voltage drift -4 C < T< 85 C 5 μv/ C ΔV io Long-term input offset voltage drift T = 25 C (1).36 I io Input offset current (2) C < T< 85 C 3 I ib Input bias current (2) C < T< 85 C 3 CMR A vd V OH V OL I out I CC AC performance Common mode rejection ratio 2 log (ΔV icm /ΔV io ) Large signal voltage gain High level output voltage (drop from V CC +) Low level output voltage Output sink current Output source current Supply current (per channel) V icm = to 2.1 V, V out = V CC / C < T< 85 C 7 V icm = to 3.3 V, V out = V CC / C < T< 85 C 6 V out =.3 V to (V CC+ -.3 V) R L = 1 kω C < T< 85 C 15 R L = 1 kω 4-4 C < T< 85 C 4 R L = 1 kω 4-4 C < T< 85 C 4 V out = V CC, V ID = -2 mv C < T< 85 C 6 V out = V, V ID = + 2 mv C < T< 85 C 8 No load, V out = V CC / C < T< 85 C 85 GBP Gain bandwidth product 8 khz F u Unity gain frequency 8 R L = 1 MΩ, C L = 6 pf Φ m Phase margin 6 degrees G m Gain margin 11 db SR Slew rate (1 % to 9 %) R L = 1 MΩ, C L = 6 pf, V out =.3 V to (V CC+ -.3 V) mv μv month pa db mv ma na 3 V/ms DocID24317 Rev 2 7/33 33

8 Electrical characteristics TSU11, TSU12, TSU14 Table 4. Electrical characteristics at V cc+ = 3.3 V with V cc- = V, V icm = V cc /2, T amb = 25 C, and R L = 1 MΩ connected to V cc /2 (unless otherwise specified) (continued) Symbol Parameter Conditions Min. Typ. Max. Unit e n Equivalent input noise voltage f = 1 Hz 26 f = 1 khz 255 nv Hz e n Low-frequency peak-topeak input noise Bandwidth: f =.1 to 1 Hz 8.6 µv pp i n Equivalent input noise current f = 1 Hz.55 f = 1 khz 3.8 fa Hz t rec Overload recovery time 1 mv from rail in comparator R L = 1 kω, V ID = ±V CC -4 C < T< 85 C 3 µs 1. Typical value is based on the Vio drift observed after 1h at 125 C extrapolated to 25 C using the Arrhenius law and assuming an activation energy of.7 ev. The operational amplifier is aged in follower mode configuration. 2. Guaranteed by design. 8/33 DocID24317 Rev 2

9 TSU11, TSU12, TSU14 Electrical characteristics Table 5. Electrical characteristics at V cc+ = 5 V with V cc- = V, V icm = V cc /2, T amb = 25 C, and R L = 1 MΩ connected to V cc /2 (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance V io Input offset voltage C < T< 85 C ΔV io /ΔT Input offset voltage drift -4 C < T< 85 C 5 μv/ C ΔV io Long-term input offset voltage drift T = 25 C (1) 1.1 I io Input offset current (2) C < T< 85 C 3 I ib Input bias current (2) C < T< 85 C 3 CMR SVR A vd V OH V OL I out I CC AC performance Common mode rejection ratio 2 log (ΔV icm /ΔV io ) Supply voltage rejection ratio Large signal voltage gain High level output voltage (drop from V CC +) Low level output voltage Output sink current Output source current Supply current (per channel) V icm = to 3.8 V, V out = V CC / C < T< 85 C 7 V icm = to 5 V, V out = V CC / C < T< 85 C 65 V CC = 1.5 to 5.5 V, V icm = V C < T< 85 C 7 V out =.3 V to (V cc+ -.3 V) R L = 1 kω C < T< 85 C 11 R L = 1 kω 4-4 C < T< 85 C 4 R L = 1 kω 4-4 C < T< 85 C 4 V out = V CC, V ID = -2 mv C < T< 85 C 6 V out = V, V ID = + 2 mv C < T< 85 C 8 No load, V out = V CC / na -4 C < T< 85 C 95 mv μv month GBP Gain bandwidth product 9 khz F u Unity gain frequency 8.6 R L = 1 MΩ, C L = 6 pf Φ m Phase margin 6 degrees G m Gain margin 12 db pa db mv ma DocID24317 Rev 2 9/33 33

10 Electrical characteristics TSU11, TSU12, TSU14 Table 5. Electrical characteristics at V cc+ = 5 V with V cc- = V, V icm = V cc /2, T amb = 25 C, and R L = 1 MΩ connected to V cc /2 (unless otherwise specified) (continued) Symbol Parameter Conditions Min. Typ. Max. Unit SR Slew rate (1 % to 9 %) R L = 1 MΩ, C L = 6 pf, V out =.3 V to (V CC+ -.3 V) 3 V/ms e n Equivalent input noise voltage f = 1 Hz 24 f = 1 khz 225 nv Hz e n Low-frequency peak-to-peak input noise Bandwidth: f =.1 to 1 Hz 8.1 µv pp i n Equivalent input noise current f = 1 Hz.18 f = 1 khz 3.5 fa Hz t rec Overload recovery time 1 mv from rail in comparator R L = 1 kω, V ID = ±V CC -4 C < T< 85 C 3 µs V in = -1 dbm, f = 4 MHz 73 EMIRR Electromagnetic interference rejection ratio (3) V in = -1 dbm, f = 9 MHz 88 V in = -1 dbm, f = 1.8 GHz 8 db V in = -1 dbm, f = 2.4 GHz 8 1. Typical value is based on the Vio drift observed after 1h at 125 C extrapolated to 25 C using the Arrhenius law and assuming an activation energy of.7 ev. The operational amplifier is aged in follower mode configuration. 2. Guaranteed by design. 3. Based on evaluations performed only in conductive mode. 1/33 DocID24317 Rev 2

11 TSU11, TSU12, TSU14 Electrical characteristics Figure 2. Supply current vs. supply voltage Supply Current (µa) T=85 C T=-4 C Vicm=Vout=Vcc/ Supply voltage (V) Figure 4. Supply current in saturation mode Icc (μa) Temperature 85 C/65 C/45 C/25 C/-5 C/-4 C Vcc=3.3V Follower configuration Input voltage (mv) Figure 6. Input offset voltage vs. common mode voltage Input offset voltage (mv) Vcc=3.3V T=85 C T=-4 C Common mode voltage (V) Population % Figure 3. Supply current vs. input common mode voltage Supply Current (µa) T=85 C T=-4 C Vcc=3.3V, Vout=Vcc/ Input common mode voltage (V) Figure 5. Input offset voltage distribution Vio distribution at Vcc=3.3V, Vicm=1.65V Input offset voltage (mv) Figure 7. Input offset voltage vs. temperature at 3.3 V supply voltage Input offset voltage (mv) Vcc=3.3V, Vicm=1.65V Limit for TSU1x Temperature ( C) DocID24317 Rev 2 11/33 33

12 Electrical characteristics TSU11, TSU12, TSU14 Population % Figure 8. Input offset voltage temperature coefficient distribution ΔVio/ΔT distribution between T=-4 C and 85 C for Vcc=3.3V, Vicm=1.65V ΔVio/ΔT (µv/ C) Figure 9. Input bias current vs. temperature at mid V ICM Input bias current (pa) Vicm=Vcc/2 Vcc=5V Vcc=3.3V Vcc=1.8V Temperature ( C) Figure 1. Input bias current vs. temperature at low V ICM 2 Figure 11. Input bias current vs. temperature at high V ICM Vcc=5V Vcc=3.3V Input bias current (pa) Vicm=V Vcc=3.3V Vcc=1.8V Input bias current (pa) Vicm=Vcc Vcc=1.8V -15 Vcc=5V Temperature ( C) Temperature ( C) Figure 12. Output characteristics at 1.8 V supply voltage Output Voltage (V) Source Vid=.2V Vcc=1.8V Vicm=.1V Sink Vid=-.2V T=85 C T=-4 C Output Current (ma) Figure 13. Output characteristics at 3.3 V supply voltage Output Voltage (V) Source Vid=.2V Vcc=3.3V Vicm=.1V Sink Vid=-.2V T=85 C.3 T=-4 C Output Current (ma) 12/33 DocID24317 Rev 2

13 TSU11, TSU12, TSU14 Electrical characteristics Figure 14. Output characteristics at 5 V supply voltage Output Voltage (V) Source Vid=.2V Vcc=5V Vicm=.1V Sink Vid=-.2V T=85 C T=-4 C Output Current (ma) Figure 16. Output saturation with a sine wave on input Signal Amplitude (V) Vout Vout Vin Follower configuration, Vcc=3.3V, Vin from rail to 3mV from rail Vrl=Vrail, f=1hz, Rl=1MΩ, Cl=16pF.25 Vin Time (ms) Signal Amplitude (V) Figure 18. Phase reversal free Follower configuration, Vcc=3.3V, Vicm=Vrl=1.65V Rl=1MΩ, Cl=16pF Time (ms) Figure 15. Output voltage vs. input voltage close to the rails Output voltage (mv) Signal Amplitude (V) Slew Rate (V/ms) Temperature 85 C/65 C/45 C/25 C/-5 C/-4 C Vcc=3.3V Follower configuration Input voltage (mv) Figure 17. Desaturation time Gain=+11, 1kΩ/1MΩ, Vin=3Vpp, Vcc=3.3V, Vicm=Vrl=1.65V Rl=1MΩ, Cl=16pF Time (ms) Figure 19. Slew rate vs. supply voltage T=-4 C Vicm=Vrl=Vcc/2 Rl=1MΩ, Cl=6pF Vin from.5v to Vcc-.5V SR calculated from 1% to 9% T=85 C Vcc (V) DocID24317 Rev 2 13/33 33

14 Electrical characteristics TSU11, TSU12, TSU14 Figure 2. Output swing vs. input signal frequency Output swing (V) Follower configuration Vcc=3.3V, Vin=3.3Vpp Vicm=Vrl=1.65V Rl=1MΩ, Cl=16pF Frequency (Hz) Figure 22. Large signal response at 3.3 V supply voltage Signal Amplitude (V) 2 Follower configuration, Vcc=3.3V Vicm=Vrl=1.65V Rl=1MΩ, Cl=16pF Time (ms) Figure 24. Overshoot vs. capacitive load at 3.3 V supply voltage Overshoot (%) Vcc=3.3V, Vicm=Vrl=1.65V Follower configuration 5mVpp step Rl=1MΩ, Capacitive load (pf) Signal Amplitude (V) Figure 21. Triangulation of a sine wave Follower configuration, Vin=3Vpp, F=1kHz Vcc=3.3V, Vicm=Vrl=1.65V Rl=1MΩ, Cl=16pF, Time (ms) Figure 23. Small signal response at 3.3 V supply voltage Signal Amplitude (mv) Follower configuration, Vcc=3.3V Vicm=Vrl=1.65V Rl=1MΩ, Cl=16pF Time (ms) Figure 25. Phase margin vs. capacitive load at 3.3 V supply voltage Phase margin (deg) Vcc=3.3V, Vicm=Vrl=1.65V Gain 11 : Rg=1kΩ, Rf=1MΩ Rl=1MΩ Capacitive load (pf) 14/33 DocID24317 Rev 2

15 TSU11, TSU12, TSU14 Electrical characteristics Figure 26. Bode diagram for different feedback values Figure 27. Bode diagram at 1.8 V supply voltage Gain (db) Vcc=3.3V, Vicm=1.65V, Gain=1 Rl=1MΩ, Cl=16pF, Vrl=Vcc/2 Feedback : 1MΩ//47pF Frequency (Hz) Feedback : 1MΩ Feedback : 1kΩ Gain (db) Phase Gain T=85 C -3 Vcc=1.8V, Vicm=.9V G=11 (1kΩ/1MΩ) Rl=1MΩ, Cl=6pF, Vrl=Vcc/ Frequency (Hz) T=-4 C Phase ( ) Figure 28. Bode diagram at 3.3 V supply voltage Figure 29. Bode diagram at 5 V supply voltage Gain (db) Phase Gain T=85 C -3 Vcc=3.3V, Vicm=1.65V G=11 (1kΩ/1MΩ) Rl=1MΩ, Cl=6pF, Vrl=Vcc/ Frequency (Hz) T=-4 C Phase ( ) Gain (db) Phase Gain T=85 C -3 Vcc=5V, Vicm=2.5V G=11 (1kΩ/1MΩ) Rl=1MΩ, Cl=6pF, Vrl=Vcc/ Frequency (Hz) T=-4 C Phase ( ) Figure 3. Gain bandwidth product vs. input common mode voltage GBP (khz) Vcc=3.3V, Vicm=Vrl Gain 11 : Rg=1kΩ, Rf=1MΩ Rl=1MΩ, Cl=6pF Measured at 2dB Vicm (V) Figure 31. Gain vs. input common mode voltage Riso (kω) 1 Recommended resistor to place between the output of the op-amp and the capacitive load Vcc=3.3V, Vicm=1.65V Follower configuration Capacitive load (nf) DocID24317 Rev 2 15/33 33

16 Electrical characteristics TSU11, TSU12, TSU14 Figure 32. Noise at 1.8 V supply voltage in follower configuration 1 Figure 33. Noise at 3.3 V supply voltage in follower configuration 1 Output voltage noise density (nv/vhz) 1 1 Vicm=1.5V Vicm=.9V Vcc=1.8V Follower configuration Frequency (Hz) Output voltage noise density (nv/vhz) 1 1 Vicm=1.65V Vicm=3V Vcc=3.3V Follower configuration Frequency (Hz) Figure 34. Noise at 5 V supply voltage in follower configuration 1 Figure 35. Noise amplitude on.1 to 1 Hz frequency range 2 Output voltage noise density (nv/vhz) 1 1 Vicm=4.7V Vicm=2.5V Vcc=5V Follower configuration Frequency (Hz) Noise Amplitude (uv) Vcc=3V, Vicm=1.65V Bandpass filter :.1Hz to 1Hz Time (s) Figure 36. Channel separation on TSU12 14 Figure 37. Channel separation on TSU14 14 Channel separation (db) V cc =5V V icm =2.5V V in =2Vpp Channel separation (db) V cc =5V V icm =2.5V V in =2Vpp Ch1 - Ch2 Ch1 - Ch3 Ch1 - Ch k 1k Frequency (Hz) 1 1 1k 1k Frequency (Hz) 16/33 DocID24317 Rev 2

17 TSU11, TSU12, TSU14 Application information 4 Application information 4.1 Operating voltages The TSU11, TSU12, and TSU14 series of amplifiers can operate from 1.5 V to 5.5 V. Their parameters are fully specified at 1.8 V, 3.3 V, and 5 V supply voltages and are very stable in the full V CC range. Additionally, main specifications are guaranteed on the industrial temperature range from -4 to +85 C. 4.2 Rail-to-rail input The TSU11, TSU12, and TSU14 series is built with two complementary PMOS and NMOS input differential pairs. Thus, these devices have a rail-to-rail input, and the input common mode range is extended from V CC- -.1 V to V CC+ +.1 V. The devices have been designed to prevent phase reversal behavior. 4.3 Input offset voltage drift over temperature The maximum input voltage drift over the temperature variation is defined as the offset variation related to the offset value measured at 25 C. The operational amplifier is one of the main circuits of the signal conditioning chain, and the amplifier input offset is a major contributor to the chain accuracy. The signal chain accuracy at 25 C can be compensated during production at application level. The maximum input voltage drift over temperature enables the system designer to anticipate the effects of temperature variations. The maximum input voltage drift over temperature is computed in Equation 1. Equation 1 ΔV io = max V io ( T) V io ( 25 C) ΔT T 25 C with T = -4 C and 85 C. The datasheet maximum value is guaranteed by measurements on a representative sample size ensuring a C pk (process capability index) greater than 2. DocID24317 Rev 2 17/33 33

18 Application information TSU11, TSU12, TSU Long term input offset voltage drift To evaluate product reliability, two types of stress acceleration are used: Voltage acceleration, by changing the applied voltage Temperature acceleration, by changing the die temperature (below the maximum junction temperature allowed by the technology) with the ambient temperature. The voltage acceleration has been defined based on JEDEC results, and is defined using Equation 2. Equation 2 ( ) A FV e β V S V U = Where: A FV is the voltage acceleration factor β is the voltage acceleration constant in 1/V, constant technology parameter (β = 1) V S is the stress voltage used for the accelerated test V U is the voltage used for the application The temperature acceleration is driven by the Arrhenius model, and is defined in Equation 3. Equation 3 A FT = E a k e T U T S Where: A FT is the temperature acceleration factor E a is the activation energy of the technology based on the failure rate k is the Boltzmann constant ( x 1-5 evk -1 ) T U is the temperature of the die when V U is used ( K) T S is the temperature of the die under temperature stress ( K) The final acceleration factor, A F, is the multiplication of the voltage acceleration factor and the temperature acceleration factor (Equation 4). Equation 4 A F = A FT A FV A F is calculated using the temperature and voltage defined in the mission profile of the product. The A F value can then be used in Equation 5 to calculate the number of months of use equivalent to 1 hours of reliable stress duration. 18/33 DocID24317 Rev 2

19 TSU11, TSU12, TSU14 Application information Equation 5 Months = A F 1 h 12 months ( 24 h days) To evaluate the op-amp reliability, a follower stress condition is used where V CC is defined as a function of the maximum operating voltage and the absolute maximum rating (as recommended by JEDEC rules). The V io drift (in µv) of the product after 1 h of stress is tracked with parameters at different measurement conditions (see Equation 6). Equation 6 V CC = maxv op with V icm = V CC 2 The long term drift parameter (ΔV io ), estimating the reliability performance of the product, is obtained using the ratio of the V io (input offset voltage value) drift over the square root of the calculated number of months (Equation 7). Equation 7 ΔV io = V io drift ( months) where V io drift is the measured drift value in the specified test conditions after 1 h stress duration. 4.5 Schematic optimization aiming for nanopower To benefit from the full performance of the TSU1 series, the impedances must be maximized so that current consumption is not lost where it is not required. For example, an aluminum electrolytic capacitance can have significantly high leakage. This leakage may be greater than the current consumption of the op-amp. For this reason, ceramic type capacitors are preferred. For the same reason, big resistor values should be used in the feedback loop. However, there are three main limitations to be considered when choosing a resistor. 1. When the TSU1x series is used with a sensor: the resistance connected between the sensor and the input must remain much higher than the impedance of the sensor itself. 2. Noise generated: a1 kω resistor generates , a bigger resistor value generates Hz even more noise. 3. Leakage on the PCB: leakage can be generated by moisture. This can be improved by using a specific coating process on the PCB. nv DocID24317 Rev 2 19/33 33

20 Application information TSU11, TSU12, TSU PCB layout considerations For correct operation, it is advised to add 1 nf decoupling capacitors as close as possible to the power supply pins. Minimizing the leakage from sensitive high impedance nodes on the inputs of the TSU1x series can be performed with a guarding technique. The technique consists of surrounding high impedance tracks by a low impedance track (the ring). The ring is at the same electrical potential as the high impedance node. Therefore, even if some parasitic impedance exists between the tracks, no leakage current can flow through them as they are at the same potential (see Figure 38). Figure 38. Guarding on the PCB 2/33 DocID24317 Rev 2

21 TSU11, TSU12, TSU14 Application information 4.7 Using the TSU1x series with sensors The TSU1x series has MOS inputs, thus input bias currents can be guaranteed down to 5 pa maximum at ambient temperature. This is an important parameter when the operational amplifier is used in combination with high impedance sensors. The TSU11, TSU12, and TSU14 series is perfectly suited for trans-impedance configuration as shown in Figure 39. This configuration allows a current to be converted into a voltage value with a gain set by the user. It is an ideal choice for portable electrochemical gas sensing or photo/uv sensing applications. The TSU1x series, using trans-impedance configuration, is able to provide a voltage value based on the physical parameter sensed by the sensor. Electrochemical gas sensors The output current of electrochemical gas sensors is generally in the range of tens of na to hundreds of μa. As the input bias current of the TSU11, TSU12, and TSU14 is very low (see Figure 9, Figure 1, and Figure 11) compared to these current values, the TSU1x series is well adapted for use with the electrochemical sensors of two or three electrodes. Figure 4 shows a potentiostat (electronic hardware required to control a three electrode cell) schematic using the TSU11, TSU12, and TSU14. In such a configuration, the devices minimize leakage in the reference electrode compared to the current being measured on the working electrode. Figure 39. Trans-impedance amplifier schematic DocID24317 Rev 2 21/33 33

22 Application information TSU11, TSU12, TSU14 Figure 4. Potentiostat schematic using the TSU11 (or TSU12) 4.8 Fast desaturation When the TSU11, TSU12, and TSU14 operational amplifiers go into saturation mode, they take a short period of time to recover, typically thirty microseconds. When recovering after saturation, the TSU1x series does not exhibit any voltage peaks that could generate issues (such as false alarms) in the application (see Figure 17). This is because the internal gain of the amplifier decreases smoothly when the output signal gets close to the V CC+ or V CC- supply rails (see Figure 15 and Figure 16). Thus, to maintain signal integrity, the user should take care that the output signal stays at 1 mv from the supply rails. With a trans-impedance schematic, a voltage reference can be used to keep the signal away from the supply rails. 4.9 Using the TSU1x series in comparator mode The TSU1x series can be used as a comparator. In this case, the output stage of the device always operates in saturation mode. In addition, Figure 4 shows the current consumption is not bigger and even decreases smoothly close to the rails. The TSU11, TSU12, and TSU14 are obviously operational amplifiers and are therefore optimized to be used in linear mode. We recommend to use the TS88 series of nanopower comparators if the primary function is to perform a signal comparison only. 22/33 DocID24317 Rev 2

23 TSU11, TSU12, TSU14 Application information 4.1 ESD structure of TSU1x series The TSU11, TSU12, and TSU14 are protected against electrostatic discharge (ESD) with dedicated diodes (see Figure 41). These diodes must be considered at application level especially when signals applied on the input pins go beyond the power supply rails (V CC+ or V CC- ). Figure 41. ESD structure Current through the diodes must be limited to a maximum of 1 ma as stated in Table 1. A serial resistor or a Schottky diode can be used on the inputs to improve protection but the 1 ma limit of input current must be strictly observed. DocID24317 Rev 2 23/33 33

24 Package information TSU11, TSU12, TSU14 5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. 24/33 DocID24317 Rev 2

25 TSU11, TSU12, TSU14 Package information 5.1 SC7-5 (or SOT323-5) package mechanical data Figure 42. SC7-5 (or SOT323-5) package mechanical drawing DIMENSIONS IN MM SIDE VIEW GAUGE PLANE COPLANAR LEADS SEATING PLANE TOP VIEW Table 6. SC7-5 (or SOT323-5) package mechanical data Dimensions Ref Millimeters Inches Min Typ Max Min Typ Max A A1.1.4 A b c D E E e e L < 8 8 DocID24317 Rev 2 25/33 33

26 Package information TSU11, TSU12, TSU SOT23-5 package mechanical data Figure 43. SOT23-5 package mechanical drawing Table 7. SOT23-5 package mechanical data Dimensions Ref Millimeters Inches Min Typ Max Min Typ Max A A A B C D D e E F L K /33 DocID24317 Rev 2

27 TSU11, TSU12, TSU14 Package information 5.3 DFN8 2x2 package information Figure 44. DFN8 2x2 package mechanical drawing Table 8. DFN8 2x2 package mechanical data Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A A b D E e.5.2 L N 8 DocID24317 Rev 2 27/33 33

28 Package information TSU11, TSU12, TSU MiniSO8 package information Figure 45. MiniSO8 package mechanical drawing Table 9. Ref. MiniSO8 package mechanical data Millimeters Dimensions Inches Min. Typ. Max. Min. Typ. Max. A A A b c D E E e L L L k 8 8 ccc /33 DocID24317 Rev 2

29 TSU11, TSU12, TSU14 Package information 5.5 QFN16 package information Figure 46. QFN16 package mechanical drawing Table 1. Ref. QFN16 package mechanical data Millimeters Dimensions Inches Min. Typ. Max. Min. Typ. Max. A A A3.2.8 b D D E E e.5.2 K.2.8 L r.9.6 DocID24317 Rev 2 29/33 33

30 Package information TSU11, TSU12, TSU14 Figure 47. QFN16 3x3 footprint recommendation Table 11. Footprint data Ref Millimeters Inches A B C.5.2 D.3.12 E F.7.28 G /33 DocID24317 Rev 2

31 TSU11, TSU12, TSU14 Package information 5.6 TSSOP14 package information Figure 48. TSSOP14 package mechanical drawing Table 12. Ref. TSSOP14 package mechanical data Millimeters Dimensions Inches Min. Typ. Max. Min. Typ. Max. A A A b c D E E e L L k 8 8 aaa.1.4 DocID24317 Rev 2 31/33 33

32 Ordering information TSU11, TSU12, TSU14 6 Ordering information Table 13. Order codes Order code Temperature range Package Packing Marking TSU11ICT SC7-5 K22 TSU11ILT SOT23-5 K16 TSU11RICT SC7-5 K24 TSU11RILT SOT23-5 K169-4 C to +85 C Tape and reel TSU12IQ2T DFN8 2x2 K24 TSU12IST MiniSO8 K16 TSU14IQ4T QFN16 3x3 K16 TSU14IPT TSSOP14 TSU14I 7 Revision history Table 14. Document revision history Date Revision Changes 16-Apr Initial release 2-Jul Added the TSU12 and TSU14 devices and updated the datasheet accordingly. Added the silhouettes, pin connections, and package information for DFN8 2x2, MiniSO8, QFN16 3x3, and TSSOP14. Added Figure 36 and Figure /33 DocID24317 Rev 2

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