BCM Bus Converter BCM380y475x1K2A30

Transcription

1 BCM Bus Converter BCM38y475x1K2A3 S C NRTL US Unregulated DC-DC Converter Features Up to 12 W continuous output power 1876 W/in 3 power density 97.9 % peak efficiency 4242 Vdc isolation Parallel operation for multi-kw arrays OV, OC, UV, short circuit and thermal protection 6123 through-hole ChiP package n x.898 x.286 ( mm x 22.8 mm x 7.26 mm) Typical Applications 38 DC Power Distribution High End Computing Systems Automated Test Equipment Industrial Systems High Density Power Supplies Communications Systems Transportation V IN = 38 V ( V) V OUT = 47.5 V ( V) (NO LOAD) Product Description Product Ratings POUT = up to 12 W K = 1/8 The VI Chip Bus Converter (BCM ) is a high efficiency Sine Amplitude Converter (SAC ), operating from a 26 to 41 VDC primary bus to deliver an isolated 32.5 to 51.3 VDC unregulated secondary voltage. The BCM38y475x1K2A3 offers low noise, fast transient response, and industry leading efficiency and power density. In addition, it provides an AC impedance beyond the bandwidth of most downstream regulators, allowing input capacitance normally located at the input of a POL regulator to be located at the input of the BCM module. With a K factor of 1/8, that capacitance value can be reduced by a factor of 64x, resulting in savings of board area, material and total system cost. Leveraging the thermal and density benefits of Vicor s ChiP packaging technology, the BCM module offers flexible thermal management options with very low top and bottom side thermal impedances. Thermally-adept ChiP-based power components, enable customers to achieve low cost power system solutions with previously unattainable system size, weight and efficiency attributes, quickly and predictably. Page 1 of 24 2/

2 Typical Application BCM PRM TM enable/disable switch ENABLE TRIM VAUX REF/ REF_EN VTM EN AL VT Adaptive Loop Temperature Feedback TM +OUT V OUT enable/disable switch VAUX SGND R TRIM_PRM R AL_PRM SHARE/ CONTROL NODE VC IFB VTM Start Up Pulse VC PC R I_PRM_DAMP R O_PRM_DAMP C O_VTM_CER LOAD FUSE +IN +OUT SGND +IN +OUT +IN L I_PRM_FLT L O_PRM_FLT V IN C I_BCM_ELEC R I_PRM_CER C O_PRM_CER IN OUT IN SGND OUT IN OUT SOURCE_RTN PRIMARY SECONDARY ISOLATION BOUNDRY PRIMARY SECONDARY ISOLATION BOUNDRY LOAD_RTN SGND BCM38y475x1K2A3 + PRM + VTM Adaptive Loop Configuration TM EN BCM enable/disable switch SGND ENABLE TRIM AL PRM VAUX REF/ REF_EN VT REF 3312 IN OUT GND SGND Voltage Reference with Soft Start SGND TM V REF SGND Voltage Sense and Error Amplifier (Differential) VTM +OUT Voltage Sense enable/disable switch VAUX SGND R I_PRM_DAMP SHARE/ CONTROL NODE VC IFB VTM Start up Pulse V + V VOUT SGND R +IN IN O_PRM_DAMP VC PC C LOAD O_VTM_CER FUSE +IN +OUT +IN +OUT +IN V IN CI_BCM_ELEC L I_PRM_FLT C I_PRM_ELEC External Current Sense L O_PRM_FLT CO_PRM_CER SOURCE_RTN IN PRIMARY OUT SECONDARY IN SGND OUT IN OUT PRIMARY SECONDARY ISOLATION BOUNDRY ISOLATION BOUNDRY SGND BCM38y475x1K2A3 + PRM + VTM, non-isolated Remote Sense Configuration Page 2 of 24 2/

3 Pin Configuration 1 TOP VIEW 2 +IN A A +OUT TM B B -OUT EN C VAUX D C +OUT -IN E D -OUT 6123 ChiP Package Page 3 of 24 2/

4 Part Ordering Information Device Input Voltage Range Package Type Output Voltage x 1 Temperature Grade Output Power Revision Package Size Version BCM 38 y 475 x 1K2 A 3 BCM = BCM 38 = 26 to 41 V P = ChiP Through Hole 475 = 47.5 V T = -4 to 125 C M = -55 to 125 C 1K2 = 1,2 W A 3 = 6123 All products shipped in JEDEC compliant trays. Standard Models Part Number V IN Package Type V OUT Temperature Power Package Size BCM38P475T1K2A3 26 to 41 V ChiP Through Hole 47.5 V 32.5 to V -4 C to 125 C 1,2 W 6123 Absolute Maximum Ratings The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device. Parameter Comments Min Max Unit +IN to IN V V IN slew rate (operational) -1 1 V/µs Isolation voltage, input to output 1-2 seconds applied to 1% production units 4242 V +OUT to OUT -1 6 V TM to IN V EN to IN V VAUX to IN V Page 4 of 24 2/

5 Electrical Specifications Specifications apply over all line and load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -4 C T INTERNAL 125 C (T-Grade); All other specifications are at T INTERNAL = 25 ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit Powertrain Input voltage range, continuous V IN_DC V Input voltage range, transient VIN_TRANS Full current or power supported, 5 ms max, V 1% duty cycle max V IN µcontroller Active V µc_active V IN voltage where µc is initialized, 12 V (ie VAUX = Low, powertrain inactive) Input Voltage Slew Rate dv IN /dt V IN_UVLO- V IN V IN_OVLO+.1 1 V/ms Disabled, EN Low, V Quiescent current I IN = 38 2 Q T INTERNAL 1ºC 4 No load power dissipation Inrush current peak P NL I INR_P V IN = 38 V, T INTERNAL = 25 ºC V IN = 38 V V IN = 26 V to 41 V, T INTERNAL = 25 ºC 15 V IN = 26 V to 41 V 2 V IN = 41 V, C OUT = 1 µf, R 4 LOAD = 25% of full load current T INTERNAL 1ºC 1 DC input current IIN_DC At P OUT = 12 W, T INTERNAL 1ºC 3.5 A Transformation ratio K K = V OUT /V IN, at no load 1/8 V/V Output power (average) P OUT_AVG See Figure 1 12 W Output power (peak) POUT_PK 1 ms max, P OUT P OUT_AVG 15 W Output current (average) IOUT_AVG 25.7 A Output current (peak) IOUT_PK 1 ms max, I OUT I OUT_AVG 32.2 A V IN = 38 V, I OUT = 25.7 A Efficiency (ambient) h AMB V IN = 26 V to 41 V, I OUT = 25.7 A 96.4 % V IN = 38 V, I OUT = A Efficiency (hot) h HOT V IN = 38 V, I OUT = 25.7 A; T INTERNAL = 1 C % Efficiency (over load range) h 2% 5.14 A < I OUT < 25.7 A, T INTERNAL 1ºC 92 % R OUT_COLD V IN = 38 V, I OUT = 25.7 A, T INTERNAL = -4 C Output resistance R OUT_AMB V IN = 38 V, I OUT = 25.7 A mω R OUT_HOT V IN = 38 V, I OUT = 25.7 A, T INTERNAL = 1 C Switching frequency F SW Frequency of the Output Voltage Ripple = 2x F SW MHz C OUT = F, I OUT = 25.7 A, V IN = 38 V, 195 Output voltage ripple VOUT_PP 2 MHz BW mv Input inductance (parasitic) Output inductance (parasitic) L IN_PAR LOUT_PAR T INTERNAL 1ºC 3 Frequency 2.5 MHz (double switching frequency), 6.7 nh Simulated lead model Frequency 2.5 MHz (double switching frequency), Simulated lead model 1.3 nh Reduces the need for input decoupling Input Series inductance (internal) L IN_INT 1.2 µh inductance in BCM arrays Effective Input capacitance (internal) CIN_INT Effective value at 38 V IN.37 µf ma W A Page 5 of 24 2/

6 Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -4 C T INTERNAL 125 C (T-Grade); All other specifications are at T INTERNAL = 25 ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit Powertrain (Cont.) Effective Output capacitance (internal) C OUT_INT Effective value at 47.5 V OUT 25.6 µf Effective Output capacitance (external) Array Maximum external output capacitance COUT_EXT C OUT_AEXT Excessive capacitance may drive module into SC protection C OUT_AEXT Max = N *.5*C OUT_EXT Max Protection 1 µf Auto Restart Time t AUTO_RESTART Startup into a persistent fault condition ms Non-Latching fault detection given V IN > V IN_UVLO+ Input overvoltage lockout threshold VIN_OVLO V Input overvoltage recovery threshold V IN_OVLO V Input overvoltage lockout hysteresis VIN_OVLO_HYST 1.5 V Overvoltage lockout response time t OVLO 1 µs Input undervoltage lockout threshold VIN_UVLO V Input undervoltage recovery threshold VIN_UVLO V Input undervoltage lockout hysteresis VIN_UVLO_HYST 15 V Undervoltage lockout response time t UVLO 1 µs From V IN = V IN_UVLO+ to powertrain active, EN floating Undervoltage startup delay t UVLO+_DELAY (i.e One time Startup delay form 2 ms application of V IN to V OUT ) Soft-Start time t SOFT-START From powertrain active 1 ms Fast Current limit protection disabled during Soft-Start Output overcurrent trip threshold I OCP A Output overcurrent response time constant t OCP Effective internal RC filter 3.2 ms Short circuit protection trip threshold I SCP 45 A Short circuit protection response time t SCP 1 µs Overtemperature shutdown threshold t OTP Temperature sensor located inside controller IC 125 ºC Undertemperature shutdown threshold t UTP Temperature sensor located inside controller IC -45 ºC Startup into a persistent fault condition. Undertemperature Restart time t UTP_RESTART 3 s Non-Latching fault detection given V IN > V IN_UVLO+ Page 6 of 24 2/

7 Output Power vs. Case Temperature Output Power (W) Case Temperature ( C) One side cooling One side cooling and leads Double Sided cooling and le Figure 1 Safe thermal operating area Output Power vs Input Voltage Output Current vs Input Voltage Output Power (W) Output Current (A) Input Voltage (V) Input Voltage (V) P (ave) P (pk), t < 1 ms I (ave) I (pk), t < 1 ms Figure 2 Safe electrical operating area Output Capacitance (% Rated C OUT MAX) Startup Load Current vs Output Capacitance Load Current (% I OUT_AVG_O ) Figure 3 Safe operating area; Start Up Load current vs. Output capacitance Page 7 of 24 2/

8 Signal Characteristics Specifications apply over all line, load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -4 C T INTERNAL 125 C (T-Grade); All other specifications are at T INTERNAL = 25 ºC unless otherwise noted. The TM pin is a standard analog I/O configured as an output from an internal µc. µc 25 khz PWM output internally pulled high to 3.3 V. Temperature Monitor The TM pin monitors the internal temperature of the controller IC within an accuracy of ±5 C. SIGNAL TYPE STATE ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN TYP MAX UNIT Start Up Powertrain active to TM time t VAUX Powertrain active to TM PWM 1 µs TM Duty Cycle V TM % TM Current I TM 4 ma Recommended External filtering: DIGITAL Regular TM Capacitance (External) C TM_EXT Recommended External filtering.1 µf OUTPUT Operation TM Resistance (External) R TM_EXT Recommended External filtering 1 kω Specifications using recommended filter: TM Gain A TM 1 mv/ C TM Voltage Reference V TM_AMB Controller T INTERNAL = 27 C 1.27 V R TM_EXT = 1 KΩ, C TM_EXT =.1 µf, 28 mv TM Voltage Ripple V TM_PP V IN = 38 V, I OUT = 25.7 A T INTERNAL 1ºC 4 mv The EN pin is a standard analog I/O configured as an input to an internal µc. It is internally pulled high to 3.3 V. ENABLE Control When held low the BCM internal bias will be disabled and the powertrain will be inactive. In an array of BCMs, EN pins should be interconnected to synchronize startup and permit startup into full load conditions. SIGNAL TYPE STATE ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN TYP MAX UNIT ANALOG INPUT Start Up Regular Operation EN Pull-down Resistance (External) R EN_EXT Module may not start with lower value.4 kω EN to Powertrain active time t EN_START V IN > V IN_UVLO+, EN held low both 25 µs conditions satisfied for t > t UVLO+_DELAY EN Voltage Threshold V EN_TH.7 V EN Resistance (Internal) R EN_INT Internal pull up resistor 1.5 kω EN Disable Threshold V EN_DISABLE_TH.3 V Fault Time off t ENABLE_OFF Module will ignore attempts to ms re-enable during time off Page 8 of 24 2/

9 Signal Characteristics (Cont.) Specifications apply over all line, load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -4 C T INTERNAL 125 C (T-Grade); All other specifications are at T INTERNAL = 25 ºC unless otherwise noted. The VAUX pin is a standard analog I/O configured as an output from an internal µc. VAUX is internally connected to µc output as internally pulled high to a 3.3 V regulator with 2% tolerance, a 1% resistor of 1.5 KΩ. Auxilary Voltage Source VAUX can be used as a "Ready to process full power" flag. This pin transitions VAUX voltage after a 2 ms delay from the start of powertrain activating, signaling the end of softstart. VAUX can be used as "Fault flag". This pin is pulled low internally when a fault protection is detected. SIGNAL TYPE STATE ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN TYP MAX UNIT Start Up Powertrain active to VAUX time t VAUX Powertrain active to VAUX high 2 ms VAUX Voltage V VAUX V ANALOG VAUX Avaliable Current I VAUX 4 ma OUTPUT Regular 5 mv VAUX Voltage Ripple V VAUX_PP Operation T INTERNAL 1ºC 1 mv VAUX Capacitance (External) C VAUX_EXT.1 µf VAUX Resistance (External) R VAUX_EXT V IN < V µc_active 1.5 kω Fault VAUX Fault Response Time t FR_TM From fault detection to 1 µs VAUX = 2.8 V, C VAUX = pf Page 9 of 24 2/

10 BCM Module Timing diagram INPUT VOLTAGE TURN-OFF INPUT VOLTAGE TURN-ON EN & VAUX INTERNAL Pull-up µc INITIALIZE OUTPUT TURN-ON INPUT OVER VOLTAGE INPUT RESTART ENABLE PULLED LOW ENABLE PULLED HIGH SHORT CIRCUIT EVENT INPUT BIDIR OUTPUT OUTPUT OUTPUT +IN EN VOUT VAUX TM VIN_UVLO+ VµC_ACTIVE tuvlo+_delay VIN_OVLO+ VIN_OVLO- VNOM VIN_UVLOtSCP tvaux twait tenable_off tauto-restart STARTUP OVER VOLTAGE ENABLE CONTROL OVER CURRENT SHUTDOWN Page 1 of 24 2/

11 High Level Functional State Diagram Conditions that cause state transitions are shown along arrows. Sub-sequence activities listed inside the state bubbles. Application of V IN V µc < V IN < V IN_UVLO+ STANDBY SEQUENCE TM Low EN High VAUX Low Powertrain Stopped Fault Autorecovery V IN > V IN_UVLO+ ENABLE falling edge, Output OVP, or OTP detected Input OVLO or UVLO, Output UVP, or UTP detected STARTUP SEQUENCE TM Low EN High VAUX Low Powertrain Stopped t UVLO+_DELAY expired ONE TIME DELAY INITIAL STARTUP FAULT SEQUENCE TM Low EN High VAUX Low Powertrain Stopped ENABLE falling edge, Output OVP, or OTP detected Input OVLO or UVLO, Output UVP, or UTP detected Short Circuit detected SUSTAINED OPERATION TM PWM EN High VAUX Low Powertrain Active Page 11 of 24 2/

12 Application Characteristics BCM38y475x1K2A3 The following values, typical of an application environment, are collected using one side cooling thermal solution unless otherwise noted. See associated figures for general trend data. Power Dissipation (W) No Load Power Dissipation vs. Line T TOP SURFACE CASE : Input Voltage (V) - 4 C 25 C 8 C Full Load Efficiency (%) Full Load Efficiency vs. T CASE V IN : Case Temperature (ºC) 26 V 38 V 41 V Figure 4 No load power dissipation vs. V IN Figure 5 Full load efficiency vs. temperature; V IN Efficiency (%) Efficiency and Power Dissipation, -4º Case η P D Power Dissipation (W) Efficiency (%) Efficiency and Power Dissipation, 25º Case η P D Power Dissipation (W) Load Current (A) Load Current (A) V IN : 26 V 38 V 41 V V IN : 26 V 38 V 41 V Figure 6 Efficiency and power dissipation at T INTERNAL = -4 C Figure 7 Efficiency and power dissipation at T INTERNAL = 25 C Efficiency (%) Efficiency and Power Dissipation, 8º Case η P D Power Dissipation (W) R OUT (mω) R OUT vs. T CASE at V IN = 38 V Load Current (A) V IN : 26 V 38 V 41 V Figure 8 Efficiency and power dissipation at T INTERNAL = 8 C Case Temperature ( C) I OUT : 25.7 A Figure 9 R OUT vs. temperature Page 12 of 24 2/

13 Voltage Ripple (mv PK-PK ) Output Voltage Ripple vs. Load Load Current (A) V IN : 38 V Figure 1 V RIPPLE vs. I OUT ; No external C OUT. Board mounted module, scope setting : 2 MHz analog BW Figure 11 Full load ripple, 2.2 µf C IN ; No external C OUT. Board mounted module, scope setting : 2 MHz analog BW Figure 12 A 25.7 A transient response: C IN = 2.2 µf, no external C OUT Figure A A transient response: C IN = 2.2 µf, no external C OUT Figure 14 Start up from application of V IN = 38 V, 5% I OUT, 1% C OUT Figure 15 Start up from application of EN with pre-applied V IN = 38 V, 5% I OUT, 1% C OUT Page 13 of 24 2/

14 General Characteristics Specifications apply over all line, load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -4 C T INTERNAL 125 C (T-Grade); All other specifications are at T INTERNAL = 25 ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit Mechanical Length L / [2.479] / [2.494] / [2.59] mm / [in] Width W / [.893] 22.8 / [.898] / [.93] mm / [in] Height H 7.21 / [.284] 7.26 / [.286] 7.31 / [.288] mm / [in] Volume Vol Without heatsink 1.48 / [.64] cm 3 / [in 3 ] Weight W 41 / [1.45] g / [oz] Nickel Lead finish Palladium.2.15 µm Gold.3.51 Thermal Operating temperature T INTERNAL BCM38P475T1K2A3 (T-Grade) C BCM38P475M1K2A3 (M-Grade) N/A N/A C Estimated thermal resistance to Thermal resistance top side f INT-TOP maximum temperature internal 1.24 C/W component from isothermal top Estimated thermal resistance to Thermal resistance leads f INT-LEADS maximum temperature internal 7 C/W component from isothermal leads Estimated thermal resistance to Thermal resistance bottom side f INT-BOTTOM maximum temperature internal 1.24 C/W component from isothermal bottom Thermal capacity 34 Ws / C Assembly Storage Temperature T ST BCM38P475T1K2A3 (T-Grade) C BCM38P475M1K2A3 (M-Grade) N/A N/A C ESD Withstand ESD HBM ESD CDM Human Body Model, "ESDA / JEDEC JDS-1-212" Class I-C (1kV to < 2 kv) Charge Device Model, "JESD 22-C11-E" Class II (2V to < 5V) Page 14 of 24 2/

15 General Characteristics (Cont.) Specifications apply over all line, load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -4 C T INTERNAL 125 C (T-Grade); All other specifications are at T INTERNAL = 25 ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit Soldering [1] Peak temperature Top case 135 C Peak temperature gradient Temp Gradient is measured at the (Top CASE - Lead) time the lead is in solder and reaches 141 C/s its maximum temp of 257ºC Temp Gradient is at the moment that Peak temperature gradient the lead top (interconnect) reaches its 82 C/s (Top CASE - Lead) interconnect maximum temp of 199ºC. At that time temp of top of the ChiP is 117ºC. Safety IN to OUT 4,242 Isolation voltage V HIPOT IN to CASE 2,121 VDC OUT to CASE 2,121 Isolation capacitance C IN_OUT Unpowered unit pf Isolation resistance R IN_OUT At 5 Vdc 1 MΩ MTBF MIL-HDBK-217Plus Parts Count - 25 C Ground Benign, Stationary, Indoors / Computer Telcordia Issue 2 - Method I Case III; 25 C Ground Benign, Controlled ctuvus Agency approvals / standards curus CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable 3.53 MHrs 3.9 MHrs [1] Product is not intended for reflow solder attach. Page 15 of 24 2/

16 BCM Module Block Diagram +VIN /4 Startup Circuit SEPIC EN C9 C1 C1 C2 C3 C4 C5 C6 C7 Cr C8 IIN Q1 L1 COUT +VOUT -VOUT Current Flow detection + Forward IIN sense VAUX +VIN EN -VIN TM SEPIC +Vcc TM PWM EN Temperature Sensor Cntrl On/Off Fast Current Limit Differential Current Sensing Primary Stage Lr Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q1 Secondary Stage Full-Bridge Synchronous Rectification Q11 Q12 Digital Controller Analog Controller 1.5 kω 1.5 kω ( +VIN /4 ) - X 3.3v Linear Regulator VAUX Over Voltage UnderVoltage Over-Temp Under-Temp Startup / Re-start Delay Soft-Start Modulator Slow Current Limit -Vcc Primary and Secondary Gate Drive Transformer +VIN /4 Page 16 of 24 2/

17 Sine Amplitude Converter Point of Load Conversion L IN_LEADS = 6.7 nh II OUT 1.77 nh R OUT 24.2 mω R OUT L OUT_LEADS = 1.3 nh + R CIN 21.5 mω RC IN V I 139 mω RC R COUT OUT 51 µω + V IN IN C IN C IN.37 µf L IN_INT = 1.2 µh IIQ Q 25.8 ma 1/8 I OUT + + 1/8 V IN K C OUT C OUT 25.6 µf V OUT OUT Figure 16 BCM module AC model The Sine Amplitude Converter (SAC ) uses a high frequency resonant tank to move energy from input to output. (The resonant tank is formed by Cr and leakage inductance Lr in the power transformer windings as shown in the BCM module Block Diagram). The resonant LC tank, operated at high frequency, is amplitude modulated as a function of input voltage and output current. A small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieving high power density. The BCM38y475x1K2A3 SAC can be simplified into the preceeding model. The use of DC voltage transformation provides additional interesting attributes. Assuming that R OuT = Ω and I q = A, Eq. (3) now becomes Eq. (1) and is essentially load independent, resistor R is now placed in series with V In. V IN Vin + R IN R SAC SAC K K = = 1/32 1/8 V OUT Vout At no load: V OUT = V IN K (1) K represents the turns ratio of the SAC. Rearranging Eq (1): K= V OUT (2) V IN Figure 17 K = 1/8 Sine Amplitude Converter with series input resistor The relationship between V In and V OuT becomes: V OUT = (V IN I IN R IN ) K (5) In the presence of load, V OuT is represented by: Substituting the simplified version of Eq. (4) (I q is assumed = A) into Eq. (5) yields: V OUT = V IN K I OUT R OUT (3) V OUT = V IN K I OUT R IN K 2 (6) and I OuT is represented by: I OUT = I IN I Q (4) K R OuT represents the impedance of the SAC, and is a function of the R DSOn of the input and output MOSFETs and the winding resistance of the power transformer. I q represents the quiescent current of the SAC control, gate drive circuitry, and core losses. Page 17 of 24 2/

18 This is similar in form to Eq. (3), where R OuT is used to represent the characteristic impedance of the SAC. However, in this case a real R on the input side of the SAC is effectively scaled by K 2 with respect to the output. Assuming that R=1Ω, the effective R as seen from the secondary side is 15.6 mω, with K= 1/8. A similar exercise should be performed with the additon of a capacitor or shunt impedance at the input to the SAC. A switch in series with V In is added to the circuit. This is depicted in Figure 16. V IN Vin + S C SAC SAC K = 1/8 K 1/32 Figure 18 Sine Amplitude Converter with input capacitor V OUT Vout A change in V In with the switch closed would result in a change in capacitor current according to the following equation: I C (t) =C dv IN (7) dt Assume that with the capacitor charged to V In, the switch is opened and the capacitor is discharged through the idealized SAC. In this case, I C =I OUT K (8) Low impedance is a key requirement for powering a high-current, lowvoltage load efficiently. A switching regulation stage should have minimal impedance while simultaneously providing appropriate filtering for any switched current. The use of a SAC between the regulation stage and the point of load provides a dual benefit of scaling down series impedance leading back to the source and scaling up shunt capacitance or energy storage as a function of its K factor squared. However, the benefits are not useful if the series impedance of the SAC is too high. The impedance of the SAC must be low, i.e. well beyond the crossover frequency of the system. A solution for keeping the impedance of the SAC low involves switching at a high frequency. This enables small magnetic components because magnetizing currents remain low. Small magnetics mean small path lengths for turns. use of low loss core material at high frequencies also reduces core losses. The two main terms of power loss in the BCM module are: n no load power dissipation (P nl ): defined as the power used to power up the module with an enabled powertrain at no load. n Resistive loss (R OuT ): refers to the power loss across the BCM module modeled as pure resistive impedance. P DISSIPATED = P NL + P ROUT (1) Therefore, P OUT = P IN P DISSIPATED = P IN P NL P ROUT (11) The above relations can be combined to calculate the overall module efficiency: h = POUT = P IN P NL P ROUT (12) P IN P IN substituting Eq. (1) and (8) into Eq. (7) reveals: I OUT = C dv OUT (9) K 2 dt The equation in terms of the output has yielded a K 2 scaling factor for C, specified in the denominator of the equation. A K factor less than unity results in an effectively larger capacitance on the output when expressed in terms of the input. With a K = 1/8 as shown in Figure 17, C=1 µf would appear as C= 64 µf when viewed from the output. = V IN I IN P NL (I OUT ) 2 R OUT V IN I IN = 1 ( P NL + (I OUT ) 2 R OUT ) V IN IIN Page 18 of 24 2/

19 Input and Output Filter Design A major advantage of SAC systems versus conventional PWM converters is that the transformer based SAC does not require external filtering to function properly. The resonant LC tank, operated at extreme high frequency, is amplitude modulated as a function of input voltage and output current and efficiently transfers charge through the isolation transformer. A small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieving power density. This paradigm shi requires system design to carefully evaluate external filters in order to: n Guarantee low source impedance: To take full advantage of the BCM module s dynamic response, the impedance presented to its input terminals must be low from DC to approximately 5 MHz. The connection of the bus converter module to its power source should be implemented with minimal distribution inductance. If the interconnect inductance exceeds 1 nh, the input should be bypassed with a RC damper to retain low source impedance and stable operation. With an interconnect inductance of 2 nh, the RC damper may be as high as 1 µf in series with.3 Ω. A single electrolytic or equivalent low-q capacitor may be used in place of the series RC bypass. n Further reduce input and/or output voltage ripple without sacrificing dynamic response: Given the wide bandwidth of the module, the source response is generally the limiting factor in the overall system response. Anomalies in the response of the source will appear at the output of the module multiplied by its K factor. n Protect the module from overvoltage transients imposed by the system that would exceed maximum ratings and induce stresses: The module input/output voltage ranges shall not be exceeded. An internal overvoltage lockout function prevents operation outside of the normal operating input range. Even when disabled, the powertrain is exposed to the applied voltage and power MOSFETs must withstand it. Total load capacitance at the output of the BCM module shall not exceed the specified maximum. Owing to the wide bandwidth and low output impedance of the module, low-frequency bypass capacitance and significant energy storage may be more densely and efficiently provided by adding capacitance at the input of the module. At frequencies <5 khz the module appears as an impedance of R OuT between the source and load. Within this frequency range, capacitance at the input appears as effective capacitance on the output per the relationship defined in Eq. (13). C OUT = C IN (13) K 2 This enables a reduction in the size and number of capacitors used in a typical system. Thermal Considerations The ChiP package provides a high degree of flexibility in that it presents three pathways to remove heat from internal power dissipating components. Heat may be removed from the top surface, the bottom surface and the leads. The extent to which these three surfaces are cooled is a key component for determining the maximum power that is available from a ChiP, as can be seen from Figure 1. Since the ChiP has a maximum internal temperature rating, it is necessary to estimate this internal temperature based on a real thermal solution. Given that there are three pathways to remove heat from the ChiP, it is helpful to simplify the thermal solution into a roughly equivalent circuit where power dissipation is modeled as a current source, isothermal surface temperatures are represented as voltage sources and the thermal resistances are represented as resistors. Figure 18 shows the thermal circuit for a VI Chip BCM module 6123 in an application where the top, bottom, and leads are cooled. In this case, the BCM power dissipation is PD TOTAL and the three surface temperatures are represented as T CASE_TOP, T CASE_BOTTOM, and T LEADS. This thermal system can now be very easily analyzed using a SPICE simulator with simple resistors, voltage sources, and a current source. The results of the simulation would provide an estimate of heat flow through the various pathways as well as internal temperature. Power Dissipation (W) Thermal Resistance Top MAX INTERNAL TEMP Thermal Resistance Bottom Thermal Resistance Leads 1.24 C / W 7 C / W T CASE_BOTTOM ( C) + T LEADS ( C) + T CASE_TOP ( C) Alternatively, equations can be written around this circuit and analyzed algebraically: T INT PD = T CASE_TOP T INT PD = T CASE_BOTTOM T INT PD 3 7 = T LEADS PD TOTAL = PD 1 + PD 2 + PD 3 Where T InT represents the internal temperature and PD 1, PD 2, and PD 3 represent the heat flow through the top side, bottom side, and leads respectively. Power Dissipation (W) 1.24 C / W Figure 19 Double side cooling and leads thermal model Thermal Resistance Top 1.24 C / W Thermal Resistance Bottom MAX INTERNAL TEMP Thermal Resistance Leads 1.24 C / W 7 C / W T CASE_BOTTOM ( C) T LEADS ( C) + T CASE_TOP ( C) Figure 2 One side cooling and leads thermal model + + Page 19 of 24 2/

20 Figure 19 shows a scenario where there is no bottom side cooling. In this case, the heat flow path to the bottom is le open and the equations now simplify to: T INT PD = T CASE_TOP T INT PD 3 7 = T LEADS Vin Z IN_EQ1 BCM 1 R _1 Z OUT_EQ1 Vout PD TOTAL = PD 1 + PD 3 Z IN_EQ2 BCM 2 Z OUT_EQ2 R _2 Thermal Resistance Top 1.24 C / W MAX INTERNAL TEMP + DC Load Thermal Resistance Bottom Thermal Resistance Leads 1.24 C / W 7 C / W Power Dissipation (W) T CASE_BOTTOM ( C) T LEADS ( C) T CASE_TOP ( C) + Z IN_EQn BCM n Z OUT_EQn R _n Figure 21 One side cooling thermal model Figure 2 shows a scenario where there is no bottom side and leads cooling. In this case, the heat flow path to the bottom is le open and the equations now simplify to: T INT PD = T CASE_TOP PD TOTAL = PD 1 Please note that Vicor has a suite of online tools, including a simulator and thermal estimator which greatly simplify the task of determining whether or not a BCM thermal configuration is valid for a given condition. These tools can be found at: Current Sharing The performance of the SAC topology is based on efficient transfer of energy through a transformer without the need of closed loop control. For this reason, the transfer characteristic can be approximated by an ideal transformer with a positive temperature coefficient series resistance. This type of characteristic is close to the impedance characteristic of a DC power distribution system both in dynamic (AC) behavior and for steady state (DC) operation. When multiple BCM modules of a given part number are connected in an array they will inherently share the load current according to the equivalent impedance divider that the system implements from the power source to the point of load. Some general recommendations to achieve matched array impedances include: n Dedicate common copper planes within the PCB to deliver and return the current to the modules. n Provide as symmetric a PCB layout as possible among modules n An input filter is required for an array of BCMs in order to prevent circulating currents. Figure 22 BCM module array Fuse Selection In order to provide flexibility in configuring power systems VI Chip modules are not internally fused. Input line fusing of VI Chip products is recommended at system level to provide thermal protection in case of catastrophic failure. The fuse shall be selected by closely matching system requirements with the following characteristics: n Current rating (usually greater than maximum current of BCM module) n Maximum voltage rating (usually greater than the maximum possible input voltage) n Ambient temperature n nominal melting I 2 t n Recommend fuse: 5 A Bussmann PC-Tron Reverse Operation BCM modules are capable of reverse power operation. Once the unit is started, energy will be transferred from secondary back to the primary whenever the secondary voltage exceeds V In K. The module will continue operation in this fashion for as long as no faults occur. The BCM38y475x1K2A3 has not been qualified for continuous operation in a reverse power condition. Furthermore fault protections which help protect the module in forward operation will not fully protect the module in reverse operation. Transient operation in reverse is expected in cases where there is significant energy storage on the output and transient voltages appear on the input. Transient reverse power operation of less than 1 ms, 1% duty cycle is permitted and has been qualified to cover these cases. For further details see An:16 using BCM Bus Converters in High Power Arrays. Page 2 of 24 2/

21 BCM Module Through Hole Package Mechanical Drawing and Recommended Land Pattern 63.34± ± ± ± (3) PL. TOP VIEW (COMPONENT SIDE) BOTTOM VIEW [.2] SEATING. PLANE 7.26±.5.286± (9) PL (9) PL (4) PL. NOTES: 1- RoHS COMPLIANT PER CST-1 LATEST REVISION. 2- UNLESS SPECIFIED OTHERWISE, DIMESIONS ARE MM / [INCH] PLATED THRU.25 [.1] ANNULAR RING (3) PL. 3.91± ± ± ± ±.8.54± ±.8.162±.3 8.±.8.315± ±.8.54±.3 8.±.8.315±.3 +IN TM EN VAUX -IN +OUT -OUT +OUT -OUT 8.25±.8.325± ±.8.18± ±.8.18± ±.8.325± PLATED THRU.25 [.1] ANNULAR RING RECOMMENDED HOLE PATTERN (COMPONENT SIDE) PLATED THRU.38 [.15] ANNULAR RING (4) PL. Page 21 of 24 2/

22 BCM Module Recommended Top Heat Sink Push Pin Location (4) PL (4) PL TYP / [.3] (4) PL R2..79 TYP X M2-.4 x 3.5MM DP TAP MIN TYP NOTES: 1- UNLESS SPECIFIED OTHERWISE, DIMESIONS ARE MM / [INCH]. 2- MAKE FROM VICOR P/N FINISH: CLEAR FINISH, RoHS COMPLIANT PER CST-1, LATEST REVISION PER A.) CHROMIUM FREE, OR B.) TRIVALENT CHROMIUM IN ACCORDANCE WITH MIL-DTL-5541, TYPE II, CLASS 1A OR 3. SEE CST-3 FOR TYPES OF AVAILABLE FINISHES. 4- REMOVE ALL BURRS AND SHARP EDGES. 5- DENOTES CRITICAL CHARACTERISTIC FOR LOT INSPECTION. 6- ROHS COMPLIANT, LEAD FREE PER CST-1 LATEST REVISION Page 22 of 24 2/

23 BCM Module Recommended Belly Heat Sink Mounting Location 61.5± ± A (4) PL THRU ALL (3) PL. R2..79 (4) PL (4) PL (4) PL. NOTES:.13/[.5] T A.8 / 25.4 X 25.4 [.3 / 1 X 1] SEE NOTE 5 1. CLEAR FINISH, RoHS COMPLIANT PER CST-1, LATEST REVISION PER A.) CHROMIUM FREE, OR B.) TRIVALENT CHROMIUM IN ACCORDANCE WITH MIL-DTL-5541, TYPE II, CLASS 1A OR 3. SEE CST-3 FOR TYPES OF AVAILABLE FINISHES. 2. SEE VICOR P/N 451 FOR EXTRUSION PROFILE. 3. MATERIAL: ALUM ALLOY 663-T5 4. REMOVE ALL BURRS AND BREAK ALL SHARP EDGES. 5. IF NECESSARY, EXTRUDE OVERSIZE AND MACHINE BASE AND INSIDE SURFACE TO ACHIEVE FLATNESS AND PARALLELISM. 6. DENOTES CRITICAL CHARACTERISTIC FOR LOT INSPECTION. 7. UNLESS SPECIFIED OTHERWISE, DIMESIONS ARE MM / [INCH]. M2.5X.45 THRU ALL (4) PL (4) PL. NON-PLATED THRU HOLE ±.8.116±.3 PLATED THRU HOLE ANNULAR RING CHIP OUTLINE PLATED THRU HOLE ANNULAR RING 2.29±.8.9±.3 PLATED THRU HOLE ANNULAR RING (3) PL (3) PL AND 4623 RECOMMENDED LAND PATTERN TOP SIDE SHOWN APPLIES TO THRU HOLE DEVICES ONLY Page 23 of 24 2/

24 Vicor s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor s product warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. Specifications are subject to change without notice. Vicor s Standard Terms and Conditions All sales are subject to Vicor s Standard Terms and Conditions of Sale, which are available on Vicor s webpage or upon request. Product Warranty In Vicor s standard terms and conditions of sale, Vicor warrants that its products are free from non-conformity to its Standard Specifications (the Express Limited Warranty ). This warranty is extended only to the original Buyer for the period expiring two (2) years after the date of shipment and is not transferable. UNLESS OTHERWISE EXPRESSLY STATED IN A WRITTEN SALES AGREEMENT SIGNED BY A DULY AUTHORIZED VICOR SIGNATORY, VICOR DISCLAIMS ALL REPRESENTATIONS, LIABILITIES, AND WARRANTIES OF ANY KIND (WHETHER ARISING BY IMPLICATION OR BY OPERATION OF LAW) WITH RESPECT TO THE PRODUCTS, INCLUDING, WITHOUT LIMITATION, ANY WARRANTIES OR REPRESENTATIONS AS TO MERCHANTABILITY, FITNESS FOR PARTICULAR PURPOSE, INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT, OR ANY OTHER MATTER. This warranty does not extend to products subjected to misuse, accident, or improper application, maintenance, or storage. Vicor shall not be liable for collateral or consequential damage. Vicor disclaims any and all liability arising out of the application or use of any product or circuit and assumes no liability for applications assistance or buyer product design. Buyers are responsible for their products and applications using Vicor products and components. Prior to using or distributing any products that include Vicor components, buyers should provide adequate design, testing and operating safeguards. Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of this warranty. Life Support Policy VICOR S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms and Conditions of Sale, the user of Vicor products and components in life support applications assumes all risks of such use and indemnifies Vicor against all liability and damages. Intellectual Property Notice Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Interested parties should contact Vicor's Intellectual Property Department. The products described on this data sheet are protected by the following U.S. Patents Numbers: 5,945,13; 6,43,9; 6,71,257; 6,911,848; 6,93,893; 6,934,166; 6,94,13; 6,969,99; 7,38,917; 7,145,186; 7,166,898; 7,187,263; 7,22,646; 7,361,844; D496,96; D55,114; D56,438; D59,472; and for use under 6,975,98 and 6,984,965. Vicor Corporation 25 Frontage Road Andover, MA, USA 181 Tel: Fax: Customer Service: custserv@vicorpower.com Technical Support: apps@vicorpower.com Page 24 of 24 2/