G-PON ONU Small Form-Factor Transceiver
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1 G-PON ONU Small Form-Factor Transceiver GPN Features Compliant with ITU-T G Class B+ Tx 1310 nm/rx 1490 nm 2X5 pins Small Form Factor style package/smf Pigtail with SC/APC Connector Wave Solderable and Aqueous Washable Class 1 Laser Int. Safety Standard IEC Compliant Energy Level 1 IEC Compliant Uncooled 1310 nm DFB Laser diode with MQW structure Receiver APD-TIA Complies with Telcordia GR-468-CORE Single +3.3V power supply Applications FTTX Ambient Operating Temperature: -5 to 70 C DC/AC Coupling In/Out Interface SD LVTTL Level Mbit/s Upstream Burst mode & Mbit/s Downstream Continuous mode Absolute Maximum Ratings Parameter Symbol Minimum Maximum Units Power Supply Voltage V CC V Soldering Temperature (10 seconds on leads only) C Storage Temperature T stg C Bending Radius of Pigtail Fiber - 30 mm Operating Conditions Power Supply Voltage V CC V Ambient Operating Temperature T A C Humidity (without dew) 5 90 % Data Rate (Transmitter, Burst mode) Mbit/s Data Rate (Receiver, Continuous mode) Mbit/s Oplink Communications, R Inc.
2 Transmitter Optical Specifications (-5 C< T A Optical Transmit Average Power 1) P O dbm Output Center Wavelength λ nm Average Power of OFF Transmitter P OFF dbm Output Spectrum Width 2) Δλ nm Extinction Ratio E R db Side Mode Suppression Ratio 3) Sr db Relative Intensity Noise 4) RIN 15 OMA db/hz Output Eye Mask Compliant with ITU-T G (Fig-1) Maximum Tx Enable T ON bits Maximum Tx Disable T OFF bits Optical Rise Time 5) T r ns Optical Fall Time 5) T f ns Tolerance to the Transmitter Incident Light Power - 15 db 6) Transmitter Reflectance - 6 db Jitter Transfer Fig-2 Jitter Generation from 4.0 KHz to 10.0 MHz 0.33 UIp-p 1) Continuous mode 2) -20 db width 3) CW 4) Under 15 db reflection 5) 20%-80% Value 6)@1310nm Receiver Optical Specifications (-5 C< T A Sensitivity 1) dbm Maximum Input Power Pin - 8 dbm SD Asserted 2) Pa dbm SD Deasserted 3) Pd dbm SD Hysteresis db Tolerance to the Reflected Optical Power 10 db Maximum Reflectance 4) - 20 db Wavelength of Operation nm WDM Filter Isolation 5) 30 db Jitter Tolerance 1) With BER better than or equal to 1x10-10,PRBS NRZ, ER=10 db. LD turn ON 2) Measured on transition: low to high 3) Measured on transition: high to low Fig-3 Transmitter Electrical Specifications (-5 C< T A Power Supply Current I CC 200 ma Transmit Burst Enable Voltage V BEN 2.0 V CC V Transmit Burst Disable Voltage V BDIS V 1) Data Input Voltage-Low V IL -V CC V Data Input Voltage-High 1) V IH -V CC V 1) LVPECL 2 R
3 Receiver Electrical Specifications (-5 C< T A Power Supply Current I CC 160 ma Data Output Voltage-Single Ended 1) mv p-p Data Output Voltage-Differential 1) mv p-p 2) SD Output Voltage Low V SDL 0.8 V SD Output Voltage High 2) V SDH 2 V CC V 1) AC coupled outputs 2) LVTTL Output Figure 1 - Mask of the eye diagram 1+y1 1 y4 y3 0.5 y2 y1 0 -y1 0 x1 x2 0.5 x3 x4 1 1 UI Mbit/s Mbit/s Mbit/s Mbit/s x1/x4 0.10/ / /0.78 For further study x2/x3 0.35/ / /0.60 For further study y1/y4 0.13/ / /0.83 For further study y2/y3 0.20/ / /0.80 For further study Optical Transmitter Attenuator* O/E converter, fourth-order Thomson filter** Waveform monitor * Attenuator is used if neccessary. ** Cut-off frequency (3 db attenuation frequency) of the filter is 0.75 times output nominal bit rate. G.984.2_F03 Figure 2 - Jitter transfer for ONU Figure 3 - Jitter tolerance mask for ONU P Jitter gain [db] fc slope = -20 db/dec Frequency Input jitter amplitude A2 A1 f0 slope = -20 db/dec ft Frequency Downstream bit rate (Mbit/s) fc [khz] P [db] (informative) G.984.2_F04 Downstream bit rate (Mbit/s) ft [khz] f0 [khz] A1 [UIp-p] A2 [UIp-p] G.984.2_F05 3 R
4 Connection Diagram PIN Symbol Notes 1 VEER Receiver ground 2 VCCR +3.3V Receiver power supply 3 SD Receiver signal detect, High for normal I/P power 4 RD- Receiver Data Out Bar (internally AC-Coupled) No internal terminations will be provided 5 RD+ Receiver Data Out (internally AC-Coupled) No internal terminations will be provided 6 VCCT +3.3V transmitter power supply 7 VEET Transmitter ground 8 TX_BRST Transmitter burst output control (LVTTL), High for Burst enable, Low for Burst disable 9 TD+ Transmitter non-inverted data input, DC-Coupled 10 TD- Transmitter inverted data input, DC-Coupled Laser Safety: This ingle mode transceiver is a Class1 laser product. It complies with IEC 825 and FDA 21 CFR and The transceiver must be operated within the specified temperature and voltage limits. The optical ports of the module shall be terminated with an optical connector or with a dust plug. DATE OF MANUFACTURE: This product complies with 21 CFR and Meets Class I Laser Safety Requirements Recommended Circuit Schematic TRANSCEIVER LD Driver TX_GND 7 TX_BRST 8 TX+ 9 TX- 10 R10 R9 Zo=50R SerDesIC TX_BRST LVPECL Pre Amp Post Amp TX_ RX_ 6 C3 L1 2 C2 L2 C1 SD 3 4 RX- 5 RX+ R8 R2 R7 R1 Zo=50R R5 R6 Zo=50R SD LVPECL RX_GND 1 C1=4.7µF, C2=C3=C4=C5=C6=C7=0.1µF, L1=L2=1µH R5=R7=R9=130R, R6=R8=R10=82R R1=R3=82R, R2=R4=130R For SD LVTTL Level, R5=R6=N.C. R4 R3 The split-load terminations for ECL signals need to be located at the input of devices receiving those ECL signals. The power supply filtering is required for good EMI performance. Use short tracks from the inductor L1/L2 to the module Rx and Tx. A GND plane under the module is required for good EMI and sensitivity performance. 4 R
5 Recommended Circuit Board Layout Dimension in millimeter (inches) NOTES: 1. This figure describe the recommended circuit board layout for the sff transceiver. 2. The hatched areas are keep-out areas reserved for housing standoff. No metal traces or ground connection in keep-out areas. 3. Holes for housing leads must be tied to signal ground. Printed Circuit Board Layout Considerations A fiber-optic receiver employs a very high gain, wide bandwidth transimpedance amplifier. This amplifier detects and amplifies signals that are only tens of na in amplitude when the receiver is operating near its limit. Any unwanted signal currents that couple into the receiver circuitry causes a decrease in the receiver s sensitivity and can also degrades the of the receiver s signal detect (SD) circuit. To minimize the coupling of unwanted noise into the receiver, careful attention must be given to the printed circuit board. At a minimum, a double-sided printed circuit board (PCB) with a large component side ground plane beneath the transceiver must be used. In applications that include many other high speed devices, a multi-layer PCB is highly recommended. This permits the placement of power and ground on separate layers, which all them to be isolated from the signal lines. Multilayer construction also permits the routing of signal traces away from high level, high speed signal lines. To minimize the possibility of coupling noise into the receiver section, high level, high speed signals such as transmitter inputs and clock lines should be routed as far away as possible from the receiver pins. Noise that couples into the receiver through the power supply pins can also degrade performance. It is recommended that a pi filter is designed in both the transmitter and receiver power supplies. EMI and ESD Considerations Transceivers offer a metal case and shielded design to minimize the EMI challenge facing the host equipment designer. These transceivers provided superior EMI performance. This greatly assists the designer in the management of the overall system EMI performance. 5 R
6 Package Diagram (Units=mm) Landing Pkwy Fremont, CA Tel: (510) Fax: (510) Ordering Information GPN 4 G N J B 5 C P 3 G reserves the right to make changes in equipment design or specifications without notice. Information supplied by Oplink Communications, Inc. is believed to be accurate and reliable. However, no responsibility is assumed by for its use nor for any infringements of third parties, which may result from its use. No license is granted by implication or otherwise under any patent right of 2008, 6 R
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