ICS558A-02 LVHSTL TO CMOS CLOCK DIVIDER. Description. Features. Block Diagram DATASHEET

Similar documents
ICS553 LOW SKEW 1 TO 4 CLOCK BUFFER. Description. Features. Block Diagram DATASHEET

LOW SKEW 1 TO 4 CLOCK BUFFER. Features

ICS542 CLOCK DIVIDER. Features. Description. Block Diagram DATASHEET. NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01

ICS HDTV AUDIO/VIDEO CLOCK SOURCE. Features. Description. Block Diagram DATASHEET

ICS NETWORKING AND PCI CLOCK SOURCE. Description. Features. Block Diagram DATASHEET

ICS LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER. Description. Features. Block Diagram DATASHEET

ICS LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER. Description. Features. Block Diagram DATASHEET

Features VDD 1 CLK1. Output Divide PLL 2 OE0 GND VDD. IN Transition Detector CLK1 INB. Output Divide PLL 2 OE0 GND

ICS2304NZ-1 LOW SKEW PCI/PCI-X BUFFER. Description. Features. Block Diagram DATASHEET

ICS GLITCH-FREE CLOCK MULITPLEXER. Features. Description. Block Diagram DATASHEET

Features VDD 2. 2 Clock Synthesis and Control Circuitry. Clock Buffer/ Crystal Oscillator GND

ICS660 DIGITAL VIDEO CLOCK SOURCE. Description. Features. Block Diagram DATASHEET

ICS571 LOW PHASE NOISE ZERO DELAY BUFFER. Description. Features. Block Diagram DATASHEET

ICS OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS. Description. Features (all) Features (specific) DATASHEET

IDT5V60014 LOW PHASE NOISE ZERO DELAY BUFFER. Description. Features. Block Diagram DATASHEET

ICS LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET

ICS650-40A ETHERNET SWITCH CLOCK SOURCE. Description. Features. Block Diagram DATASHEET

MK3722 VCXO PLUS AUDIO CLOCK FOR STB. Description. Features. Block Diagram DATASHEET

MK2703 PLL AUDIO CLOCK SYNTHESIZER. Description. Features. Block Diagram DATASHEET

ICS LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET

ICS511 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET

LOCO PLL CLOCK MULTIPLIER. Features

MK1413 MPEG AUDIO CLOCK SOURCE. Features. Description. Block Diagram DATASHEET

LOCO PLL CLOCK MULTIPLIER. Features

ICS7151A-50 SPREAD SPECTRUM CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET

IDT9170B CLOCK SYNCHRONIZER AND MULTIPLIER. Description. Features. Block Diagram DATASHEET

ICS NETWORKING CLOCK SYNTHESIZER. Description. Features. Block Diagram DATASHEET

MK74CB218 DUAL 1 TO 8 BUFFALO CLOCK DRIVER. Description. Features. Block Diagram DATASHEET. Family of IDT Parts

ICS QUAD PLL CLOCK SYNTHESIZER. Description. Features. Block Diagram PRELIMINARY DATASHEET

ICS722 LOW COST 27 MHZ 3.3 VOLT VCXO. Description. Features. Block Diagram DATASHEET

NETWORKING CLOCK SYNTHESIZER. Features

ICS309 SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTH. Description. Features. Block Diagram DATASHEET

TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER. Features

MK SPREAD SPECTRUM MULTIPLIER CLOCK. Description. Features. Block Diagram DATASHEET

MK2705 AUDIO CLOCK SOURCE. Description. Features. Block Diagram DATASHEET

MK SPREAD SPECTRUM MULTIPLIER CLOCK. Description. Features. Block Diagram DATASHEET

ICS LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER. Features. Description. Block Diagram INA INB SELA

2 TO 4 DIFFERENTIAL CLOCK MUX ICS Features

Features. Phase Detector, Charge Pump, and Loop Filter. External feedback can come from CLK or CLK/2 (see table on page 2)

ICS512 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET

ICS LOW PHASE NOISE CLOCK MULTIPLIER. Features. Description. Block Diagram DATASHEET

ICS502 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET

PCI-EXPRESS CLOCK SOURCE. Features

Features VDD. PLL Clock Synthesis and Spread Spectrum Circuitry GND

ICS LOW EMI CLOCK GENERATOR. Features. Description. Block Diagram DATASHEET

ICS7152A SPREAD SPECTRUM CLOCK GENERATOR. Description. Features. Block Diagram. Product Lineup DATASHEET

ICS663 PLL BUILDING BLOCK. Description. Features. Block Diagram DATASHEET

FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER. Features VDD PLL1 PLL2 GND

ICS276 TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER. Description. Features. Block Diagram DATASHEET

SERIALLY PROGRAMMABLE CLOCK SOURCE. Features

MK LOW PHASE NOISE T1/E1 CLOCK GENERATOR. Features. Description. Block Diagram DATASHEET. Pullable Crystal

ICS PCI-EXPRESS CLOCK SOURCE. Description. Features. Block Diagram DATASHEET

Features. EXTERNAL PULLABLE CRYSTAL (external loop filter) FREQUENCY MULTIPLYING PLL 2

ICS501 LOCO PLL CLOCK MULTIPLIER. Description. Features. Block Diagram DATASHEET

LOW PHASE NOISE CLOCK MULTIPLIER. Features

MK VCXO AND SET-TOP CLOCK SOURCE. Description. Features. Block Diagram DATASHEET

MK3711 LOW COST 8 TO 16 MHZ 3.3 VOLT VCXO. Features. Description. Block Diagram DATASHEET

MK AMD GEODE GX2 CLOCK SOURCE. Description. Features. Block Diagram DATASHEET

MK3727D LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO. Description. Features. Block Diagram DATASHEET

CLOCK DISTRIBUTION CIRCUIT. Features

ICS CLOCK SYNTHESIZER FOR PORTABLE SYSTEMS. Description. Features. Block Diagram PRELIMINARY DATASHEET

MK5811C LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET

ICS CLOCK MULTIPLIER AND JITTER ATTENUATOR. Description. Features. Block Diagram DATASHEET

3.3 VOLT FRAME RATE COMMUNICATIONS PLL MK1574. Features. Description. Block Diagram DATASHEET

ICS HIGH PERFORMANCE VCXO. Features. Description. Block Diagram DATASHEET

ICS83056I-01. General Description. Features. Block Diagram. Pin Assignment 6-BIT, 2:1, SINGLE-ENDED LVCMOS MULTIPLEXER ICS83056I-01

FEATURES 2:1 single-ended multiplexer Q nominal output impedance: 15Ω (V DDO BLOCK DIAGRAM PIN ASSIGNMENT 2:1, SINGLE-ENDED MULTIPLEXER ICS83052I

MK VCXO-BASED FRAME CLOCK FREQUENCY TRANSLATOR. Features. Description. Block Diagram DATASHEET. Pullable Crystal

Features. Applications

ICS663 PLL BUILDING BLOCK

MK3721 LOW COST 16.2 TO 28 MHZ 3.3 VOLT VCXO. Description. Features. Block Diagram DATASHEET. MK3721D is recommended for new designs.

ICS83021I. Features. General Description. Pin Assignment. Block Diagram 1-TO-1 DIFFERENTIAL- TO-LVCMOS/LVTTL TRANSLATOR

Features. Applications

ICS PLL BUILDING BLOCK

ICS Glitch-Free Clock Multiplexer

3.3 VOLT COMMUNICATIONS CLOCK PLL MK Description. Features. Block Diagram DATASHEET

BLOCK DIAGRAM PIN ASSIGNMENTS. 8302I-01 Datasheet. Low Skew, 1-to-2 LVCMOS / LVTTL Fanout Buffer W/ Complementary Output

FemtoClock Crystal-to-LVDS Clock Generator

ICS83032I 75MHZ, 3 RD OVERTONE OSCILLATOR W/DUAL LVCMOS/LVTTL OUTPUTS. 75MHZ, 3RD OVERTONE Integrated OSCILLATOR W/DUAL ICS83032I

Addr FS2:0. Addr FS2:0

1:2 LVCMOS/LVTTL-to-LVCMOS/LVTTL Zero Delay Buffer for Audio

ICS Pin Configuration. Features/Benefits. Specifications. Block Diagram DATASHEET LOW EMI, SPREAD MODULATING, CLOCK GENERATOR.

ICS Low Skew PCI / PCI-X Buffer. General Description. Block Diagram. Pin Configuration. Pin Descriptions OE CLK0

MK DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER. Features. Description. Block Diagram DATASHEET

PI6C49X0204A. Low Skew 1 TO 4 Clock Buffer. Features. Description. Block Diagram. Pin Assignment

ICS Low Skew Fan Out Buffers. Integrated Circuit Systems, Inc. General Description. Pin Configuration. Block Diagram. 28-Pin SSOP & TSSOP

FEATURES Four-bit, 2:1 single-ended multiplexer Nominal output impedance: 15Ω (V PIN ASSIGNMENT BLOCK DIAGRAM

RoHS compliant, Pb-free Industrial temperature range: 40 to +85 C Footprint-compatible with CDCLVC , 2.5, or 3.3 V operation 16-TSSOP

4/ 5 Differential-to-3.3V LVPECL Clock Generator

Storage Telecom Industrial Servers Backplane clock distribution

ICS9P936. Low Skew Dual Bank DDR I/II Fan-out Buffer DATASHEET. Description. Pin Configuration

Features. Applications

ICS2510C. 3.3V Phase-Lock Loop Clock Driver. Integrated Circuit Systems, Inc. General Description. Pin Configuration.

IDT5V80001 MOST CLOCK INTERFACE. Description. Features. Block Diagram DATASHEET

DS1135L 3V 3-in-1 High-Speed Silicon Delay Line

PI6C49X0204B Low Skew, 1-TO-4 LVCMOS/LVTTL Fanout Buffer Features Description Block Diagram Pin Assignment

Features. 1 CE Input Pullup

PI6C557-03B. PCIe 3.0 Clock Generator with 2 HCSL Outputs. Features. Description. Pin Configuration (16-Pin TSSOP) Block Diagram

ICS High Performance Communication Buffer. Integrated Circuit Systems, Inc. General Description. Block Diagram.

PI6C V/3.3V, 500 MHz Twelve 2-to-1 Differential LVPECL Clock Multiplexer. Description. Features. Block Diagram.

Transcription:

DATASHEET ICS558A-02 Description The ICS558A-02 accepts a high-speed LVHSTL input and provides four CMOS low skew outputs from a selectable internal divider (divide by 3, divide by 4). The four outputs are split into two banks of two outputs. Each bank has a separate output enable to tri-state the output buffers. The ICS558A-02 is a member of the IDT Clock Blocks TM family of clock generation, synchronization, and distribution devices. Features 16-pin TSSOP package LVHSTL inputs Accepts up to 250 MHz input frequency Four low skew (<250 ps) outputs Selectable internal divider of 3 or 4 Operating voltage of 3.3 V Available in a lead-free, RoHS compliant package NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 Block Diagram VDD OE0 4 CLK1 HCLK HCLK Output Divide /3 or /4 CLK2 CLK3 SEL CLK4 3 GND OE1 IDT 1 ICS558A-02 REV C 092409

Pin Assignment SEL 1 16 VDD VDD 2 15 VDD VDD 3 14 CLK1 HCLK 4 13 CLK2 HCLK 5 12 CLK3 GND 6 11 CLK4 GND 7 10 GND OE0 8 9 OE1 16 Pin 173 Mil (0.65mm) TSSOP Tri-State Table OE1 OE0 CLK 1, CLK 2 CLK 3, CLK 4 0 0 Tri-state Tri-state 0 1 Clock ON Tri-state 1 0 Tri-state Clock ON 1 1 Clock ON Clock ON Output Divide Selection SEL Output Divide 0 /3 1 /4 Pin Descriptions Pin Number Pin Name Pin Type Pin Description 1 SEL Input Select pin for output divider. See table above. Internal pull-up to VDD. 2 VDD Power Connect to +3.3 V. 3 VDD Power Connect to +3.3 V. 4 HCLK Input Differential LVHSTL input (true input). 5 HCLK Input Differential LVHSTL input (complimentary input). 6 GND Power Connect to ground. 7 GND Power Connect to ground. 8 OE0 Input Output enable for CLK1 and CLK2. See table above. Internal pull-up to VDD. 9 OE1 Input Output enable for CLK3 and CLK4. See table above. Internal pull-up to VDD. 10 GND Power Connect to ground. 11 CLK4 Output Low skew clock output. 12 CLK3 Output Low skew clock output. 13 CLK2 Output Low skew clock output. 14 CLK1 Output Low skew clock output. 15 VDD Power Connect to +3.3 V. 16 VDD Power Connect to +3.3 V. IDT 2 ICS558A-02 REV C 092409

Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS558A-02. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature Rating 4.6 V -0.5 V to VDD+0.5 V 0 to +70 C -65 to +150 C 125 C 260 C Recommended Operation Conditions Parameter Min. Typ. Max. Units Ambient Operating Temperature 0 +70 C Power Supply Voltage (measured in respect to GND) +3.15 +3.3 +3.5 V DC Electrical Characteristics VDD=3.3 V ±5%, Ambient temperature 0 to +70 C, unless stated otherwise stated. Parameter Symbol Conditions Min. Typ. Max. Units Operating Voltage VDD 3.135 3.3 3.465 V Operating Supply Current IDD No load, 100 MHz 60 ma Input High Voltage V IH OE pins VDD-0.5 VDD V Input Low Voltage V IL OE pins 0.5 V Input High Voltage V IH HCLK Vx + 0.1 1.2 V Input Low Voltage V IL HCLK -0.3 Vx - 0.1 V Peak to Peak Input Voltage HCLK 0.3 1.0 V HCLK Input Leakage I IL -20 20 µa Current Input Common Mode Vx Input Common Mode 0.68 0.90 V Voltage Output High Voltage V OH I OH = -14.5 ma 2.4 V Output Low Voltage V OL I OL = 9.4 ma 0.4 V Nominal Output Impedance Z O 20 Ω Internal Pull-up Resistor R PU 250 kω Input Capacitance C IN 7 pf IDT 3 ICS558A-02 REV C 092409

AC Electrical Characteristics VDD = 3.3 V ±5%, Ambient Temperature 0 to +70 C, unless stated otherwise stated. Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency 0 250 MHz Output Rise Time t OR 0.4 to 2.4 V, C L =30 pf 0.5 1.1 2.0 ns Output Fall Time t OF 2.4 to 0.4 V, C L =30 pf 0.5 1.0 2.0 ns Skew (between any two output 30 pf load 0 250 ps clocks) Propagation Delay 9 12 ns Output Clock Duty Cycle at VDD/2, C L =30 pf 45 50 55 % Thermal Characteristics Parameter Symbol Conditions Min. Typ. Max. Units Thermal Resistance Junction to θ JA Still air 78 C/W Ambient θ JA 1 m/s air flow 70 C/W θ JA 3 m/s air flow 68 C/W Thermal Resistance Junction to Case θ JC 37 C/W IDT 4 ICS558A-02 REV C 092409

Package Outline and Package Dimensions (16-pin TSSOP, 4.40 mm Body, 0.65 mm Pitch) Package dimensions are kept current with JEDEC Publication No. 95, MO-153 16 Millimeters Inches INDEX AREA 1 2 D E1 E Symbol Min Max Min Max A -- 1.20 -- 0.047 A1 0.05 0.15 0.002 0.006 A2 0.80 1.05 0.032 0.041 b 0.19 0.30 0.007 0.012 C 0.09 0.20 0.0035 0.008 D 4.90 5.1 0.193 0.201 E 6.40 BASIC 0.252 BASIC E1 4.30 4.50 0.169 0.177 e 0.65 Basic 0.0256 Basic L 0.45 0.75 0.018 0.030 α 0 8 0 8 aaa -- 0.10 -- 0.004 A2 A *For reference only. Controlling dimension in mm. A1 - C - c e b SEATING PLANE aaa C L Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature 558AG-02* 558AG-02 Tubes 16-pin TSSOP 0 to 70 C 558AG-02LN 558AG02LN Tubes 16-pin TSSOP 0 to 70 C 558AG-02T* 558AG-02 Tape and Reel 16-pin TSSOP 0 to 70 C 558AG-02LNT 558AG02LT Tape and Reel 16-pin TSSOP 0 to 70 C *NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 *LN denotes a lead-free, RoHS compliant package. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. IDT 5 ICS558A-02 REV C 092409

Innovate with IDT and accelerate your future networks. Contact: www.idt.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 For Tech Support www.idt.com/go/clockhelp Corporate Headquarters Integrated Device Technology, Inc. www.idt.com 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA