Precision 2.5 V, 5. V, and. V Voltage References REF/REF2/ FEATURES High output accuracy REF:. V, ±.3% maximum REF2: 5. V, ±.3% maximum : 2.5 V, ±.6% maximum Adjustable output: ± 3% minimum Excellent temperature stability REF: 8.5 ppm/ C maximum REF2: 8.5 ppm/ C maximum : 5 ppm/ C maximum Low noise REF: 3 μv p-p typical REF2: 5 μv p-p typical : 6 μv p-p typical High supply voltage range: up to 36 V maximum Low supply current:. ma maximum High load-driving capability: ma maximum Temperature output function APPLICATIONS Precision data systems High resolution converters Industrial process control systems Precision instruments Military and aerospace applications GENERAL DESCRIPTION The REFx series of precision voltage references provide a stable. V, 5. V, or 2.5 V output with minimal change in response to variations in supply voltage, ambient temperature or load conditions. The parts are available in 8-lead SOIC, PDIP, CERDIP, and TO-99 packages, as well as 2-terminal LCC packages (883 only), furthering the parts usability in both standard and high stress applications. With an external buffer and a simple resistor network, the TEMP terminal can be used for temperature sensing and approximation. A TRIM terminal is also provided on the device for fine adjustment of the output voltage. The small footprint, wide supply range, and application versatility make the REFx series of references ideal for generalpurpose and space-constrained applications. Newer designs should use the ADRx series of references, which offer higher accuracy and temperature stability over a wider operating temperature range, while maintaining full pinfor-pin compatibility with the REFx series. This data sheet applies to commercial-grade products only. Contact sales or visit analog.com for military-grade (883) data sheets. Table. Selection Guide Part Number Output Voltage Input Voltage Range REF. V 2 V to 36 V REF2 5. V 7. V to 36 V 2.5 V.5 V to 36 V PIN CONFIGURATIONS 3 2 2 9 8 2 7 TEMP 3 6 V OUT 5 TRIM REF/ REF2/ TOP VIEW (Not to Scale) = NO CONNECT. DO NOT CONNECT ANYTHING ON THESE PINS. SOME OF THEMARE RESERVED FOR FACTORY TESTING PURPOSES. Figure. 8-Lead PDIP (P-Suffix), 8-Lead CERDIP (Z-Suffix), 8-Lead SOIC (S-Suffix) 375-2 3 8 REF/ REF2/ GROUND (CASE) 7 6 V OUT 5 TRIM = NO CONNECT. DO NOT CONNECT ANYTHING ON THESE PINS. SOME OF THEMARE RESERVED FOR FACTORY TESTING PURPOSES. Figure 2. 8-Lead TO-99 (J-Suffix) 375-2 5 6 TEMP 7 8 REF/ REF2 TOP VIEW (Not to Scale) 9 2 3 TRIM 8 7 6 5 V OUT = NO CONNECT. DO NOT CONNECT ANYTHING ON THESE PINS. SOME OF THEMARE RESERVED FOR FACTORY TESTING PURPOSES. Figure 3. 2-Terminal LCC (RC-Suffix; 883 Parts Only) 375-3 Rev. J Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 96, Norwood, MA 262-96, U.S.A. Tel: 78.329.7 www.analog.com Fax: 78.6.33 2 29 Analog Devices, Inc. All rights reserved.
TABLE OF CONTENTS Features... Applications... General Description... Pin Configurations... Revision History... 2 Specifications... 3 REF Specifications... 3 REF2 Specifications... Specifications... 5 Absolute Maximum Ratings... 6 Thermal Resistance... 6 ESD Caution... 6 Pin Configurations and Function Descriptions... 7 Typical Performance Characteristics... 8 Terminology... 3 Theory of Operation... Input and Output Capacitors... Output Adjustment... Temperature Monitoring... Long-Term Stability... 5 Burn-In... 5 Power Dissipation... 5 Applications Information... 6 Basic Reference Application... 6 Negative Reference... 6 Low Cost Current Source... 6 Precision Current Source with Adjustable Output... 6 Precision Boosted Output Regulator... 7 Bipolar Voltage Reference... 7 Adjustable Reference With Positive and Negative Swing... 7 Outline Dimensions... 8 REF Ordering Guide... 2 REF2 Ordering Guide... 2 Ordering Guide... 2 REVISION HISTORY /9 Rev. J: Initial Version Updated Format... Universal Combined REF, REF2, and Data Sheets... Universal Changes to Absolute Maximum Input Voltage... 6 Rev. J Page 2 of 2
SPECIFICATIONS REF SPECIFICATIONS VIN = 5 V, TA = 25 C, ILOAD = ma, all grades, unless otherwise noted. REF/REF2/ Parameter Symbol Conditions Min Typ Max Unit OUTPUT VOLTAGE VO A and E grades 9.97..3 V H grade 9.95..5 V C grade 9.9.. V OUTPUT ADJUSTMENT RANGE ΔVTRIM A, E and H grades, POT = kω ±3. ±3.3 % C grade, POT = kω ±2.7 ±3. % INITIAL ACCURACY VOERR A and E grades ±3 mv ±.3 % H grade ±5 mv ±.5 % C grade ± mv ±. % TEMPERATURE COEFFICIENT TCVO A and E grades, 55 C TA +25 C 3. 8.5 ppm/ C H grade, C TA +7 C 25 ppm/ C C grade, C TA +7 C (-J and -Z packages) 2 65 ppm/ C C grade, TA +85 C (-P and -S packages) 2 65 ppm/ C LINE REGULATION 2 VO/ VIN A, E and H grades, VIN = 3 V to 33 V 6 ppm/v A, E and H grades, VIN = 3 V to 33 V, C TA +7 C 7 2 ppm/v A, E and H grades, VIN = 3 V to 33 V, 55 C TA +25 C 9 5 ppm/v C grade, VIN = 3 V to 33 V 9 5 ppm/v C grade, VIN = 3 V to 3 V, C TA +7 C (-J and -Z packages) 8 ppm/v C grade, VIN = 3 V to 3 V, C TA +85 C (-P and -S packages) 8 ppm/v LOAD REGULATION 2 VO/ ILOAD A and E grades, ILOAD = ma to ma 5 8 ppm/ma A and E grades, ILOAD = ma to 8 ma, C TA +7 C 6 ppm/ma A and E grades, ILOAD = ma to 8 ma, 55 C TA +25 C 9 5 ppm/ma H grade, ILOAD = ma to ma 6 ppm/ma H grade, ILOAD = ma to 8 ma, C TA +7 C 7 2 ppm/ma H grade, ILOAD = ma to 8 ma, 5 C TA +25 C 9 5 ppm/ma C grade, ILOAD = ma to 8 ma 6 5 ppm/ma C grade, ILOAD = ma to 5 ma, C TA +7 C (-J and -Z packages) 8 8 ppm/ma C grade, ILOAD = ma to 5 ma, C TA +85 C (-P and -S packages) 8 8 ppm/ma DROPOUT VOLTAGE VDO 2 V QUIESCENT CURRENT IIN A, E, and H grades.. ma C grade..6 ma LOAD CURRENT ILOAD Sourcing A, E, and H grades ma C grade 8 ma Sinking.3 ma SHORT CIRCUIT TO ISC VO = V 3 ma VOLTAGE NOISE en p-p. Hz to. Hz (-S, -Z and -P packages) 3 μv p-p. Hz to. Hz (-J package) 35 μv p-p LONG-TERM STABILITY 3 VO After hours of operation 5 ppm TURN-ON SETTLING TIME tr Output settling to within ±.% of final value 5 μs TEMPERATURE SENSOR Voltage Output at TEMP Pin VTEMP 58 mv Temperature Sensitivity TCVTEMP.96 mv/ C Refer to the Output Adjustment section. 2 Specification includes the effects of self-heating. 3 Long-term stability is noncumulative; the drift in subsequent -hour periods is significantly lower than in the first -hour periods. Refer to Application Note AN-73. Refer to the Temperature Monitoring section. Rev. J Page 3 of 2
REF2 SPECIFICATIONS VIN = 5 V, TA = 25 C, ILOAD = ma, all grades, unless otherwise noted. Nongraded refers to REF2Z. Parameter Symbol Conditions Min Typ Max Unit OUTPUT VOLTAGE VO A and E grades.985 5. 5.5 V H grade and nongraded.975 5. 5.25 V C grade.95 5. 5.5 V OUTPUT ADJUSTMENT RANGE ΔVTRIM A, E, H grades and nongraded, POT = kω ±3. ±6. % C grade, POT = kω ±2.7 ±6. % INITIAL ACCURACY VOERR A and E grades ±5 mv ±.3 % H grade and nongraded ±25 mv ±.5 % C grade ±5 mv ± % TEMPERATURE COEFFICIENT TCVO A grade and non-graded, 55 C TA +25 C 3 8.5 ppm/ C E and H grades, C TA +7 C 25 ppm/ C C grade, C TA +7 C (-J and -Z packages) 2 65 ppm/ C C grade, TA +85 C (-P and -S packages) 2 65 ppm/ C LINE REGULATION 2 VO/ VIN A, E, H grades and nongraded, VIN = 8 V to 36 V 6 ppm/v A, E, H grades and nongraded, VIN = 8 V to 36 V, C TA +7 C 7 2 ppm/v A, E, H grades and nongraded, VIN = 8V to 36 V, 55 C TA +25 C 9 5 ppm/v C grade, VIN = 8 V to 36 V 9 5 ppm/v C grade, VIN = 8 V to 36 V, C TA +7 C (-J and -Z packages) 8 ppm/v C grade, VIN = 8 V to 36 V, C TA +85 C (-P and -S packages) 8 ppm/v LOAD REGULATION 2 VO/ ILOAD A and E grades, ILOAD = ma to ma 6 ppm/ma A and E grades, ILOAD = ma to 8 ma, C TA +7 C 6 ppm/ma A and E grades, ILOAD = ma to 8 ma, 55 C TA +25 C 7 2 ppm/ma H grade and nongraded, ILOAD = ma to ma 6 ppm/ma H grade and nongraded, ILOAD = ma to 8 ma, C TA +7 C 7 2 ppm/ma H grade and nongraded, ILOAD = ma to 8 ma, 5 C TA +25 C 9 5 ppm/ma C grade, ILOAD = ma to 8 ma 6 5 ppm/ma C grade, ILOAD = ma to 5 ma, C TA +7 C (-J and -Z packages) 8 8 ppm/ma C grade, ILOAD = ma to 5 ma, C TA +85 C (-P and -S packages) 8 8 ppm/ma DROPOUT VOLTAGE VDO 2 V QUIESCENT CURRENT IIN A, E, H grades and nongraded.. ma C grade..6 ma LOAD CURRENT ILOAD Sourcing A, E, H grades and nongraded ma C grade 8 ma Sinking.3 ma SHORT CIRCUIT TO ISC VO = V 3 ma VOLTAGE NOISE en p-p. Hz to. Hz (-S, -Z and -P packages) 5 μv p-p. Hz to. Hz (-J package) 2 μv p-p LONG-TERM STABILITY 3 VO After hours of operation 5 ppm TURN-ON SETTLING TIME tr Output settling to within ±.% of final value 5 μs TEMPERATURE SENSOR Voltage Output at TEMP Pin VTEMP 58 mv Temperature Sensitivity TCVTEMP.96 mv/ C Refer to the Output Adjustment section. 2 Specification includes the effects of self-heating. 3 Long-term stability is noncumulative; the drift in subsequent -hour periods is significantly lower than in the first -hour periods. Refer to Application Note AN-73. Refer to the Temperature Monitoring section. Rev. J Page of 2
SPECIFICATIONS VIN = 5 V, C TA +85 C, ILOAD = ma, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit OUTPUT VOLTAGE VO 2.95 2.5 2.55 V OUTPUT ADJUSTMENT RANGE ΔVTRIM POT = kω ±6 ± % INITIAL ACCURACY VOERR ±5 mv ±.6 % TEMPERATURE COEFFICIENT TCVO 5 ppm/ C LINE REGULATION 2 VO/ VIN VIN =.5 V to 33 V 2 5 ppm/v LOAD REGULATION 2 VO/ ILOAD ILOAD = ma to ma 6 ppm/ma DROPOUT VOLTAGE VDO 2 V QUIESCENT CURRENT IIN.. ma LOAD CURRENT ILOAD Sourcing ma Sinking.3 ma SHORT CIRCUIT TO ISC VO = V 2 ma VOLTAGE NOISE en p-p. Hz to. Hz 6 μv p-p LONG-TERM STABILITY 3 VO After hours of operation 5 ppm TURN-ON SETTLING TIME tr Output settling to within ±.% of final value 5 μs TEMPERATURE SENSOR Voltage Output at TEMP Pin VTEMP 58 mv Temperature Sensitivity TCVTEMP.96 mv/ C Refer to the Output Adjustment section. 2 Specification includes the effects of self-heating. 3 Long-term stability is non-cumulative; the drift in subsequent -hour periods is significantly lower than in the first -hour periods. Refer to Application Note AN-73. Refer to the Temperature Monitoring section. Rev. J Page 5 of 2
ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Rating Input Voltage 36. V Output Short Circuit Duration Indefinite Operating Temperature Range REFA, REF2A 55 C to +25 C REFCP, REFCS, REFE, REFH, C to +85 C REF2CP, REF2CS, REF2E, REF2H, G REFCJ C to +7 C Storage Temperature Range -J, -S, -Z and -RC Packages 65 C to +5 C -P Package 65 C to +25 C Junction Temperature Range (TJ) 65 C to +5 C Lead Temperature (Soldering, sec.) 3 C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTAE θja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance Package Type θja θjc Unit 8-lead SOIC (S) 3 3 C/W 8-lead PDIP (P) 5 C/W 8-lead CERDIP (Z) 62 26 C/W TO-99 (J) 7 2 C/W ESD CAUTION Rev. J Page 6 of 2
PIN CONFIGURATIONS AND FUTION DESCRIPTIONS 8 REF/ REF2/ TOP VIEW (Not to Scale) 2 7 TEMP 3 6 V OUT 5 TRIM Figure. 8-Lead PDIP (P-Suffix), 8-Lead CERDIP (Z-Suffix), 8-Lead SOIC (S-Suffix) Pin Configuration 375- Table. Pin Function Descriptions PDIP, CERDIP, and SOIC Packages Pin No. Mnemonic Description, 7, 8 No Internal Connection. Leave floating or tied to ground in actual application. 2 VIN Supply Voltage Input. 3 TEMP Temperature (Band Gap) Output. Refer to the Temperature Monitoring section. Ground Connection. 5 TRIM Output Voltage Trim. Refer to the Output Adjustment section. 6 VOUT Reference Voltage Output. 8 7 2 6 V OUT 3 REF/ REF2/ 5 TRIM GROUND (CASE) Figure 5. 8-Lead TO-99 (J-Suffix) Pin Configuration Table 5. Pin Function Descriptions 8-Lead TO-99 Package Pin No. Mnemonic Description, 3, 7, 8 No Internal Connection. Leave floating or tied to ground in actual application. 2 VIN Supply Voltage Input. Ground Connection. 5 TRIM Output Voltage Trim. Refer to the Output Adjustment section. 6 VOUT Reference Voltage Output. 375-5 3 2 2 9 5 6 TEMP 7 8 REF/ REF2 TOP VIEW (Not to Scale) 8 7 6 5 V OUT 9 2 3 TRIM Figure 6. 2-Terminal LCC (RC-Suffix) Pin Configuration 375-6 Table 6. Pin Function Descriptions 2-Terminal LCC Package Terminal No. Mnemonic Description to, 6, 8, 9,, No Internal Connection. Leave floating or tied to ground in actual application. 3,, 6 to 2 5 VIN Supply Voltage Input. 7 TEMP Temperature (Band Gap) Output. Refer to the Temperature Monitoring section. Ground Connection. 2 TRIM Output Voltage Trim. Refer to the Output Adjustment section. 5 VOUT Reference Voltage Output. Rev. J Page 7 of 2
TYPICAL PERFORMAE CHARACTERISTICS..8 V OUT (V).5. 9.995 9.99 SUPPLY CURRENT (ma).7.6.5 +25 C +25 C C 9.985 25 5 2 35 5 65 8 95 25 TEMPERATURE ( C) Figure 7. REF Typical Output Voltage vs. Temperature 375-7. 2 6 2 2 28 32 36 INPUT VOLTAGE (V) Figure. REF Supply Current vs. Input Voltage 375-5.8.8 V OUT (V) 5. 5..996 SUPPLY CURRENT (ma).7.6.5 +25 C +25 C C.992 25 5 2 35 5 65 8 95 25 TEMPERATURE ( C) Figure 8. REF2 Typical Output Voltage vs. Temperature 375-8. 8 2 6 2 2 28 32 36 INPUT VOLTAGE (V) Figure. REF2 Supply Current vs. Input Voltage 375-2.52.85.8 V OUT (V) 2.5 2.5 2.99 SUPPLY CURRENT (ma).75.7.65.6.55.5 +25 C +25 C C.5 2.98 25 5 2 35 5 65 8 95 25 TEMPERATURE ( C) Figure 9. Typical Output Voltage vs. Temperature 375-9. 5 5 2 25 3 35 INPUT VOLTAGE (V) Figure 2. Supply Current vs. Input Voltage 375-2 Rev. J Page 8 of 2
3 = 36V I L = ma TO ma 2 = V TO 36V LOAD REGULATION (ppm/ma) 2 2 3 = V LINE REGULATION (ppm/v) 2 6 8 25 5 85 25 TEMPERATURE ( C) 375-3 25 5 2 35 5 65 8 95 25 TEMPERATURE ( C) 375-6 Figure 3. REF Load Regulation vs. Temperature Figure 6. REF Line Regulation vs. Temperature 5 I L = ma TO 5mA 8 = 8V TO 36V LOAD REGULATION (ppm/ma) 3 2 = 8V = 36V LINE REGULATION (ppm/v) 2 25 TEMPERATURE ( C) 85 25 375-8 25 5 2 35 5 65 8 95 25 TEMPERATURE ( C) 375-7 Figure. REF2 Load Regulation vs. Temperature Figure 7. REF2 Line Regulation vs. Temperature 6 LOAD REGULATION (ppm/ma) 5 3 2 I L = ma TO ma = 36V = 7V LINE REGULATION (ppm/mv) 2 2 = 5V TO 36V 25 5 2 35 5 65 8 95 25 TEMPERATURE ( C) Figure 5. Load Regulation vs. Temperature 375-5 25 5 2 35 5 65 8 95 25 TEMPERATURE ( C) Figure 8. Line Regulation vs. Temperature 375-8 Rev. J Page 9 of 2
5.7 T A = 25 C DROPOUT VOLTAGE (V) 3 2 C +25 C +25 C QUIESCENT CURRENT (ma).65.6.55 2 6 8 LOAD CURRENT (ma) 375-9.5 2 6 LOAD CURRENT (ma) 8 375-22 Figure 9. REF Dropout Voltage vs. Load Current Figure 22. REF Quiescent Current vs. Load Current 6 DROPOUT VOLTAGE (V) 2 C +25 C µv/div +25 C 2 6 LOAD CURRENT (ma) 8 375-2 TIME (s/div) 375-23 Figure 2. REF2 Dropout Voltage vs. Load Current Figure 23. REF2 Typical Low-Frequency Voltage Noise (. Hz to. Hz) 6 5 DROPOUT VOLTAGE (V) 3 2 C +25 C +25 C 5µV/DIV 2 6 LOAD CURRENT (ma) 8 375-2 TIME (ms/div) 375-2 Figure 2. Dropout Voltage vs. Load Current Figure 2. REF2 Typical Wideband Voltage Noise ( Hz to khz) Rev. J Page of 2
V 8V V/DIV V OUT 5V/DIV C IN =.µf NO LOAD CAPACITOR V OUT 5V/DIV NO LOAD CAPACITOR NO INPUT CAPACITOR TIME (2ms/DIV) 375-25 TIME (µs/div) 375-28 Figure 25. REF2 Line Transient Response Figure 28. REF2 Turn-Off Response NO LOAD CAPACITOR 5V/DIV C IN =.µf NO LOAD CAPACITOR V/DIV LOAD OFF LOAD ON V OUT mv/div V OUT 5V/DIV TIME (ms/div) LOAD = 5mA 375-26 TIME (µs/div) 375-29 Figure 26. REF2 Load Transient Response Figure 29. REF2 Turn-On Response C LOAD = nf 5V/DIV V/DIV LOAD OFF LOAD ON C L =.µf NO INPUT CAPACITOR V OUT mv/div V OUT 5V/DIV LOAD = 5mA TIME (ms/div) Figure 27. REF2 Load Transient Response 375-27 TIME (µs/div) Figure 3. REF2 Turn-Off Response (No Input Capacitor) 375-3 Rev. J Page of 2
C L =.µf NO INPUT CAPACITOR V/DIV.8.75 = 5V SAMPLE SIZE = 5.7.65 V OUT 5V/DIV V TEMP (V).6.55 ΔV TEMP /ΔT.96mV/ C.5.5 TIME (µs/div) 375-3. 5 25 25 5 75 TEMPERATURE ( C) 25 375-32 Figure 3. REF2 Turn-Off Response (No Input Capacitor) Figure 32. Output Voltage at TEMP Pin vs. Temperature Rev. J Page 2 of 2
TERMINOLOGY Dropout Voltage (VDO) Dropout voltage, sometimes referred to as supply voltage headroom or supply-output voltage differential, is defined as the minimum voltage differential between the input and output necessary for the device to operate. V DO = ( VIN VOUT) min IL = constant Since the dropout voltage depends upon the current passing through the device, it is always specified for a given load current. Temperature Coefficient (TCVO) The temperature coefficient relates the change in output voltage to the change in ambient temperature of the device, as normalized by the output voltage at 25 C. This parameter is expressed in ppm/ C and can be determined by the following equation: TCV OUT V = V OUT OUT ( T2 ) VOUT ( T ) ( 25 C) ( T T ) o 2 where: VOUT(25 C) is output voltage at 25 C. VOUT(T) is output voltage at temperature. VOUT(T2) is output voltage at temperature 2. [ ppm/ C] 6 o Thermally Induced Output Voltage Hysteresis (ΔVOUT_HYS) Thermally induced output voltage hysteresis represents the change in output voltage after the device is exposed to a specified temperature cycle. This may be expressed as either a shift in voltage or a difference in ppm from the nominal output. V V OUT _ HYS = V V OUT o ( 25 C) VOUT [ V] _ TC o ( C) VOUT _ TC V ( 25 C) 25 6 OUT OUT _ HYS = o OUT [ ppm] where: VOUT(25 C)is output voltage at 25 C. VOUT_TC is output voltage after temperature cycling. Thermal hysteresis occurs mainly as a result of forces exhibited upon the internal die by its packaging. The effect is more pronounced in parts with smaller packages. Long-Term Stability (ΔVOUT_LTD) Long-term stability refers to the shift in output voltage at 25 C after hours of operation in a 25 C environment. This may also be expressed as either a shift in voltage or a difference in ppm from the nominal output. ΔV ΔV = V ( t ) V ( )[ V] OUT _ LTD OUT OUT t OUT ( t ) VOUT ( t ) V ( t ) VOUT _ LTD = OUT 6 [ ppm] where: VOUT(t) is VOUT at 25 C at time. VOUT(t) is VOUT at 25 C after hours of operation at 25 C. Line Regulation Line regulation refers to the change in output voltage in response to a given change in input voltage. It is expressed in either percent per volt, ppm per volt, or microvolt per volt change in input voltage. This parameter accounts for the effects of self-heating. Load Regulation Load regulation refers to the change in output voltage in response to a given change in load current, and is expressed in either microvolts per milliamp, ppm per milliamp, or ohms of DC output resistance. This parameter accounts for the effects of self-heating. Rev. J Page 3 of 2
THEORY OF OPERATION REF, REF2, and are high precision, low drift. V, 5. V, and 2.5 V voltage references available in a variety of packages. These devices are standard band gap references (see Figure 33). The band gap cell contains two NPN transistors (Q8 and Q9) that differ in emitter area by a factor of 2. The difference in the VBE values of these transistors produces a proportional-to-absolute temperature current (PTAT) through R, and, when combined with the VBE of Q9, produces a band gap voltage, VBG, that is almost constant over temperature. With an internal op amp and the feedback network created by R5 and R6, VO is set precisely at. V, 5. V, or 2.5 V. Precision laser trimming of various resistors and other proprietary circuit techniques are used to further enhance the initial accuracy, temperature curvature, and drift performance of the device. The PTAT voltage is brought out directly from the band gap, unbuffered, at the TEMP pin. Since this voltage output has a stable.96 mv/ C temperature coefficient, users can estimate the temperature change of the device by simply monitoring the change in voltage at this pin. R2 D3 R3 R R2 R3 R Q Q2 Q7 Q8 Q2 Q Q3 Q5 Q3 C D D2 Q I Q23 2 V BG Q8 R27 Q9 TEMP R Q6 Q7 Q2 R32 R6 R2 R7 R R R2 Figure 33. REFx Simplified Schematic Q9 R5 Q R2 V O TRIM INPUT AND OUTPUT CAPACITORS Figure 3 shows the basic input/output capacitor configuration for the REFx series of references. U REF/ REF2/ V OUT C.µF TEMP TRIM V O C2.µF Figure 3. Basic REFx Capacitor Configuration 375-3 375-3 3 While the REFx series of references are designed to function stably without any external components, connecting a. μf ceramic capacitor to the output is highly recommended to improve stability and filter out low level voltage noise. An additional μf to μf electrolytic, tantalum, or ceramic capacitor can be added in parallel to improve transient performance in response to sudden changes in load current; however, the designer should keep in mind that doing so increases the turn-on time of the device. A μf to μf electrolytic, tantalum, or ceramic capacitor can also be connected to the input to improve transient response in applications where the supply voltage may fluctuate. An additional. μf ceramic capacitor should be connected in parallel to reduce supply noise. Both input and output capacitors should be mounted as close to the device pins as possible. OUTPUT ADJUSTMENT The REFx trim terminal can be used to adjust the output up or down from the internally trimmed, nominal output voltage. This feature allows the system designer to trim out system errors due to changes in line and load conditions, thermal hysteresis, output offset due to solder reflow, or other error sources. The basic trim circuit configuration is shown in Figure 35. Table 7 also lists the range of output voltages obtainable from each model in this configuration. In addition to the optional TRIM function, the REFx series of references provides the ability to monitor changes in temperature by way of tracking the voltage present at the TEMP pin. The output voltage of this pin is taken directly from the band Rev. J Page of 2 U REF/ REF2/ V OUT TEMP TRIM R 7kΩ V O POT kω R2 kω Figure 35. Optional Trim Adjustment Circuit Table 7. Adjustment Range Using Trim Circuit Model VOUT, Low Limit VOUT, High Limit REF 9.7 V.5 V REF2.95 V 5.2 V 2.3 V 2.8 V Adjustment of the output does not significantly affect the temperature performance of the reference itself, provided the temperature coefficients of the resistors used are low. TEMPERATURE MONITORING 375-35
gap core and, as a result, varies linearly with temperature. The nominal voltage at the TEMP pin (VTEMP) is approximately 55 mv at 25 C, with a temperature coefficient (TCVTEMP) of approximately.96 mv/ C. Refer to Figure 32 for a graph of output voltage vs. temperature. As an example, given these ideal values, a voltage change of 39.2 mv at the TEMP pin corresponds to a 2 C change in temperature. The TEMP function is provided as a convenience, rather than a precise feature, of the reference. In addition, because the voltage at the TEMP pin is taken directly from the band gap core, any current injected into or pulled from this pin has a significant effect on VOUT. As such, even tens of microamps drawn from the TEMP pin can cause the output to fall out of regulation. Should the designer wish to take advantage of this feature, it is necessary to buffer the output of the TEMP pin with a low bias current op amp, such as the AD86 or AD86. Any of these op amps, if used as shown in Figure 36, causes less than a μv change in VOUT. V TEMP.9mV/ C 5V V+ AD86 U2 V LONG-TERM STABILITY U REF/ REF2/ V OUT TEMP TRIM Figure 36. Temperature Monitoring One of the key parameters of the REFx series of references is long-term stability. Regardless of output voltage, internal testing during development showed a typical drift of approximately 5 ppm after, hours of continuous, nonloaded operation in a +25 C environment. It is important to understand that long-term stability is not guaranteed by design, and that the output from the device may shift beyond the typical 5 ppm specification at any time, especially during the first 2 hours of operation. For systems that require highly stable output over long periods of time, the designer should consider burning-in the devices prior to use to minimize the amount of output drift exhibited by the reference over time. Refer to the AN-73 Application Note for more V O 375-36 information regarding the effects of long-term drift and how it can be minimized. BURN-IN Burn-in, wherein the part is powered and allowed to operate normally for an extended period of time, can be useful for minimizing the effects of long-term drift. A sample burn-in circuit is shown below in Figure 37. +8V V OUT 8V Ω REF/ REF2/ + µf R L OPTIONAL + µf Figure 37. Burn-In Circuit The part may be burned in with or without a constant resistive load. The load current should not exceed ma. POWER DISSIPATION The REFx series of voltage references are capable of sourcing up to ma of load current at room temperature across the rated input voltage range. However, when used in applications subject to high ambient temperatures, the input voltage and load current should be carefully monitored to ensure that the device does not exceeded its maximum power dissipation rating. The maximum power dissipation of the device can be calculated via the following equation: P D T j T = θ JA A [ W] where: PD is device power dissipation. Tj is device junction temperature. TA is ambient temperature. θja is package (junction-to-air) thermal resistance. Because of this relationship, acceptable load current in hightemperature conditions may be less than the maximum current-sourcing capability of the device. In no case should the part be operated outside of its maximum power rating as doing so may result in premature failure or permanent damage to the device. 375-37 Rev. J Page 5 of 2
APPLICATIONS INFORMATION BASIC REFEREE APPLICATION Figure 38 shows the basic configuration for any REFx device. Input and output capacitance values can be tailored for performance, provided they follow the guidelines described in the Input and Output Capacitors section. U REF/ REF2/ V OUT C.µF TEMP TRIM V O C2.µF Figure 38. Basic Reference Application NEGATIVE REFEREE A negative reference can be constructed without any external resistors as shown in Figure 39. In this configuration, the reference IC and op amp work together to force the voltage at the VREF node to the negative value of the reference s nominal output voltage. The inverting input of the op amp represents a virtual ground, forcing the VOUT pin of the reference to V(ground), and the reference works to maintain a constant voltage across its VOUT and pins, forcing the pin negative. +5V TO +5V V REF U REF/ REF2/ V OUT TEMP TRIM +5V U2 V+ OP77 V 5V Figure 39. Negative Reference Note that any load on the VREF node will have its current sourced from, or sunk into, the output of the op amp. For this reason, U2 should be implemented with a low offset, precision op amp, with an output current rating that meets or exceeds the current requirements of the load. LOW COST CURRENT SOURCE Unlike most references, the quiescent current of the REFx series remains constant with respect to the load current (refer to Figure 22). As a result, a simple, low cost current source can be constructed by configuring the reference as shown in Figure. 375-38 375-39 REF/ REF2/ I IN V OUT I Q.6mA R SET R L V L I SET = (V OUT V L )/R SET I L = I SET + I Q Figure. Simple Current Source In this configuration, the current through the resistor RSET (ISET) is equal to (VOUT VL)/RSET. IL is simply the sum of ISET and IQ. However, since IQ typically varies from.55 ma to.65 ma, this circuit should be limited to low precision, general-purpose applications. PRECISION CURRENT SOURCE WITH ADJUSTABLE OUTPUT A higher-precision current source can be implemented with the circuit shown in Figure. +2V U REF2 V OUT TEMP TRIM V TO (5V + V L ) B AD52 kω A +2V U2 V+ OP77 5V TO V L V 2V W R SET R L kω kω Figure. Programmable ma to 5 ma Current Source By adding a mechanical or digital potentiometer, this circuit becomes an adjustable current source. If a digital potentiometer is used, the load current is simply the voltage across terminal B to terminal W of the digital potentiometer divided by the value of the resistor RSET. I L V = R REF D SET [ A] where D is the decimal equivalent of the digital potentiometer input code. A dual-supply op amp should be used since the ground potential of REF2 can swing from 5. V to VL while the potentiometer is swung from zero-scale to full-scale. V L 375- I L 375- Rev. J Page 6 of 2
PRECISION BOOSTED OUTPUT REGULATOR The output current sourcing capability of the REFx series can be boosted by using an external op amp and MOSFET, as shown in Figure 2. U REF/ REF2/ V OUT TEMP TRIM 2N72 N 5V R Ω V+ OP77 V U2 C pf R L C L 2Ω µf R 2 Ω Figure 2. Precision Boosted Output Regulator In this circuit, U2 forces VO to VREF by regulating the current through N, thereby sourcing the load current directly from the input voltage source connected at VIN. Using the components shown, this circuit can source up to 5 ma with an input voltage of 5. V. The circuit s current sourcing capability can be further increased by replacing N with a higher-power MOSFET. BIPOLAR VOLTAGE REFEREE Many applications require both a positive and reference voltage of the same magnitude. A simple method of generating such a bipolar reference is shown in Figure 3. V+ U 2 6 V OUT kω +2.5V V O 375-2 In this configuration, the negative rail is generated simply with an inverting amplifier with a gain of. A low offset op amp should be used to minimize the voltage error at the negative output. ADJUSTABLE REFEREE WITH POSITIVE AND NEGATIVE SWING The output voltage of the REFx references can be readily adjusted via a simple trim circuit (explained in the Output Adjustment section). The circuit shown in Figure extends the negative range of adjustment beyond that obtainable with the simple trim circuit by employing a precision op amp with a potentiometer feeding the op amp s noninverting input. V+ U 2 6 V OUT 5kΩ 5kΩ 5kΩ 2 7 +5V 6 OP97 3 U2 V+ Figure. Negatively Adjustable Reference V OUT 2.5V TO +2.5V The voltage output from the op amp can be adjusted by changing the value of the potentiometer: as shown, the op amp outputs +2.5 V when the pot is pulled completely high, and 2.5V when pulled completely low. In this configuration, the load current is sourced by the op amp; therefore, a low offset op amp with a current rating that meets or exceeds the current requirements of the load should be used. 375- kω U2 2 7 6 OP97 2.5V 3 V Figure 3. Bipolar Voltage Reference 375-3 Rev. J Page 7 of 2
OUTLINE DIMENSIONS.5 (.3) MIN.55 (.) MAX 8 5.3 (7.87).22 (5.59). (2.5) BSC.2 (5.8) MAX.5 (.29) MAX.6 (.52).5 (.38).32 (8.3).29 (7.37).2 (5.8).25 (3.8).23 (.58). (.36).7 (.78).3 (.76).5 (3.8) MIN SEATING PLANE 5.5 (.38).8 (.2) CONTROLLING DIMENSIONS ARE IN IHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF IH EQUIVALENTS FOR REFEREE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 5. 8-Lead Ceramic Dual In-Line Package [CERDIP] Z-Suffix (Q-8) Dimensions shown in inches and (millimeters).37 (9.).335 (8.5).335 (8.5).35 (7.75).85 (.7).65 (.9) REFEREE PLANE.5 (2.7) MIN.25 (6.35) MIN.5 (.27) MAX.2 (5.8) BSC. (2.5) BSC 2 8.9 (.8). (2.5).6 (.) BSC. (.2) MAX.3 (.86).2 (.53).28 (.7). (.2).6 (.). (.25) 5 BSC BASE & SEATING PLANE 3 5 6 7.6 (.6). (3.56).5 (.).27 (.69). COMPLIANT TO JEDEC STANDARDS MO-2-AK CONTROLLING DIMENSIONS ARE IN IHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF IH EQUIVALENTS FOR REFEREE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 6. 8-Pin Metal Header Package [TO-99] J-Suffix (H-8) Dimensions shown in inches and (millimeters) 2236-A Rev. J Page 8 of 2
. (.6).365 (9.27).355 (9.2).2 (5.33) MAX.5 (3.8).3 (3.3).5 (2.92).22 (.56).8 (.6). (.36) 8. (2.5) BSC 5.28 (7.).25 (6.35).2 (6.).5 (.38) MIN SEATING PLANE.5 (.3) MIN.6 (.52) MAX.5 (.38) GAUGE PLANE.325 (8.26).3 (7.87).3 (7.62).3 (.92) MAX.95 (.95).3 (3.3).5 (2.92). (.36). (.25).8 (.2).7 (.78).6 (.52).5 (.) COMPLIANT TO JEDEC STANDARDS MS- CONTROLLING DIMENSIONS ARE IN IHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF IH EQUIVALENTS FOR REFEREE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 7. 8-Lead Plastic Dual In-Line Package [PDIP] Narrow Body, P-Suffix (N-8) Dimensions shown in inches and (millimeters) 766-A.358 (9.9).32 (8.69) SQ. (2.5).6 (.63).358 (9.9) MAX SQ.88 (2.2).5 (.37).75 (.9) REF.95 (2.).75 (.9). (.28).7 (.8) R TYP.75 (.9) REF.55 (.).5 (.) 9 8 3 3 2 BOTTOM VIEW.2 (5.8) REF. (2.5) REF 8 9.5 (3.8) BSC.5 (.38) MIN.28 (.7).22 (.56).5 (.27) BSC 5 TYP CONTROLLING DIMENSIONS ARE IN IHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF IH EQUIVALENTS FOR REFEREE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 8. 2-Terminal Ceramic Leadless Chip Carrier [LCC] RC-Suffix (E-2-) Dimensions shown in inches and (millimeters) 226-A 5. (.968).8 (.89). (.57) 3.8 (.97) 8 5 6.2 (.2) 5.8 (.228).25 (.98). (.) COPLANARITY. SEATING PLANE.27 (.5) BSC.75 (.688).35 (.532).5 (.2).3 (.22) 8.25 (.98).7 (.67).5 (.96).25 (.99).27 (.5). (.57) 5 COMPLIANT TO JEDEC STANDARDS MS-2-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; IH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFEREE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 27-A Figure 9. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body, S-Suffix (R-8) Dimensions shown in millimeters and (inches) Rev. J Page 9 of 2
REF ORDERING GUIDE Model Initial Accuracy (mv) Temperature Range Package Description Package Option REFAJ/883C ±3 55 C to +25 C 8-Pin TO-99 J-Suffix (H-8) REFCJ ± C to 7 C 8-Pin TO-99 J-Suffix (H-8) REFEZ ±3 C to +85 C 8-Lead CERDIP Z-Suffix (Q-8) REFHZ ±5 C to +85 C 8-Lead CERDIP Z-Suffix (Q-8) REFCP ± C to +85 C 8-Lead PDIP P-Suffix (N-8) REFCPZ 2 ± C to +85 C 8-Lead PDIP P-Suffix (N-8) REFHP ±5 C to +85 C 8-Lead PDIP P-Suffix (N-8) REFHPZ 2 ±5 C to +85 C 8-Lead PDIP P-Suffix (N-8) REFCS ± C to +85 C 8-Lead SOIC_N S-Suffix (R-8) REFCS-REEL ± C to +85 C 8-Lead SOIC_N S-Suffix (R-8) REFCS-REEL7 ± C to +85 C 8-Lead SOIC_N S-Suffix (R-8) REFCSZ 2 ± C to +85 C 8-Lead SOIC_N S-Suffix (R-8) REFCSZ-REEL 2 ± C to +85 C 8-Lead SOIC_N S-Suffix (R-8) REFCSZ-REEL7 2 ± C to +85 C 8-Lead SOIC_N S-Suffix (R-8) Contact sales for 883 data sheet. 2 Z = RoHS Compliant Part. REF2 ORDERING GUIDE Model Initial Accuracy (mv) Temperature Range Package Description Package Option REF2AJ/883C ±5 55 C to +25 C 8-Pin TO-99 J-Suffix (H-8) REF2AZ ±5 55 C to +25 C 8-Lead CERDIP Z-Suffix (Q-8) REF2AZ/883C ±5 55 C to +25 C 8-Lead CERDIP Z-Suffix (Q-8) REF2CP ±5 C to +85 C 8-Lead PDIP P-Suffix (N-8) REF2CPZ 2 ±5 C to +85 C 8-Lead PDIP P-Suffix (N-8) REF2CS ±5 C to +85 C 8-Lead SOIC_N S-Suffix (R-8) REF2CS-REEL ±5 C to +85 C 8-Lead SOIC_N S-Suffix (R-8) REF2CS-REEL7 ±5 C to +85 C 8-Lead SOIC_N S-Suffix (R-8) REF2CSZ 2 ±5 C to +85 C 8-Lead SOIC_N S-Suffix (R-8) REF2CSZ-REEL 2 ±5 C to +85 C 8-Lead SOIC_N S-Suffix (R-8) REF2CSZ-REEL7 2 ±5 C to +85 C 8-Lead SOIC_N S-Suffix (R-8) REF2EZ ±5 C to +85 C 8-Lead CERDIP Z-Suffix (Q-8) REF2HZ ±25 C to +85 C 8-Lead CERDIP Z-Suffix (Q-8) REF2HP ±25 C to +85 C 8-Lead PDIP P-Suffix (N-8) REF2HPZ 2 ±25 C to +85 C 8-Lead PDIP P-Suffix (N-8) REF2HSZ 2 ±25 C to +85 C 8-Lead SOIC_N S-Suffix (R-8) REF2RC/883 ±25 55 C to +25 C 2-Terminal LCC RC-Suffix (E-2-) REF2Z ±25 55 C to +25 C 8-Lead CERDIP Z-Suffix (Q-8) Contact sales for 883 data sheet. 2 Z = RoHS Compliant Part. ORDERING GUIDE Model Initial Accuracy (mv) Temperature Range Package Description Package Option GPZ ±5 C to +85 C 8-Lead PDIP N-8 (P-Suffix) GS ±5 C to +85 C 8-Lead SOIC_N R-8 (P-Suffix) GSZ ±5 C to +85 C 8-Lead SOIC_N R-8 (P-Suffix) GSZ-REEL ±5 C to +85 C 8-Lead SOIC_N R-8 (P-Suffix) GSZ-REEL7 ±5 C to +85 C 8-Lead SOIC_N R-8 (P-Suffix) Z = RoHS Compliant Part. 2 29 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D375--/9(J) Rev. J Page 2 of 2