Applications CATV Line Amplifiers CATV System Amplifiers Distribution Nodes Green Applications Product Features SOIC-6 Wide Package Functional Block Diagram 75 Ω, 50 000 MHz Bandwidth GaAs phemt & MESFET Technology User configurable gain: 7 db Integrated linearization Choice of output device to optimize cost/performance Flexible bias voltage and current for optimum efficiency SOIC-6 Wide Package General Description The TAT8858 is a cost effective 75 Ω RFIC Amplifier designed for use in high gain V CATV applications up to 000 MHz. It works with readily available SMT baluns and transformers to provide a highly flexible low cost replacement for traditional hybrids. Gain of the TAT8858 may be easily adjusted by varying external components, allowing for a family of push-pull hybrid solutions to be developed from a single RFIC. The TAT8858 provides integrated linearization to improve the rd order distortion performance. Pin Configuration Pin # Symbol Pin # Symbol OUT A 0 IN B LIN ADJ A OUT B IN A GATE B BIAS A GATE A 5 BIAS B OUT A 6 IN B 5 IN A 7 LIN ADJ B 6 BIAS A 8 OUT B 7 GND 9 BIAS B The TAT8858 may be protected against transient surges with the TQP0000 and an output high pass filter network. Consult TriQuint for discussion. The TAT8858 supports traditional V and V supply voltages. Bias current may be adjusted to suit particular requirements with standard or active biasing approaches. Consult TriQuint for further discussion. Ordering Information Part No. TAT8858 TAT8858-EB Description RFIC evaluation board Standard T/R size = 000 pieces on a 7 reel. Data Sheet: Rev D 0/5/ - of 8 - Disclaimer: Subject to change without notice
Specifications Absolute Maximum Ratings Parameter Storage Temperature Operating Temperature Rating -65 to 50 o C -0 to 85 o C Operation of this device outside the parameter ranges given above may cause permanent damage. Recommended Operating Conditions Parameter Min Typ Max Units V cc V I cc 70 ma Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. Electrical Specifications Test conditions unless otherwise noted: 5ºC case temp, +V Vsupply Parameter Conditions Min Typical Max Units Operational Frequency Range 50 000 MHz Test Frequency MHz Gain @ Low Frequency Mid range of gain db Input Return Loss 8 db Output Return Loss 6 db CTB See Note -69 dbc CSO See Note -68 dbc CIN See Note 70 db XMOD See Note -6 dbc Noise Figure.0 db Vbias V Idd See Note 70 ma Thermal Resistance (jnc. to case) θ jc.0 o C/W Notes:. 79ch. NTSC + QAM (-6dB offset) to 00.5MHz flat input, dbmv/ch Vout at ch... Active biasing in easily implemented with traditional dual-pnp approaches. Biasing at V is also possible. Refer to pages 5 and 6 for biasing circuit configurations. Data Sheet: Rev D 0/5/ - of 8 - Disclaimer: Subject to change without notice
Application Circuit 50-000 MHz +v J L0 90nH Vbias R7 6 L9 nh C9 70pF GND C.0uF C5.0uF R8.7k Vgate C MABACT005 T C C5.5pF R C6.5pF L5 8nH R 60 R 60 L6 8nH C7 R 0k R5 0k L7 600 L8 600 R6 8k R 0k BIAS A UPPER A LIN ADJ A LOWER A 5 6 7 C R9 00 U BIAS A GATE A 8857D TAT8858LH BIAS B GATE B LOWER B 0 LIN ADJ B UPPER B 8 9 BIAS B C R0 00 6 5 C 0p L 70nH L nh R R L nh L 70nH R0 R k L9 600 R 5 R k L7.nH Vgate.nH L8 C5.7pF C6.7pF OUT OUT to BALUN SEC T IN PRI GND MABA-00768-CT00 M/A COM R9.0k L.0nH C C Vbias C8 C 0p 5 R8 6 L0 nh C0 70pF Data Sheet: Rev D 0/5/ - of 8 - Disclaimer: Subject to change without notice
Typical Performance 50-000 MHz Notes:. 5ºC case temp, V supply,.. 79ch. NTSC + QAM (-6dB offset) to 00.5MHz flat input, dbmv/ch Vout at ch. 7 Gain vs. Frequency -5 Input Return Loss vs. Frequency 0 Output Return Loss vs. Frequency Gain (db) 5 9 7 Input Return Loss (db) -0-5 -0-5 -0-5 -0 Output Return Loss (db) -5-0 -5-0 -5-0 5 0.00 00.00 00.00 600.00 800.00 000.00 00.00-5 0.00 00.00 00.00 600.00 800.00 000.00 00.00-5 0.00 00.00 00.00 600.00 800.00 000.00 00.00 PdB (dbm) PdB vs. Frequency 0 9 8 7 6 5 0 0.00 00.00 00.00 600.00 800.00 000.00 00.00 NF (db) Noise Figure vs. Frequency 5 0 0.00 00.00 00.00 600.00 800.00 000.00 00.00 CIN (db) CIN vs. Frequency 85 80 75 70 65 60 55 0.00 00.00 00.00 00.00 00.00 500.00 600.00-60 CTB vs. Frequency -60 CSO vs. Frequency -50 XMOD vs. Frequency -65-65 -55 CTB (dbc) -70-75 -80 CSO (dbc) -70-75 -80 XMOD (dbc) -60-65 -70-75 -85-85 -80-90 0.00 00.00 00.00 00.00 00.00 500.00 600.00-90 0.00 00.00 00.00 00.00 00.00 500.00 600.00-85 0.00 00.00 00.00 00.00 00.00 500.00 600.00 Data Sheet: Rev D 0/5/ - of 8 - Disclaimer: Subject to change without notice
Detailed Device Description The TAT8858 is similar to other parts offered on the market; it contains two separate amplifiers. A major difference is the TAT8858 allows much flexibility to set gain and bias to cover multiple applications without an additional stage. This makes it ideal for green designs. It uses a cost effective high voltage MESFET technology (designed for CATV) and a phemt process (developed for high-volume applications). On-chip linearization is also utilized. Bias Current Adjustment R7 6 L9 nh C9 70pF Bias current is determined by settings:. Size of DC feedback resistors - decreasing R & R will increase IDD. Tail resistors - decreasing R will increase IDD, but lead to wider variations Active biasing schemes are possible but not necessary for most applications. Best performance is with IDD = 70mA C5.5pF R LIN ADJ A LOWER A BIAS A GATE A 8857D 5 TAT8858LH BIAS B GATE B C6.5pF L5 8nH R 60 R 60 L6 8nH L7 600 L8 600 C7 R R R5 0k R6 0k 8k 0k 6 7 C R9 00 LIN ADJ B LOWER B U UPPER A UPPER B BIAS A 8 9 BIAS B C R0 00 6 5 0 C L 70n L R R L L 70n C8 C R8 6 L0 nh C0 70pF Voltage Biasing: V and V The TAT8858 has two amplifiers which can be configured to split a V supply (and share the same current) or both amplifiers can be biased from a V supply and draw current independently. In the V case the voltage split ratio is left to the customer and is set by V gate. In v applications, no capacitance should be put on Vgate; this prevents a turn-on over-voltage condition from damaging the output FET. Data Sheet: Rev D 0/5/ - 5 of 8 - Disclaimer: Subject to change without notice
+v J L0 90nH Vbias C9 70pF R9 00 C 0p L 70nH GND R0 5 C.0uF C5.7pF C5.0uF R8.7k R9.0k Vgate Voltage divider should be done with same or lower resistor values to prevent gate leakage currents in the output FET from affecting V gate. 6 BIAS A UPPER A 5 U 57D 58LH GATE A GATE B L nh R k R L9 600 L7.nH Vgate OUT OUT to BALUN SEC T IN PRI GND L.0nH MABA-00768-CT00 C Vbias Additional information can be requested from TriQuint Applications Engineering, sjcapplications.engineering@tqs.com. Data Sheet: Rev D 0/5/ - 6 of 8 - Disclaimer: Subject to change without notice
Mechanical Information Package Information and Dimensions This package is lead-free/rohs-compliant. The plating material on the leads is 00% Matte Tin. It is compatible with both lead-free (maximum 60 C reflow temperature) and lead (maximum 5 C reflow temperature) soldering processes. The TAT8858 will be marked with a TAT8858 designator with a lot code marked below the part designator. The Y represents the last digit of the year the part was manufactured, the XXXX is an auto-generated number and Z refers to a wafer number in a lot batch. Mounting Configuration All dimensions are in millimeters (inches). Angles are in degrees. Notes:. A heatsink underneath the area of the PCB for the mounted device is strictly required for proper thermal operation. Damage to the device can occur without the use of one.. Ground / thermal vias are critical for the proper performance of this device. Vias should use a.xxmm (#xx /.0xxx ) diameter drill and have a final plated thru diameter of.xx mm (.0xx ).. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance. Data Sheet: Rev D 0/5/ - 7 of 8 - Disclaimer: Subject to change without notice
Product Compliance Information ESD Information Solderability Compatible with the latest version of J-STD-00, Lead free solder, 60 ESD Rating: Value: Test: Standard: Class III Passes 500 V min. Charged Device Model (CDM) JEDEC Standard JESD-C0 This part is compliant with EU 00/95/EC RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment). MSL Rating Level at +60 C convection reflow The part is rated Moisture Sensitivity Level <xy> at 60 C per JEDEC standard IPC/JEDEC J-STD-00. Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Tel: +.707.56.98 Email: info-sales@tqs.com Fax: +.707.56.85 For technical questions and application information: Email: sjcapplications.engineering@tqs.com Important Notice The information contained herein is believed to be reliable. TriQuint makes no warranties regarding the information contained herein. TriQuint assumes no responsibility or liability whatsoever for any of the information contained herein. TriQuint assumes no responsibility or liability whatsoever for the use of the information contained herein. The information contained herein is provided "AS IS, WHERE IS" and with all faults, and the entire risk associated with such information is entirely with the user. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for TriQuint products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. TriQuint products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. Data Sheet: Rev D 0/5/ - 8 of 8 - Disclaimer: Subject to change without notice