LD9704R 03/15/2017. Green-Mode PWM Controller with Frequency Swapping with protections and MOSFET Integrated. General Description.

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Green-Mode PWM Controller with Frequency Swapping with protections and MOSFET Integrated REV. 00 General Description The is built-in with several functions, protection and EMI-improved solution within a 680V MOSFET in a DIP-6 package. It takes less components counts or circuit space, especially ideal for those total solutions of low cost. The implemented functions include low startup current, green-mode power-saving operation and internal slope compensation. It also features more protections like OLP (Over Load Protection) and OVP (Over Voltage Protection) to prevent circuit damage occurred under abnormal conditions. Furthermore, the Frequency Swapping function can reduce the noise level and thus help the power circuit designers to easily deal with the EMI filter design by spending minimum amount of component cost and developing time. Features Built-in 680V Power MOSFET Fixed Switching Frequency at 130KHz Very Low Startup Current (<3 A) Current Mode Control Green Mode Control UVLO (Under Voltage Lockout) Internal Frequency Swapping, Slope Compensation OVP (Over Voltage Protection) on VCC Pin Built in OCP(Over Current Protection) Compensation OTP (Over Temperature Protection) through a NTC OLP (Over Load Protection) Applications Switching AC/DC Adaptor and Battery Charger Open Frame Switching Power Supply Typical Application AC input EMI Filter DC Output VCC OTP DRAIN COMP CS photocoupler GND -DS-00 March 2017 1

OTP COMP GND CS VCC DRAIN Pin Configuration DIP-6 (TOP VIEW) 8 6 5 TOP MARK YYWWPP YY: WW: PP: Year code Week code Production code 1 2 3 4 Ordering Information Part number Package Top Mark Shipping GP7 DIP-6 GP7 3600 /tube /Carton The is ROHS compliant / Green Packaged Protection Mode Switching Freq. OLP VCC OVP OTP Pin Output Short 130kHz Auto recovery Auto recovery Latch Auto-restart by OLP Pin Descriptions DIP-6 NAME FUNCTION 1 OTP Pull this pin below 0.95V to shut down the controller into latch mode until the AC resumes power-on. Connecting this pin to ground with NTC will achieve OTP protection. Let this pin float or connect a 100k resistor to disable the latch protection. 2 COMP Voltage feedback pin. Connect a photo-coupler to close the control loop and achieve the regulation. 3 GND Ground 4 CS Source terminal of the internal power MOSFET and Current sense pin 5,6 DRAIN Drain terminal of the internal power MOSFET 7 NC NC 8 VCC Supply voltage pin -DS-00 Match 2017 2

Block Diagram VCC V UVLO(ON) / V UVLO(OFF) Int.OSC UVLO Comparator PG internal bias & Vref OVP V BIAS OVP Comparator V CC-OVP DRAIN Protection V g,clamp =13V PG Driver Stage Green-Mode Control V COMP_OPEN COMP 1.5R R PWM Comparator S R Q VCS CS Slope Compensation VCS Leading Edge Blanking V CS_off OCP Comparator + - Int. OTP V COMP_OLP OLP Delay Counter PG OVP OTP V BIAS 100uA + - 1.05V/0.95V OLP Comparator Ext. OTP PG S R SET CLR Int. OTP Q Q OLP Shutdown Logic Protection/Latch Protection GND PDR -DS-00 Match 2017 3

Absolute Maximum Ratings Supply Voltage VCC COMP, CS, OTP DRAIN Avalanche Energy (L=10mH, IAS=3A ) on absolute maximum rating) Maximum Junction Temperature Storage Temperature Range Package Thermal Resistance (DIP-6/7, θ JA) Package Thermal Resistance (DIP-6/7, θ Jc) Power Dissipation (DIP-6/7, at Ambient Temperature = 25 C) Lead temperature (Soldering, 10sec) ESD Voltage Protection, Human Body Model (DRAIN pin is exclusive) ESD Voltage Protection, Machine Model (DRAIN pin is exclusive) -0.3V ~ 30V -0.3V ~ 6V -0.3V ~ 680V 45mJ 150 C -65 C ~ 150 C 80 C/W 30 C/W 1250mW 260 C 2.5 KV 250 V Caution: Stress exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stress above Recommended Operating Conditions may affect device reliability Recommended Operating Conditions Item Min. Max. Unit Operating Junction Temperature -40 125 C Supply VCC Voltage 8.5 26.5 V VCC Capacitor 4.7 10 F Start-up resistor Value (AC Side, Half Wave) 750K 2.4M COMP Pin Capacitor 1 10 nf Current Sense Impedance 0.52 - Ω Snubber Capacitor between Drain and CS pin - 100 pf Note: 1. It s essential to connect VCC pin with a SMD ceramic capacitor (0.1 F ~ 0.47 F) to filter out the undesired switching noise for stable operation. This capacitor should be placed close to IC pin as possible 2. It s also essential to connect a capacitor to COMP to filter out the undesired switching noise for stable operation. 3. The small signal components should be placed close to IC pin as possible. -DS-00 Match 2017 4

Electrical Characteristics (T A = +25 C unless otherwise stated, VCC=15.0V) PARAMETER CONDITIONS SYM. MIN TYP MAX UNITS Supply Voltage (VCC Pin) Startup Current VCC < UVLO(ON) I CC_ST 1.5 3 A Operating Current (with 1nF load on DRAIN pin) V COMP =3V I CC_OP1 2.5 3.5 ma V COMP =0V I CC_OP2 0.35 0.5 ma OLP/OVP Tripped / Auto I CC_OPA 600 A *; OTP Pin Tripped / Latch, VCC=7V OTP Pin Tripped / Latch VCC=5V I CC_OPL1 I CC_OPL2 430 500 A 40 60 A Latch-Off Release Voltage V CC_PDR 3.6 4.5 5.2 V UVLO(OFF) OUT OFF V CC_OFF 7.0 7.5 8.0 V UVLO(ON) V CC_ON 15 16 17 V VCC OVP Level V CC_OVP 28.5 V VCC OVP De-bounce time* T D_VCCOVP 8 cycle Voltage Feedback (Comp Pin) Short Circuit Current V COMP =0V I COMP 0.125 ma Open Loop Voltage COMP pin open V COMP_OPEN 2.75 3 3.25 V Normal Mode Threshold *; COMP pin V N 1.2 V Green Mode Threshold *; COMP pin V G 1 V Zero Duty Threshold VCOMP V ZDC 0.6 V Zero Duty Hysteresis V ZDCH 100 mv Current Sensing (CS pin) Maximum Input Voltage, V S_OFF *;Duty=50% V CS_50% 0.60 V Maximum Input Voltage, V S_OFF Duty=25% V CS_25% 0.50 V Min. on Time * T LEB 400 ns Internal Limited Vcs level Internal Slope Compensation* *; When V CS>V cs,limit, gate off immediately *; 0% to D MAX. (Linearly increase) V CS_LIMIT 1.2 V V SLP_L 300 mv Input impedance * Z CS 1 M Delay to Output * T PD 100 ns Soft Start Duration * T SS 7 ms -DS-00 Match 2017 5

(T A = +25 C unless otherwise stated, VCC=15.0V) PARAMETER CONDITIONS SYM. MIN TYP MAX UNITS Oscillator for Switching Frequency Frequency, FREQ F SW 120 130 140 khz Green Mode Frequency, FREQG F SW_GREEN 28 khz Frequency Swapping V COMP>2.575V F SW_MOD 6 % Temp. Stability* * F SW_TS 0 5 % Voltage Stability* *; (VCC=11V-25V) F SW_VS 0 1 % Max. Duty MXD 80 % OLP (Over Load Protection) OLP Trip Level V COMP_OLP 2.6 V OLP Delay Time at start-up* OLP + Soft start T D_OLPSS 71.5 ms OTP Pin Latch Protection (OTP Pin) OTP Pin Source Current I OTP 90 100 110 A OTP Turn-On Trip Level V OTP_ON 1.0 1.05 1.1 V OTP Turn-Off Trip Level V OTP_OFF 0.9 0.95 1.0 V OTP Turn-Off Trip Resistance *; V OTP_OFF/I OTP R OTP 9.5 k OTP pin de-bounce time V COMP > 3V T D_OTP 500 s Internal OTP Protection OTP Level * T UP_OTP 140 OTP Hysteresis * T INOTP_HYS 15 Electrical Characteristics for MOSFET (T A = +25 o C) PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNITS Drain to Source Breakdown Voltage Breakdown Voltage BV DSS Drain Current Vcc=0V,COMP=0V, ID=250 A BV DSS 680 V Continuous Drain Current *; Vcc=15V,COMP=2V I D 3 A Drain on Resistance D to S pin On-Resistance I D=1.5A;V CC=15V; R DSON 2.4 2.8 *: Guaranteed by design. -DS-00 Match 2017 6

Typical Performance Characteristics -DS-00 Match 2017 7

-DS-00 Match 2017 8

Application Information Operation Overview The L9704R meets the green-power requirement with a 680V MOSFET driver and is intended for the use in those modern switching power suppliers and adaptors which demand higher power efficiency and power-saving. It integrated more functions to reduce the external components counts and the size. Its major features are described as below. Under Voltage Lockout (UVLO) supply current. Lower startup current requirement on the PWM controller will help to increase the value of R1 and then reduce the power consumption on R1. By using CMOS process and the special circuit design, the maximum startup current for is under 3 A. If a higher resistance value of the R1 is chosen, it will usually take more time to start up. To carefully select the value of R1 and C1 will optimize the power consumption and startup time. An UVLO comparator is implemented in it to detect the voltage on the VCC pin. It would assure the supply AC input EMI Filter voltage enough to turn on the PWM controller Cbulk and further to drive the power MOSFET. As shown in D1 Fig. 11, a hysteresis is built in to prevent the shutdown from the voltage dip during startup. Vcc R1 VCC C1 DRAIN UVLO(on) UVLO(off) GND CS I(Vcc) startup current (~µa) Fig. 11 operating current (~ ma) Startup Current and Startup Circuit The typical startup circuit to generate VCC of the is shown in Fig. 12. t t During the startup transient, the VCC is below UVLO threshold. Before it has sufficient voltage to develop OUT pulse to operation, R1 will provide the startup current to charge the capacitor C1. Once VCC obtain enough voltage to turn on the and it s working condition, it will enable the auxiliary winding of the transformer to provide Fig. 12 Current Sensing and Leading-edge Blanking The typical current mode of PWM controller feedbacks both current signal and voltage signal to close the control loop and achieve regulation. The detects the internal MOSFET current from the CS pin and pulse-by-pulse limited current. The maximum voltage threshold of the current sensing pin is Vcs_off. Due to integrated leading edge blanking circuit and internal spike filter, the MOSFET peak current can be obtained from the equation as follows: I PEAK ( MAX ) V CS _ OFF R S -DS-00 Match 2017 9

In general, the power MOSFET peak current is various in corresponding to AC input voltage. To compensate it, will change the current limit Vcs_off with the duty cycles. Please refer to Fig. 13 conditions. The green-mode control is Leadtrend Technology s own property. Please refer to Fig. 14 Fs 130kHz VCS_OFF (V) 0.80V 0.60V 28kHz 0.50V 0.6V 1V Fig. 14 1.2V VCOMP 25% 50% 80% Duty Fig. 13 Voltage Feedback Loop The voltage feedback signal is provided from the TL431 at the secondary side through the photo-coupler to the COMP pin of the.it would carry a diode voltage offset at the stage to feed the voltage divider at the ratio, that is, R V PWM ) ( V COMPARATOR 1.5R R ( COMP A pull-high resistor is embedded internally and can be eliminated externally. Oscillator and Switching Frequency The is implemented with Frequency Swapping function which helps the power supply designers to both optimize EMI performance and lower system cost. The switching frequency substantially centers at 130KHz, and swap between a range of ± 6KHz. Green-Mode Operation By using the green-mode control, the switching frequency can be reduced under the light load condition. This feature helps to improve the efficiency in light load ) On/Off Control The can be turned off by pulling COMP pin lower than 0.6V. The DRAIN pin of the will be disabled immediately under such condition. The off-mode can be released when the pull-low signal is removed. Internal Slope Compensation In the conventional applications, the problem of the stability is a critical issue for current mode controlling, when it operates over 50% duty-cycle. As UC384X, It takes slope compensation from injecting the ramp signal of the RT/CT pin through a coupling capacitor. It therefore requires no extra design for the since it has integrated it already. Over Load Protection (OLP) - Auto Recovery To protect the circuit from damage in over-load condition and short or open-loop condition, the is implemented with smart OLP function. It also features auto recovery function; see Fig. 15 for the waveform. In case of fault condition, the feedback system will force the voltage loop toward the saturation and then pull the voltage high on COMP pin (VCOMP). When the VCOMP ramps up to the OLP threshold of 2.6V and continues over OLP delay time, the protection will -DS-00 Match 2017 10

be activated and then turn off the gate output to stop the switching of power circuit. With the protection mechanism, the average input power will be minimized to remain the component temperature and stress within the safe operating area. UVLO(on) UVLO(off) OLP VCC COMP OUT Switching OLP UVLO(off) OLP Reset OLP delay time OLP trip Level Non-Switching Switching Fig. 15 Over Voltage Protection (OVP) on VCC - Auto Recovery The Vcc OVP function of is in auto recovery mode. As soon as the voltage of the Vcc pin rises above OVP threshold, the output gate drive circuit will be shutdown simultaneous to turn off the power MOSFET. MOSFET Characteristic The MOSFET is divided into three operation regions, ohmic region, saturation region, and the cut-off region, shown as Fig. 16. For switching power supply applications, it shall operate in ohmic and cut-off region. Never reach the region of saturation; it would cause damage for acting beyond the maximum safety operating area. It s necessary to check the characteristic of MOSFET. t t t ID VGS5 > VGS4 > VGS3 > VGS2 > VGS1 Ohmic Region Saturation Region Fig. 16 Cut-off region OTP Pin --- Latched Mode Protection VGS5 VGS4 VGS3 VGS2 VGS1 VDS The OTP circuit is implemented to sense whether there is any hot-spot of power circuit like power MOSFET or output rectifier. Once an over-temperature condition is detected, the OTP is enabled to shut down the controller to protect the controller. Typically, a NTC is recommended to connect with OTP pin. The NTC resistance will decrease as the device or ambient in high temperature. The relationship is as below. V OTP =100μA X R NTC When the VOTP is lower than the defined voltage threshold (typ. 0.95V), the will shut down the gate output and latch off the power supply. There are 2 conditions required to restart it successfully. First, cool down the circuit so that NTC resistance will increase and raise VOTP up above 1.05V. Then, remove the AC power cord and re-plug AC power. Layout Guide For PCB layout, please check spike on CS pin. This measurement method is between GND and CS pin to check positive and negative voltage. Suggest Vcs spike must be is under 0.2V at minimum load and 0.6V at full load after LEB time (~300nS). Moreover, Check negative voltage is not still lower than -2V in 200nS time continued. -DS-00 Match 2017 11

(4) (2) VCC OUT Layout Guide (4) ß (3)ß (2)ß (1) GND CS (1) (3) This spike voltage is lower than VCOMP8/4 after LEB period. The negative spike exceeds -2.0V in 200nS continued Fig. 17 -DS-00 Match 2017 12

Package Information DIP-6 S Dimension in Millimeters Dimensions in Inches Symbol Min Max Min Max A 9.017 10.160 0.355 0.400 B 6.100 6.600 0.240 0.260 C 3.300 4.320 0.130 0.170 D 0.356 0.584 0.014 0.023 E 1.143 1.778 0.045 0.070 F 2.480 2.600 0.098 0.102 H 3.170 3.600 0.125 0.142 I 2.921 3.810 0.115 0.150 J 7.366 7.874 0.290 0.310 K 0.246 0.305 0.010 0.012 L 0.381 0.540 0.015 0.021 M 7.493 8.255 0.295 0.325 P 2.920 3.100 0.115 0.122 S 6.273 6.427 0.247 0.253 Important Notice Leadtrend Technology Inc. reserves the right to make changes or corrections to its products at any time without notice. Customers should verify the datasheets are current and complete before placing order. -DS-00 Match 2017 13

Revision History REV. Date Change Notice 00 Original Specification. -DS-00 Match 2017 14