MCP4021/2/3/4. Low-Cost NV Digital POT with WiperLock Technology. Package Types. Features. Block Diagram. Applications. Description.

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Low-Cost NV Digital POT with WiperLock Technology Features Non-volatile Digital Potentiometer in SOT-23, SOIC, MSOP and DFN packages 64 Taps: 63 Resistors with Taps to terminal A and terminal B Simple Up/Down () Protocol Power-on Recall of Saved Wiper Setting Resistance Values: 2.1 kω, 5 kω, 1 kω or 5 kω Low Tempco: - Absolute (Rheostat): 5 ppm ( C to 7 C typ.) - Ratiometric (Potentiometer): 1 ppm (typ.) Low Wiper Resistance: 75Ω (typ.) WiperLock Technology to Secure the wiper setting in non-volatile memory (EEPROM) High-Voltage Tolerant Digital Inputs: Up to 12.5V Low-Power Operation: 1 μa Max Static Current Wide Operating Voltage: 2.7V to 5.5V Extended Temperature Range: -4 C to +125 C Applications Power Supply Trim and Calibration Mechanical Potentiometer Replacement in New Designs Instrumentation, Offset and Gain Adjust Description The MCP421/2/3/4 devices are non-volatile, 6-bit digital potentiometers that can be configured as either a potentiometer or rheostat. The wiper setting is controlled through a simple Up/Down () serial interface. These devices implement Microchips WiperLock technology, which allows application-specific calibration settings to be secured in the EEPROM without requiring the use of an additional write-protect pin. Device Features. Device Wiper Configuration Memory Type Resistance (typical) Options (kω) Package Types MCP421 SOIC, MSOP, DFN Potentiometer V DD V SS A W V DD V SS 1 2 3 4 A W B MCP423 SOT-23-6 Potentiometer Block Diagram V DD V SS CS Wiper (Ω) 1 2 3 B A W 8 7 6 5 4 NC B CS 6 A 5 W CS EEPROM and WiperLock Technology # of Steps Power-Up and Brown-Out Control 2-Wire Interface and Control Logic V DD Operating Range V DD V SS 1 2 3 MCP422 SOT-23-6 Rheostat A B W MCP424 SOT-23-5 Rheostat V DD 1 W V SS 2 3 B Wiper Register (Resistor Array) 6 A 5 W 4 5 W CS A 4 CS A W Control WiperLock Interface Technology MCP421 Potentiometer (1) EE 2.1, 5., 1., 5. 75 64 2.7V - 5.5V Yes MCP422 Rheostat EE 2.1, 5., 1., 5. 75 64 2.7V- 5.5V Yes MCP423 Potentiometer EE 2.1, 5., 1., 5. 75 64 2.7V - 5.5V Yes MCP424 Rheostat EE 2.1, 5., 1., 5. 75 64 2.7V - 5.5V Yes Note 1: Floating either terminal (A or B) allows the device to be used in Rheostat mode. B 25 Microchip Technology Inc. DS21945C-page 1

1. ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings DS21945C-page 2 25 Microchip Technology Inc.

AC/DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, all parameters apply across the specified operating ranges. T A = -4 C to +125 C, 2.1 kω, 5kΩ, 1 kω and 5 kω devices. Typical specifications represent values for V DD = 5.5V, V SS = V, T A = +25 C. Parameters Sym Min Typ Max Units Conditions Wiper Resistance (Note 3, Note 4) R W 7 125 Ω 5.5V 7 325 Ω 2.7V Nominal Resistance Tempco ΔR/ΔT 5 ppm/ C T A = -2 C to +7 C 1 ppm/ C T A = -4 C to +85 C 15 ppm/ C T A = -4 C to +125 C Ratiometeric Tempco ΔV WA /ΔT 1 ppm/ C MCP421 and MCP423 only, code = 1Fh Full-Scale Error V WFSE -.5 -.1 +.5 LSb Code 3Fh (MCP421/23 only) Zero-Scale Error V WZSE -.5 +.1 +.5 LSb Code h (MCP421/23 only) Potentiometer Integral Non-linearity INL -.5.25 +.5 LSb MCP421/23 only (Note 2) Potentiometer Differential Non-linearity DNL -.5.25 +.5 LSb MCP421/23 only (Note 2) Rheostat Integral Non-linearity R-INL -.5.25 +.5 LSb 2.1 kω 5.5V MCP421 (Note 4, Note 8) -8.5 +4.5 +8.5 LSb 2.7V (Note 7) MCP422 and MCP424 (Note 4) -.5.25 +.5 LSb 5 kω 5.5V -5.5 +2.5 +5.5 LSb 2.7V (Note 7) Rheostat Differential Non-linearity MCP421 (Note 4, Note 8) MCP422 and MCP424 (Note 4) -.5.25 +.5 LSb 1 kω 5.5V -3 +1 +3 LSb 2.7V (Note 7) -.5.25 +.5 LSb 5 kω 5.5V -1 +.25 +1 LSb 2.7V (Note 7) R-DNL -.5.25 +.5 LSb 2.1 kω 5.5V -1 +.5 +2 LSb 2.7V (Note 7) -.5.25 +.5 LSb 5 kω 5.5V -1 +.25 +1.25 LSb 2.7V (Note 7) -.5.25 +.5 LSb 1 kω 5.5V -.5 +.5 LSb 2.7V (Note 7) -.5.25 +.5 LSb 5 kω 5.5V -.5 +.5 LSb 2.7V (Note 7) Note 1: Resistance is defined as the resistance between terminal A to terminal B. 2: INL and DNL are measured at V W with V A = V DD and V B = V SS. (-22 devices V A = 4V). 3: MCP421/23 only, test conditions are: I W = 1.9 ma, code = h. 4: MCP422/24 only, test conditions are: Device Resistance Current at Voltage 5.5V 2.7V Comments 2.1 kω 2.25 ma 1.1 ma MCP422 includes V WZSE 5kΩ 1.4 ma 45 μa MCP424 includes V WFSE 1 kω 45 μa 21 μa 5 kω 9 μa 4 μa 5: Resistor terminals A, W and Bs polarity with respect to each other is not restricted. 6: This specification by design 7: Non-linearity is affected by wiper resistance (R W ), which changes significantly over voltage and temperature. See Section 6. Resistor for additional information. 8: The MCP421 is externally connected to match the configurations of the MCP422 and MCP424, and then tested. 25 Microchip Technology Inc. DS21945C-page 3

AC/DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, all parameters apply across the specified operating ranges. T A = -4 C to +125 C, 2.1 kω, 5kΩ, 1 kω and 5 kω devices. Typical specifications represent values for V DD = 5.5V, V SS = V, T A = +25 C. Parameters Sym Min Typ Max Units Conditions Resistor Terminal Input Voltage Range (Terminals A, B and W) V A, V W, V B Vss V DD V Note 5, Note 6 Maximum current through A, W or B I W 2.5 ma Note 6 Leakage current into A, W or B I WL 1 na MCP421 A = W = B = V SS 1 na MCP422/23 A = W = V SS 1 na MCP424 W = V SS Capacitance (P A ) C AW 75 pf f =1 MHz, code = 1Fh Capacitance (P w ) C W 12 pf f =1 MHz, code = 1Fh Capacitance (P B ) C BW 75 pf f =1 MHz, code = 1Fh Bandwidth -3 db BW 1 MHz Code = 1F, output load = 3 pf Digital Inputs/Outputs (CS, ) Input High Voltage V IH.7 V DD V Input Low Voltage V IL.3 V DD V High-Voltage Input Entry Voltage V IHH 8.5 12.5 (6) V Threshold for WiperLock Technology High-Voltage Input Exit Voltage V IHH V DD +.8 (6) V CS Pull-up/Pull-down Resistance R CS 16 kω V DD = 5.5V, V CS = 3V CS Weak Pull-up/Pull-down Current I PU 17 μa V DD = 5.5V, V CS = 3V Input Leakage Current I IL -1 1 μa V IN = V DD CS and Pin Capacitance C IN, C OUT 1 pf f C = 1 MHz RAM (Wiper) Value Value Range N h 3Fh hex EEPROM Endurance E ndurance 1M Cycles EEPROM Range N h 3Fh hex Initial Factory Setting N 1Fh hex WiperLock Technology = Off Power Requirements Power Supply Sensitivity (MCP421 and MCP423 only) PSS.15.35 %/% V DD = 4.5V to 5.5V, V A = 4.5V, Code = 1Fh.15.35 %/% V DD = 2.7V to 4.5V, V A = 2.7V, Code = 1Fh Note 1: Resistance is defined as the resistance between terminal A to terminal B. 2: INL and DNL are measured at V W with V A = V DD and V B = V SS. (-22 devices V A = 4V). 3: MCP421/23 only, test conditions are: I W = 1.9 ma, code = h. 4: MCP422/24 only, test conditions are: Device Resistance Current at Voltage 5.5V 2.7V Comments 2.1 kω 2.25 ma 1.1 ma MCP422 includes V WZSE 5kΩ 1.4 ma 45 μa MCP424 includes V WFSE 1 kω 45 μa 21 μa 5 kω 9 μa 4 μa 5: Resistor terminals A, W and Bs polarity with respect to each other is not restricted. 6: This specification by design 7: Non-linearity is affected by wiper resistance (R W ), which changes significantly over voltage and temperature. See Section 6. Resistor for additional information. 8: The MCP421 is externally connected to match the configurations of the MCP422 and MCP424, and then tested. DS21945C-page 4 25 Microchip Technology Inc.

t CSLO t CSHI CS tluc t LCUF t LO 1/f UD t LUC t LCUF t HI t LCUR t S W t S FIGURE 1-1: Increment Timing Waveform. SERIAL TIMING CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply across the specified operating ranges. Extended (E): V DD = +2.7V to 5.5V, T A = -4 C to +125 C. Parameters Sym Min Typ Max Units Conditions CS Low Time t CSLO 5 μs CS High Time t CSHI 5 ns to CS Hold Time t LUC 5 ns CS to Low Setup Time t LCUF 5 ns CS to High Setup Time t LCUR 3 μs High Time t HI 5 ns Low Time t LO 5 ns Up/Down Toggle Frequency f UD 1 MHz Wiper Settling Time t S.5 μs 2.1 kω, C L = 1 pf 1 μs 5 kω, C L = 1 pf 2 μs 1 kω, C L = 1 pf 1 5 μs 5 kω, C L = 1 pf Wiper Response on Power-up t PU 2 ns Internal EEPROM Write Time twc 5 ms 25 Microchip Technology Inc. DS21945C-page 5

t CSLO t CSHI CS t LUC t HI 1/f UD t LUC t LCUF t LCUR t LO t S t S W FIGURE 1-2: Decrement Timing Waveform. SERIAL TIMING CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply across the specified operating ranges. Extended (E): V DD = +2.7V to 5.5V, T A = -4 C to +125 C. Parameters Sym Min Typ Max Units Conditions CS Low Time t CSLO 5 μs CS High Time t CSHI 5 ns to CS Hold Time t LUC 5 ns CS to Low Setup Time t LCUF 5 ns CS to High Setup Time t LCUR 3 μs High Time t HI 5 ns Low Time t LO 5 ns Up/Down Toggle Frequency f UD 1 MHz Wiper Settling Time t S.5 μs 2.1 kω, C L = 1 pf 1 μs 5 kω, C L = 1 pf 2 μs 1 kω, C L = 1 pf 1 5 μs 5 kω, C L = 1 pf Wiper Response on Power-up t PU 2 ns Internal EEPROM Write Time twc 5 ms DS21945C-page 6 25 Microchip Technology Inc.

CS 12V 5V t CSLO t CSHI thuc t HCUF t LO 1/f UD t HUC t HCUF t HI t HCUR t S W t S FIGURE 1-3: High-Voltage Increment Timing Waveform. SERIAL TIMING CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply across the specified operating ranges. Extended (E): V DD = +2.7V to 5.5V, T A = -4 C to +125 C. Parameters Sym Min Typ Max Units Conditions CS Low Time t CSLO 5 μs CS High Time t CSHI 5 ns High Time t HI 5 ns Low Time t LO 5 ns Up/Down Toggle Frequency f UD 1 MHz HV to CS Hold Time t HUC 1.5 μs HV CS to Low Setup Time t HCUF 8 μs HV CS to High Setup Time t HCUR 4.5 μs Wiper Settling Time t S.5 μs 2.1 kω, C L = 1 pf 1 μs 5 kω, C L = 1 pf 2 μs 1 kω, C L = 1 pf 1 5 μs 5 kω, C L = 1 pf Wiper Response on Power-up t PU 2 ns Internal EEPROM Write Time twc 5 ms 25 Microchip Technology Inc. DS21945C-page 7

t CSLO t CSHI CS 12V 5V t HUC t HI 1/f UD t HUC t HCUF t HCUR t LO t S t S W FIGURE 1-4: High-Voltage Decrement Timing Waveform. SERIAL TIMING CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply across the specified operating ranges. Extended (E): V DD = +2.7V to 5.5V, T A = -4 C to +125 C. Parameters Sym Min Typ Max Units Conditions CS Low Time t CSLO 5 μs CS High Time t CSHI 5 ns High Time t HI 5 ns Low Time t LO 5 ns Up/Down Toggle Frequency f UD 1 MHz HV to CS Hold Time t HUC 1.5 μs HV CS to Low Setup Time t HCUF 8 μs HV CS to High Setup Time t HCUR 4.5 μs Wiper Settling Time t S.5 μs 2.1 kω, C L = 1 pf 1 μs 5 kω, C L = 1 pf 2 μs 1 kω, C L = 1 pf 1 5 μs 5 kω, C L = 1 pf Wiper Response on Power-up t PU 2 ns Internal EEPROM Write Time twc 5 ms DS21945C-page 8 25 Microchip Technology Inc.

TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, V DD = +2.7V to +5.5V, V SS = GND. Parameters Sym Min Typ Max Units Conditions Temperature Ranges Specified Temperature Range T A -4 +125 C Operating Temperature Range T A -4 +125 C Storage Temperature Range T A -65 +15 C Thermal Package Resistances Thermal Resistance, 5L-SOT-23 θ JA 7 C/W Thermal Resistance, 6L-SOT-23 θ JA 12 C/W Thermal Resistance, 8L-DFN (2x3) θ JA 85 C/W Thermal Resistance, 8L-MSOP θ JA 26 C/W Thermal Resistance, 8L-SOIC θ JA 163 C/W 25 Microchip Technology Inc. DS21945C-page 9

2. TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. Device Current (I DD ) (μa) 8 7 6 5 4 3 2 1 2.7V -4 C 2.7V 25 C 2.7V 85 C 2.7V 125 C 5.5V -4 C 5.5V 25 C 5.5V 85 C 5.5V 125 C.2.4.6.8 1. f (MHz) R CS (kohms) 25 2 15 1 5 I CS R CS 9 8 7 6 5 4 3 2 1 V CS (V) 1 8 6 4 2-2 -4-6 -8-1 Ics (μa) FIGURE 2-1: Device Current (I DD ) vs. Frequency (f ) and Ambient Temperature (V DD = 2.7V and 5.5V). FIGURE 2-4: CS Pull-up/Pull-down Resistance (R CS ) and Current (I CS ) vs. CS Input Voltage (V CS ) (V DD = 5.5V). Device Current (I DD ) (μa) 6. 5. V DD = 5.5V 4. 3. 2. V DD = 2.7V 1.. -4 25 85 125 Ambient Temperature ( C) CS V PP Threshold (V) 12 1 8 6 4 2 1.8V Entry 2.7V Entry 5.5V Entry 1.8V Exit 2.7V Exit 5.5V Exit -4-2 2 4 6 8 1 12 Ambient Temperature ( C) FIGURE 2-2: Write Current (I WRITE ) vs. Ambient Temperature and V DD. FIGURE 2-5: CS High Input Entry/Exit Threshold vs. Ambient Temperature and V DD. Device Current (I DD ) (μa).8.7 V DD = 5.5V.6.5.4.3 V DD = 2.7V.2.1. -4 25 85 125 Ambient Temperature ( C) FIGURE 2-3: Device Current (I SHDN ) vs. Ambient Temperature and V DD. (CS = V DD ). DS21945C-page 1 25 Microchip Technology Inc.

Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. 14 12-4C Rw 25C Rw 85C Rw 125C Rw -4C INL 25C INL 85C INL 125C INL -4C DNL 25C DNL 85C DNL 125C DNL.75.5 12 1-4C Rw 25C Rw 85C Rw 125C Rw -4C INL 25C INL 85C INL 125C INL -4C DNL 25C DNL 85C DNL 125C DNL.8.6 Wiper Resistance (Rw)(ohms) 1 8 6 4 2 INL DNL RW.25 -.25 -.5 -.75 Error (LSb) Wiper Resistance (Rw)(ohms) 8 6 4 2 INL RW DNL.4.2 -.2 Error (LSb) 8 16 24 32 4 48 56 Wiper Setting (decimal) -.1 8 16 24 32 4 48 56 Wiper Setting (decimal) -.4 FIGURE 2-6: 2.1 kω Pot Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 5.5V). FIGURE 2-8: 2.1 kω Rheo Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 5.5V). Wiper Resistance (Rw)(ohms) 4 3 2 1-4C Rw 25C Rw 85C Rw 125C Rw -4C INL 25C INL 85C INL 125C INL -4C DNL 25C DNL 85C DNL 125C DNL INL DNL RW 8 16 24 32 4 48 56 Wiper Setting (decimal).1.5 -.5 -.1 Error (LSb) Wiper Resistance (Rw)(ohms) 5 4 3 2 1-4C Rw 25C Rw 85C Rw 125C Rw -4C INL 25C INL 85C INL 125C INL -4C DNL 25C DNL 85C DNL 125C DNL RW INL DNL 8 16 24 32 4 48 56 Wiper Setting (decimal) 1 8 6 4 2-2 Error (LSb) FIGURE 2-7: 2.1 kω Pot Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 2.7V). FIGURE 2-9: 2.1 kω Rheo Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 2.7V). 25 Microchip Technology Inc. DS21945C-page 11

Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. Nominal Resistance (R AB ) (Ohms) 28 26 24 22 2 V DD = 5.5V V DD = 2.7V -4 4 8 12 Ambient Temperature ( C) FIGURE 2-1: 2.1 kω Nominal Resistance (Ω) vs. Ambient Temperature and V DD. R WB (Ohms) 25 2 15 1 5-4 C 25 C 85 C 125 C 8 16 24 32 4 48 56 64 Wiper Setting (decimal) FIGURE 2-11: 2.1 kω R WB (Ω) vs. Wiper Setting and Ambient Temperature. DS21945C-page 12 25 Microchip Technology Inc.

Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. WIPER WIPER FIGURE 2-12: 2.1 kω Low-Voltage Decrement Wiper Settling Time (V DD = 2.7V). FIGURE 2-15: 2.1 kω Low-Voltage Increment Wiper Settling Time (V DD = 2.7V). WIPER WIPER FIGURE 2-13: 2.1 kω Low-Voltage Decrement Wiper Settling Time (V DD = 5.5V). FIGURE 2-16: 2.1 kω Low-Voltage Increment Wiper Settling Time (V DD = 5.5V). WIPER V DD FIGURE 2-14: Response Time. 2.1 kω Power-Up Wiper 25 Microchip Technology Inc. DS21945C-page 13

Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. Wiper Resistance (Rw)(ohms) 14 12 1 8 6 4 2-4C Rw 25C Rw 85C Rw 125C Rw -4C INL 25C INL 85C INL 125C INL -4C DNL 25C DNL 85C DNL 125C DNL INL DNL RW 8 16 24 32 4 48 56 Wiper Setting (decimal).75.5.25 -.25 -.5 -.75 -.1 Error (LSb) FIGURE 2-17: 5kΩ Pot Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 5.5V). FIGURE 2-19: 5kΩ Rheo Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 5.5V) FIGURE 2-18: 5kΩ Pot Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 2.7V). FIGURE 2-2: 5kΩ Rheo Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 2.7V). DS21945C-page 14 25 Microchip Technology Inc.

Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. Nominal Resistance (R AB ) (Ohms) 495 4925 49 4875 485 4825 48 V DD = 5.5V V DD = 2.7V 2.7V Vdd 5.5V Vdd -4-2 2 4 6 8 1 12 Ambient Temperature ( C) FIGURE 2-21: 5kΩ Nominal Resistance (Ω) vs. Ambient Temperature and V DD. R WB (Ohms) 6 5 4 3 2 1-4 C 25 C 85 C 125 C 8 16 24 32 4 48 56 64 Wiper Setting (decimal) FIGURE 2-22: 5kΩ R WB (Ω) vs. Wiper Setting and Ambient Temperature. 25 Microchip Technology Inc. DS21945C-page 15

Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. WIPER WIPER FIGURE 2-23: 5kΩ Low-Voltage Decrement Wiper Settling Time (V DD = 2.7V). FIGURE 2-25: 5kΩ Low-Voltage Increment Wiper Settling Time (V DD = 2.7V). WIPER WIPER FIGURE 2-24: 5kΩ Low-Voltage Decrement Wiper Settling Time (V DD = 5.5V). FIGURE 2-26: 5kΩ Low-Voltage Increment Wiper Settling Time (V DD = 5.5V). DS21945C-page 16 25 Microchip Technology Inc.

Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. Wiper Resistance (Rw)(ohms) 12 1 8 6 4 2-4C Rw 25C Rw 85C Rw 125C Rw -4C INL 25C INL 85C INL 125C INL -4C DNL 25C DNL 85C DNL 125C DNL INL RW DNL 8 16 24 32 4 48 56 Wiper Setting (decimal).5.25 -.25 -.5 -.75 -.1 Error (LSb) FIGURE 2-27: 1 kω Pot Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 5.5V). FIGURE 2-29: 1 kω Rheo Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 5.5V). FIGURE 2-28: 1 kω Pot Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 2.7V). FIGURE 2-3: 1 kω Rheo Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 2.7V). 25 Microchip Technology Inc. DS21945C-page 17

Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. Nominal Resistance (R AB ) (Ohms) 125 123 121 119 117 115 113 111 19 17 15 V DD = 5.5V V DD = 2.7V -4-2 2 4 6 8 1 12 Ambient Temperature ( C) FIGURE 2-31: 1 kω Nominal Resistance (Ω) vs. Ambient Temperature and V DD. R WB (Ohms) 12 1 8 6 4 2-4 C 25 C 85 C 125 C 8 16 24 32 4 48 56 64 Wiper Setting (decimal) FIGURE 2-32: 1 kω R WB (Ω) vs. Wiper Setting and Ambient Temperature. DS21945C-page 18 25 Microchip Technology Inc.

Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. WIPER WIPER FIGURE 2-33: 1 kω Low-Voltage Decrement Wiper Settling Time (V DD = 2.7V). FIGURE 2-35: 1 kω Low-Voltage Increment Wiper Settling Time (V DD = 2.7V). WIPER WIPER FIGURE 2-34: 1 kω Low-Voltage Decrement Wiper Settling Time (V DD = 5.5V). FIGURE 2-36: 1 kω Low-Voltage Increment Wiper Settling Time (V DD = 5.5V). 25 Microchip Technology Inc. DS21945C-page 19

Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. Wiper Resistance (Rw)(ohms) 2 16 12 8 4-4C Rw 25C Rw 85C Rw 125C Rw -4C INL 25C INL 85C INL 125C INL -4C DNL 25C DNL 85C DNL 125C DNL INL RW DNL.1.5 -.5 -.1 Error (LSb) Wiper Resistance (Rw)(ohms) 2 15 1 5-4C Rw 25C Rw 85C Rw 125C Rw -4C INL 25C INL 85C INL 125C INL -4C DNL 25C DNL 85C DNL 125C DNL INL RW DNL.15.1.5 -.5 Error (LSb) 8 16 24 32 4 48 56 Wiper Setting (decimal) -.15 8 16 24 32 4 48 56 Wiper Setting (decimal) -.1 FIGURE 2-37: 5 kω Pot Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 5.5V). FIGURE 2-39: 5 kω Rheo Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 5.5V). Wiper Resistance (Rw)(ohms) 6 5 4 3 2 1-4C Rw 25C Rw 85C Rw 125C Rw -4C INL 25C INL 85C INL 125C INL -4C DNL 25C DNL 85C DNL 125C DNL INL DNL RW.5.25 -.25 -.5 -.75 Error (LSb) Wiper Resistance (Rw)(ohms) 6 5 4 3 2 1-4C Rw 25C Rw 85C Rw 125C Rw -4C INL 25C INL 85C INL 125C INL 1.5 1.5 -.5-1 Error (LSb) 8 16 24 32 4 48 56 Wiper Setting (decimal) -.1 8 16 24 32 4 48 56 Wiper Setting (decimal) -1.5 FIGURE 2-38: 5 kω Pot Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 2.7V). FIGURE 2-4: 5 kω Rheo Mode R W (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Ambient Temperature (V DD = 2.7V). DS21945C-page 2 25 Microchip Technology Inc.

Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. Nominal Resistance (R AB ) (Ohms) 498 496 494 492 49 488 486 484 482 48 V DD = 5.5V V DD = 2.7V -4-2 2 4 6 8 1 12 Ambient Temperature ( C) FIGURE 2-41: 5 kω Nominal Resistance (Ω) vs. Ambient Temperature and V DD. R WB (Ohms) 6 5 4 3 2 1-4C 25C 85C 125C 8 16 24 32 4 48 56 64 Wiper Setting (decimal) FIGURE 2-42: 5 kω R WB (Ω) vs. Wiper Setting and Ambient Temperature. 25 Microchip Technology Inc. DS21945C-page 21

Note: Unless otherwise indicated, T A = +25 C, V DD = 5V, V SS = V. WIPER WIPER FIGURE 2-43: 5 kω Low-Voltage Decrement Wiper Settling Time (V DD = 2.7V). FIGURE 2-46: 5 kω Low-Voltage Increment Wiper Settling Time (V DD = 2.7V). WIPER WIPER FIGURE 2-44: 5 kω Low-Voltage Decrement Wiper Settling Time (V DD = 5.5V). FIGURE 2-47: 5 kω - Low-Voltage Increment Wiper Settling Time (V DD = 5.5V). WIPER V DD FIGURE 2-45: Response Time. 5 kω Power-Up Wiper DS21945C-page 22 25 Microchip Technology Inc.

3. PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: MCP421 (SOIC-8) PIN FUNCTION TABLE Pin Number MCP422 MCP423 (SOT-23-6) MCP424 (SOT-23-5) Symbol Pin Type Buffer Type Function 1 1 1 V DD P Positive Power Supply Input 2 2 2 V SS P Ground 3 6 A I/O A Potentiometer Terminal A 4 5 5 W I/O A Potentiometer Wiper Terminal 5 4 4 CS I TTL Chip Select Input 6 B I/O A Potentiometer Terminal B 7 NC No Connection 8 3 3 I TTL Increment/Decrement Input Legend: TTL = TTL compatible input A = Analog input I = Input O = Output P = Power 3.1 Positive Power Supply Input (V DD ) The V DD pin is the devices positive power supply input. The input power supply is relative to V SS and can range from 2.7V to 5.5V. A decoupling capacitor on V DD (to V SS ) is recommended to achieve maximum performance. 3.2 Ground (V SS ) The V SS pin is the device ground reference. 3.3 Potentiometer Terminal A The terminal A pin is connected to the internal potentiometers terminal A (available on some devices). The potentiometers terminal A is the fixed connection to the x3f terminal of the digital potentiometer. The terminal A pin is available on the MCP421, MCP422 and MCP423 devices. The terminal A pin does not have a polarity relative to the terminal W or B pins. The terminal A pin can support both positive and negative current. The voltage on teminal A must be between V SS and V DD. The terminal A pin is not available on the MCP424. The potentiometers terminal A is internally floating. 3.4 Potentiometer Wiper (W) Terminal The terminal W pin is connected to the internal potentiometers terminal W (the wiper). The wiper terminal is the adjustable terminal of the digital potentiometer. The terminal W pin does not have a polarity relative to terminals A or B pins. The terminal W pin can support both positive and negative current. The voltage on teminal W must be between V SS and V DD. 3.5 Potentiometer Terminal B The terminal B pin is connected to the internal potentiometers terminal B (available on some devices). The potentiometers terminal B is the fixed connection to the x terminal of the digital potentiometer. The terminal B pin is available on the MCP421 device. The terminal B pin does not have a polarity relative to the terminal W or A pins. The terminal B pin can support both positive and negative current. The voltage on teminal B must be between V SS and V DD. The terminal B pin is not available on the MCP422, MCP423 and MCP424 devices. For the MCP423 and MCP424, the internal potentiometers terminal B is internally connected to V SS. Terminal B does not have a polarity relative to terminals W or A. Terminal B can support both positive and negative current. For the MCP422, terminal B is internally floating. 25 Microchip Technology Inc. DS21945C-page 23

3.6 Chip Select (CS) The CS pin is the chip select input. Forcing the CS pin to V IL enables the serial commands. These commands can increment and decrement the wiper. Depending on the command, the wiper may (or may not) be saved to non-volatile memeory (EEPROM). Forcing the CS pin to V IHH enables the high-voltage serial commands. These commands can increment and decrement the wiper and enable or disable the WiperLock technology. The wiper is saved to non-volatile memory (EEPROM). The CS pin has an internal pull-up resistor. The resistor will become disabled when the voltage on the CS pin is below the V IH level. This means that when the CS pin is floating, the CS pin will be pulled to the V IH level (serial communication (the pin) is ignored). And when the CS pin is driven low (V IL ), the resistance becomes very large to reduce the device current consumption when serial commands are occurring. See Figure 2-4 for additional information. 3.7 Increment/Decrement () The pin input is used to increment or decrement the wiper on the digital potentiometer. An increment moves the wiper one step toward terminal A, while a decrement moves the wiper one step toward terminal B. DS21945C-page 24 25 Microchip Technology Inc.

4. GENERAL OVERVIEW EQUATION 4-1: R S CALCULATION The MCP42X devices are general purpose digital potentiometers intended to be used in applications where a programmable resistance with moderate bandwidth is desired. Applications generally suited for the MCP42X devices include: Set point or offset trimming Sensor calibration Selectable gain and offset amplifier designs Cost-sensitive mechanical trim pot replacement The digital potentiometer is available in four nominal resistances (R AB ), where the nominal resistance is defined as the resistance between terminal A and terminal B. The four nominal resistances are 2.1 kω, 5kΩ, 1 kω and 5 kω. There are 63 resistors in a string between terminal A and terminal B. The wiper can be set to tap onto any of these 63 resistors thus providing 64 possible settings (including terminal A and terminal B). Figure 4-1 shows a block diagram for the resistive network of the device. Equation 4-1 shows the calculation for the step resistance, while Equation 4-2 illustrates the calculation used to determine the resistance between the wiper and terminal B. R S R S R S R S A B EQUATION 4-2: R WB CALCULATION 1 LSb is the ideal resistance difference between two successive codes. If we use N = 1 and R W = in Equation 4-2, we can calculate the step size for each increment or decrement command. The MCP421 device offers a voltage divider (potentiometer) with all terminals available on pins. The MCP422 is a true rheostat, with terminal A and the wiper (W) of the variable resistor available on pins. The MCP423 device offers a voltage divider (potentiometer) with terminal B connected to ground. The MCP424 device is a rheostat device with terminal A of the resistor floating, terminal B connected to ground, and the wiper (W) available on pin. The MCP421 can be externally configured to implement any of the MCP422, MCP423 or MCP424 configurations. 4.1 Serial Interface A 2-wire synchronous serial protocol is used to increment or decrement the digital potentiometers wiper terminal. The Increment/Decrement () protocol utilizes the CS and input pins. Both inputs are tolerant of signals up to 12.5V without damaging the device. The CS pin can differenciate between two high-voltage levels, V IH and V IHH. This enables additional commands without requiring additional input pins. The high-voltage commands (V IHH on the CS pin) are similar to the standard commands, except that they control (enable, disable,...) the state of the non-volatile WiperLock technolgy feature. The simple protocol uses the state of the pin at the falling edge of the CS pin to determine if Increment or Decrement mode is desired. Subsequent rising edges of the pin move the wiper. The wiper value will not underflow or overflow. The new wiper setting can be saved to EEPROM, if desired, by selecting the state of the pin during the rising edge of the CS pin. The non-volatile wiper enables the MCP421/2/3/4 to operate stand alone (without microcontroller control). FIGURE 4-1: Resistor Block Diagram. 25 Microchip Technology Inc. DS21945C-page 25

4.2 The WiperLock Technology The MCP421/2/3/4 devices WiperLock technology allows application-specific calibration settings to be secured in the EEPROM without requiring the use of an additional write-protect pin. The WiperLock technology prevents the serial commands from doing the following: Incrementing or decrementing the wiper setting Writing the wiper setting to the non-volatile memory Enabling and disabling the WiperLock technology feature requires high-voltage serial commands (CS =V IHH ). Incrementing and decrementing the wiper requires high-voltage commands when the feature is enabled. The high-voltage threshold (V IHH ) is intended to prevent the wiper setting from being altered by noise or intentional transitions on the and CS pins, while still providing flexibility for production or calibration environments. Both the CS and input pins are tolerant of signals up to 12V. This allows the flexibility to multiplex the digital pots control signals onto application signals for manufacturing/calibration. 4.3 Power-up When the device powers up, the last saved wiper setting is restored. While V DD < V min (2.7V), the electrical performance may not meet the data sheet specifications (see Figure 4-2). The wiper may be unknown or initialized to the value stored in the EEPROM. Also the device may be capable of incrementing, decrementing and writing to its EEPROM, if a valid command is detected on the CS and pins. The default settings of the MCP421/2/3/4 devices from the factory are shown in Table 4-1. TABLE 4-1: Package Code Default POR Wiper Setting DEFAULT FACTORY SETTINGS SELECTION It is good practice in your manufacturing flow to configure the device to your desired settings. 4.4 Brown Out Wiper Code WiperLock Technology Setting If the device V DD is below the specified minimum voltage, care must be taken to ensure that the CS and pins do not create any of the serial commands. When the device V DD drops below V min (2.7V), the electrical performance may not meet the data sheet specifications (see Figure 4-2). The wiper may be unknown or initialized to the value stored in the EEPROM. Also the device may be capable of incrementing, decrementing and writing to its EEPROM if a valid command is detected on the CS and pins. 4.5 Serial Interface Inactive Typical R AB Value -22 Mid-scale 1Fh Disabled 2.1 kω -52 Mid-scale 1Fh Disabled 5. kω -13 Mid-scale 1Fh Disabled 1. kω -53 Mid-scale 1Fh Disabled 5. kω The serial interface is inactive any time the CS pin is at V IH and all write cycles are completed. V DD 2.7V Outside Specified AC/DC Range EEPROM Write Protect V WP V SS FIGURE 4-2: Power-up and Brown-out. DS21945C-page 26 25 Microchip Technology Inc.

5. SERIAL INTERFACE 5.1 Overview The MCP421/2/3/4 utilizes a simple 2-wire interface to increment or decrement the digital potentiometers wiper terminal (W), store the wiper setting in non-volatile memory and turn the WiperLock technology feature on or off. This interface uses the Chip Select (CS) pin, while the pin is the Up/Down input. The Increment/Decrement protocol enables the device to move one step at a time through the range of possible resistance values. The wiper value is initialized with the value stored in the internal EEPROM upon power-up. A wiper value of h connects the wiper to terminal B. A wiper value of 3Fh connects the wiper to terminal A. Increment commands move the wiper toward terminal A, but will not increment to a value greater than 3Fh. Decrement commands move the wiper toward terminal B, but will not decrement below h. Refer to Section 1. Electrical Characteristics, AC/DC Electrical Characteristics table for detailed input threshold and timing specifications. Communication is unidirectional. Therefore, the value of the current wiper setting cannot be read out of the MCP42X device. 5.2 Serial Commands The MCP42X devices support 1 serial commands. The commands can be grouped into the following types: Serial Commands High-voltage Serial Commands All the commands are shown in Table 5-1. The command type is determined by the voltage level on the CS pin. The initial state that the CS pin must be driven is V IH. From V IH, the two levels that the CS pin can be driven are: V IL V IHH If the CS pin is driven from V IH to V IL, a serial command is selected. If the CS pin is driven from V IH to V IHH, a high-voltage serial command is selected. High-voltage serial commands control the state of the WiperLock technology. This is a unique feature, where the user can determine whether or not to lock or unlock the wiper state. High-voltage serial commands increment/decrement the wiper regardless of the status of the WiperLock technology. TABLE 5-1: COMMANDS Command Name Saves Wiper Value in EEPROM High Voltage on CS pin? After Command Wiper is locked / unlocked Works when Wiper is locked? Increment without Writing Wiper Setting to EEPROM unlocked Note 1 Increment with Writing Wiper Setting to EEPROM Yes unlocked Note 1 Decrement without Writing Wiper Setting to EEPROM unlocked Note 1 Decrement with Writing Wiper Setting to EEPROM Yes unlocked Note 1 Write Wiper Setting to EEPROM Yes unlocked Note 1 High-Voltage Increment and Disable WiperLock Technology Yes Yes unlocked Yes High-Voltage Increment and Enable WiperLock Technology Yes Yes locked Yes High-Voltage Decrement and Disable WiperLock Technology Yes Yes unlocked Yes High-Voltage Decrement and Enable WiperLock Technology Yes Yes locked Yes Write Wiper Setting to EEPROM and Disable WiperLock Yes Yes unlocked Yes Technology Write Wiper Setting to EEPROM and Enable WiperLock Technology Yes Yes locked Yes Note 1: This command will only complete if wiper is unlocked (WiperLock Technology is Disabled). 25 Microchip Technology Inc. DS21945C-page 27

5.2.1 INCREMENT WITHOUT WRITING WIPER SETTING TO EEPROM This mode is achieved by initializing the pin to a high state (V IH ) prior to achieving a low state (V IL ) on the CS pin. Subsequent rising edges of the pin increment the wiper setting toward terminal A. This is shown in Figure 5-1. After the wiper is incremented to the desired position, the CS pin should be forced to V IH to ensure that unexpected transitions (on the pin do not cause the wiper setting to increment. Driving the CS pin to V IH should occur as soon as possible (within device specifications) after the last desired increment occurs. The EEPROM value has not been updated to this new wiper value, so if the device voltage is lowered below the RAM retention voltage of the device, once the device returns to the operating range, the wiper will be loaded with the wiper setting in the EEPROM. After the CS pin is driven to V IH (from V IL ), any other serial command may immediately be entered. This is since an EEPROM write cycle (t wc ) is not active. Note: The wiper value will not overflow. That is, once the wiper value equals x3f, subsequent increment commands are ignored. V IH CS V IL V IL 1 2 3 4 5 6 V IH EEPROM X X X X X Wiper X X+1 X+2 X+3 X+4 WiperLock Technology Enable WiperLock Technology WiperLock Technology Disable Note: If WiperLock technology enabled, wiper will not move. FIGURE 5-1: Increment without Writing Wiper Setting to EEPROM. DS21945C-page 28 25 Microchip Technology Inc.

5.2.2 INCREMENT WITH WRITING WIPER SETTING TO EEPROM This mode is achieved by initializing the pin to a high state (V IH ) prior to achieving a low state (V IL ) on the CS pin. Subsequent rising edges of the pin increment the wiper setting toward terminal A. This is shown in Figure 5-2. After the wiper is incremented to the desired position, the pin should be driven low (V IL ). Then when the CS pin is forced to V IH, the wiper value is written to the EEPROM. Therefore, if the device voltage is lowered below the RAM retention voltage of the device, once the device returns to the operating range, the wiper will be loaded with this wiper setting (stored in the EEPROM). To ensure that unexpected transitions on the pin do not cause the wiper setting to increment, the pin should be driven low and the CS pin forced to V IH as soon as possible (within device specifications) after the last desired increment occurs. After the CS pin is driven to V IH (from V IL ), all other serial commands are ignored until the EEPROM write cycle (t wc ) completes. Note: The wiper value will not overflow. That is, once the wiper value equals x3f, subsequent increment commands are ignored. V IH V IH CS V IL t WC V IH 1 2 3 4 5 6 V IL EEPROM X X X X X X+4 Wiper X X+1 X+2 X+3 X+4 WiperLock Technology Enable WiperLock Technology WiperLock Technology Disable Note: If WiperLock technology enabled, wiper will not move. FIGURE 5-2: Increment with Writing Wiper Setting to EEPROM. 25 Microchip Technology Inc. DS21945C-page 29

5.2.3 DECREMENT WITHOUT WRITING WIPER SETTING TO EEPROM This mode is achieved by initializing the pin to a low state (V IL ) prior to achieving a low state (V IL ) on the CS pin. Subsequent rising edges of the pin will decrement the wiper setting toward terminal B. This is shown in Figure 5-3. After the wiper is decremented to the desired position, the pin should be forced low (V IL ) and the CS pin should be forced to V IH. This will ensure that unexpected transitions on the pin do not cause the wiper setting to decrement. Driving the CS pin to V IH should occur as soon as possible (within device specifications) after the last desired increment occurs. The EEPROM value has not been updated to this new wiper value, so, if the device voltage is lowered below the RAM retention voltage of the device, once the device returns to the operating range, the wiper will be loaded with the wiper setting in the EEPROM. After the CS pin is driven to V IH (from V IL ), any other serial command may immediately be entered, since an EEPROM write cycle (t WC ) is not started. Note: The wiper value will not underflow. That is, once the wiper value equals x, subsequent decrement commands are ignored. CS V IL V IH V IL 1 2 3 4 V IH 5 6 V IL EEPROM X X X X X Wiper X X-1 X-2 X-3 X-4 WiperLock Technology Enable WiperLock Technology WiperLock Technology Disable Note: If WiperLock technology enabled, wiper will not change. FIGURE 5-3: Decrement without Writing Wiper Setting to EEPROM. DS21945C-page 3 25 Microchip Technology Inc.

5.2.4 DECREMENT WITH WRITING WIPER SETTING TO EEPROM This mode is achieved by initializing the pin to a low state (V IL ) prior to achieving a low state (V IL ) on the CS pin. Subsequent rising edges of the pin decrement the wiper setting (toward terminal B). This is shown in Figure 5-4. After the wiper is decremented to the desired position, the pin should remain high (V IH ). Then when the CS pin is raised to V IH, the wiper value is written to the EEPROM. Therefore, if the device voltage is lowered below the RAM retention voltage of the device, once the device returns to the operating range, the wiper will be loaded with this wiper setting (stored in the EEPROM). To ensure that unexpected transitions on the pin do not cause the wiper setting to decrement, the pin should be driven low (V IL ) and the CS pin forced to V IH as soon as possible (within device specifications) after the last desired increment occurs. After the CS pin is driven to V IH (from V IL ), all other serial commands are ignored until the EEPROM write cycle (t WC ) completes. Note: The wiper value will not underflow. That is, once the wiper value equals x, subsequent decrement commands are ignored. V IH CS V IL t WC V IL 1 2 3 4 5 6 V IH EEPROM X X X X X X-4 Wiper X X-1 X-2 X-3 X-4 WiperLock Technology WiperLock Technology Enable WiperLock Technology Disable Note: If WiperLock technology enabled, wiper will not change. FIGURE 5-4: Decrement with Writing Wiper Setting to EEPROM. 25 Microchip Technology Inc. DS21945C-page 31

5.2.5 WRITE WIPER SETTING TO EEPROM To write the current wiper setting to EEPROM, force both the CS pin and pin to V IH. Then force the CS pin to V IL. Before there is a rising edge on the pin, force the CS pin to V IH. This causes the wiper setting value to be written to EEPROM. Note: After the pin is forced to V IL, each rising edge on the pin will cause the wiper to increment. This is the same command as the Increment with Writing Wiper Setting to EEPROM command, but the pin is held at V IL, so the wiper is not incremented. When the CS pin is forced to V IH, the wiper value is written to the EEPROM. Therefore, if the device voltage is lowered below the RAM retention voltage of the device, once the device returns to the operating range, the wiper will be loaded with this wiper setting (stored in the EEPROM). To ensure that unexpected transitions on the pin do not cause the wiper setting to increment, force the CS pin to V IH as soon as possible (within device specifications) after the pin is forced to V IL. After the CS pin is driven to V IH (from V IL ), all other serial commands are ignored until the EEPROM write cycle (t WC ) completes. V IH V IH CS V IL t WC V IH 5 6 V IL EEPROM X X+4 Wiper X+4 WiperLock Technology WiperLock Technology Enable WiperLock Technology Disable FIGURE 5-5: Write Wiper Setting to EEPROM. DS21945C-page 32 25 Microchip Technology Inc.

5.2.6 HIGH-VOLTAGE INCREMENT AND DISABLE WiperLock TECHNOLOGY This mode is achieved by initializing the pin to a high state (V IH ) prior to the CS pin being driven to V IHH. Subsequent rising edges of the pin increment the wiper setting toward terminal A. Set the pin to the high state (V IH ) prior to forcing the CS pin to V IH. This begins a write cycle and disables the WiperLock Technology feature (See Figure 5-6). After the CS pin is driven to V IH (from V IHH ), all other serial commands are ignored until the EEPROM write cycle (t WC ) completes. Note: The wiper value will not overflow. That is, once the wiper value equals x3f, subsequent increment commands are ignored. CS 1 2 EEPROM Wiper FIGURE 5-6: High-Voltage Increment and Disable WiperLock Technology. 25 Microchip Technology Inc. DS21945C-page 33

5.2.7 HIGH-VOLTAGE INCREMENT AND ENABLE WiperLock TECHNOLOGY This mode is achieved by initializing the pin to a high state (V IH ) prior to the CS pin being driven to V IHH. Subsequent rising edges of the pin increment the wiper setting toward terminal A. Set the pin to the low state (V IL ) prior to forcing the CS pin to V IH. This begins a write cycle and enables the WiperLock Technology feature (See Figure 5-7). After the CS pin is driven to V IH (from V IHH ), all other serial commands are ignored until the EEPROM write cycle (t WC ) completes. Note: The wiper value will not overflow. That is, once the wiper value equals x3f, subsequent increment commands are ignored. V IHH CS V IH V IH V IH V IL 1 2 3 4 t WC 5 6 V IL EEPROM X X X X X X+4 Wiper WiperLock Technology X X+1 X+2 X+3 X+4 WiperLock Technology Enable WiperLock Technology Disable FIGURE 5-7: High-Voltage Increment and Enable WiperLock Technology. DS21945C-page 34 25 Microchip Technology Inc.

5.2.8 HIGH-VOLTAGE DECREMENT AND DISABLE WiperLock TECHNOLOGY This mode is achieved by initializing the pin to a low state (V IL ) prior to the CS pin being driven to V IHH. Subsequent rising edges of the pin decrement the wiper setting toward terminal B. Set the pin to the low state (V IL ) prior to forcing the CS pin to V IH. This begins a write cycle and disables the WiperLock Technology feature (See Figure 5-8). After the CS pin is driven to V IH (from V IHH ), all other serial commands are ignored until the EEPROM write cycle (t WC ) completes. Note: The wiper value will not underflow. That is, once the wiper value equals x, subsequent decrement commands are ignored. V IHH CS V IH V IH V IL 1 2 3 4 t WC 5 6 V IH V IL EEPROM X X X X X X-4 Wiper WiperLock Technology X X-1 X-2 X-3 X-4 WiperLock Technology Enable WiperLock Technology Disable FIGURE 5-8: High-Voltage Decrement and Disable WiperLock Technology. 25 Microchip Technology Inc. DS21945C-page 35

5.2.9 HIGH-VOLTAGE DECREMENT AND ENABLE WiperLock TECHNOLOGY This mode is achieved by initializing the pin to the low state (V IL ) prior to driving the CS pin to V IHH. Subsequent rising edges of the pin decrement the wiper setting toward terminal B. Set the pin to a high state (V IH ) prior to forcing the CS pin to V IH. This begins a write cycle and enables the WiperLock Technology feature (See Figure 5-9). After the CS pin is driven to V IH (from V IHH ), all other serial commands are ignored until the EEPROM write cycle (t WC ) completes. Note: The wiper value will not underflow. That is, once the wiper value equals x, subsequent decrement commands are ignored. V IHH CS V IH V IH V IL 1 2 3 4 t WC V DD 5 6 V IH EEPROM X X X X X X-4 Wiper WiperLock Technology X X-1 X-2 X-3 X-4 WiperLock Technology Enable WiperLock Technology Disable FIGURE 5-9: High-Voltage Decrement and Enable WiperLock Technology. DS21945C-page 36 25 Microchip Technology Inc.

5.2.1 WRITE WIPER SETTING TO EEPROM AND DISABLE WiperLock TECHNOLOGY This mode is achieved by keeping the pin static (either at V IL or at V IH ), while the CS pin is driven from V IH to V IHH and then returned to V IH. When the falling edge of the CS pin occurs (from V IHH to V IH ), the wiper value is written to EEPROM and the WiperLock Technology is disabled (See Figure 5-1). To ensure that unexpected transitions on the pin do not cause the wiper setting to change, force the CS pin to V IH as soon as possible (within device specifications) after the CS pin is forced to V IHH. After the CS pin is driven to V IH (from V IHH ), all other serial commands are ignored until the EEPROM write cycle (t WC ) completes. V IHH CS V IH t WC V IH V IH V IL EEPROM X X+4 Wiper WiperLock Technology X+4 WiperLock Technology Enable WiperLock Technology Disable FIGURE 5-1: Write Wiper Setting to EEPROM and Disable WiperLock Technology. 25 Microchip Technology Inc. DS21945C-page 37

5.2.11 WRITE WIPER SETTING TO EEPROM AND ENABLE WiperLock TECHNOLOGY This mode is achieved by initializing the and CS pins to a high state (V IH ) prior to the CS pin being driven to V IHH (from V IH ). Set the pin to a low state (V IL ) prior to forcing the CS pin to V IH (from V IHH ). This begins a write cycle and enables the WiperLock Technology feature (See Figure 5-11). To ensure that unexpected transitions on the pin do not cause the wiper setting to increment, force the CS pin to V IH as soon as possible (within device specifications) after the pin is forced to V IL. After the CS pin is driven to V IH (from V IHH ), all other serial commands are ignored until the EEPROM write cycle (t WC ) completes. V IHH CS V IH V IH t WC V IH V IL EEPROM X X+4 Wiper WiperLock Technology X+4 WiperLock Technology Enable WiperLock Technology Disable FIGURE 5-11: Write Wiper Setting to EEPROM and Enable WiperLock Technology. DS21945C-page 38 25 Microchip Technology Inc.

5.3 CS High Voltage Depending on the requirements of the system, the use of high voltage (V IHH ) on the CS pin, may or may not be required during system operation. Table 5-2 shows possible system applications, and whether a high voltage (V IHH ) is required on the system. The MCP42X supports six high-voltage commands (the CS input voltage must meet the VIHH specification). TABLE 5-2: HIGH-VOLTAGE APPLICATIONS System Operation Production calibration only - system should not update wiper setting WiperLock Technogy disabled during system operation Wiper setting can be updated and locked during system operation High Voltage From Calibration Unit Not Required Required 5.3.1 TECHNIQUES TO FORCE THE CS PIN TO V IHH The circuit in Figure 5-12 shows a method using the TC124A doubling charge pump. When the SHDN pin is high, the TC124A is off, and the level on the CS pin is controlled by the PICmicrofi microcontrollers (MCUs) IO2 pin. When the SHDN pin is low, the TC124A is on and the V OUT voltage is 2 * V DD. The resistor R 1 allows the CS pin to go higher than the voltage such that the PICmicro MCUs IO2 pin clamps at approximately VDD. The circuit in Figure 5-13 shows the method used on the MCP42X Non-volatile Digital Potentiometer Evaluation Board. This method requires that the system voltage be approximately 5V. This ensures that when the PIC1F26 enters a brown-out condition, there is an insufficent voltage level on the CS pin to change the stored value of the wiper. The MCP42X Non-volatile Digital Potentiometer Evaluation Board Users Guide (DS51546) contains a complete schematic. GP is a general purpose I/O pin, while GP2 can either be a general purpose I/O pin or it can output the internal clock. For the serial commands, configure the GP2 pin as an input (high impedence). The output state of the GP pin will determine the voltage on the CS pin (V IL or V IH ). For high-voltage serial commands, force the GP output pin to output a high level (V OH ) and configure the GP2 pin to output the internal clock. This will form a charge pump and increase the voltage on the CS pin (when the system voltage is approximately 5V). PIC1F26 GP GP2 C 1 FIGURE 5-13: MCP42X Non-volatile Digital Potentiometer Evaluation Board (MCP42XEV) implementation to generate the V IHH voltage. R 1 C 2 MCP42X CS PICmicro MCU IO1 TC124A V C+ IN SHDN C- V OUT C 1 IO2 R 1 CS MCP42X C 2 FIGURE 5-12: Using the TC124A to generate the V IHH voltage. 25 Microchip Technology Inc. DS21945C-page 39

6. RESISTOR Digital potentiometer applications can be divided into two categories: Rheostat configuration Potentiometer (or voltage divider) configuration Figure 6-1 shows a block diagram for the MCP42X resistors. R S R S R S A N = 63 N = 62 N = 61 R W (1) 3Fh R W (1) 3Eh R W (1) 3Dh W Step resistance (R S ) is the resistance from one tap setting to the next. This value will be dependent on the R AB value that has been selected. Table 6-1 shows the typical step resistances for each device. The total resistance of the device has minimal variation due to operating voltage (see Figure 2-6, Figure 2-17, Figure 2-27 or Figure 2-37). TABLE 6-1: TYPICAL STEP RESISTANCES Typical Resistance (Ω) Part Number Total (R AB ) Step (R S ) MCP42X-23E 21 33.33 MCP42X-53E 5 79.37 MCP42X-14E 1 158.73 MCP42X-54E 5 793.65 Terminal A and B, as well as the wiper W, do not have a polarity. These terminals can support both positive and negative current. R S N = 1 R W (1) 1h B Note 1: N = h R (1) W Analog Mux The wiper resistance is tap dependent. That is, each tap selection resistance has a small variation. This variation effects the smaller resistance devices (2.1 kω) more. FIGURE 6-1: Resistor Block Diagram. DS21945C-page 4 25 Microchip Technology Inc.