Research on a Compound Control Strategy of Three-Phase

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Reserch on Compound Control Strtegy of ThreePhse Inverter for Unblnced Lods Gili Yue, Wen Li, Ken Li College of Electricl nd Control Engineering, Xi n University of Science nd Technology, Xi n 7143, Chin Abstrct: To solve the problem of unblnced output voltge of inverter under threephse unblnced lod. In this pper, the min circuit topology using threephse threewire inverter topology. Estblished the mthemticl model in severl different coordinte system of the threephse inverter. A compound control method is proposed by combining voltge current dul loop control method nd repetitive control method, The control method is relized in three phse 4 Hz inverter, nd cn meet the demnd of unblnced lod to inverter, the relibility of the inverter circuit is improved. At the end of this pper, Mtlb simultion nlysis nd experimentl results re given, it is proved tht the composite control method designed in this pper hs strong bility of unblnced lod. 1 Introduction With tody's power electronics technology continues to dvnce nd rpid development in the petroleum, ship, communictions switches nd other fields, inverter power supply hs very wide rnge of pplictions[1]. More nd more pplictions require threephse inverters with very strong unblnced lod supply cpbility. Normlly under unblnced lod conditions, three phse inverter power supply cn produce unblnced output voltge[23]. Thus, the threephse inverter power supply cnnot be very good norml work. Therefore, it is of gret significnce to improve the nlysis nd reserch of unblnced lod cpcity of threephse inverter power supply. At present, mesures for correcting output voltge symmetry of three phse inverter under unblnced lod, the min circuit minly includes the following topologicl forms: threephse splitcpcitor inversion topology[4], threephse fourleg inverter topology[5], combined threephse inverter topology, insertion Δ / Y trnsformer topology[67]. But the four topologies hve their flws, The three phse splitting cpcitnce inverter topology requires lrge number of DC filter cpcitnce, nd there is problem of the cpcitor pressure, nd the utiliztion of DC voltge will be very low[8]. The threephse fourbridge rm contrvrint topology, under the condition of dding bridge rm, to some extent to chieve the effect of suppressing the output voltge imblnce, but lso mkes the control more complex, difficult to design prmeters. The combined threephse inverter topology is minly composed of three singlephse inverters which re independent of ech other. So the number of switches will be more use, incresing the difficulty of control[9]. Insert Δ/Y trnsformer topology structure nd control methods re reltively simple. However, the weight, volume nd cost of the inverter will be incresed, nd it is not suitble for use in high power pplictions [1]. The symmetricl output voltge of three phse inverter under unblnced lod is discussed in this pper, estblished nd nlyzed the mthemticl model of threephse three wire inverter. A composite control Corresponding uthor:71737995@qq.com The Authors, published by EDP Sciences. This is n open ccess rticle distributed under the terms of the Cretive Commons Attribution License 4. (http://cretivecommons.org/licenses/by/4./).

method is proposed, minly combined with the repeted control nd doubleloop control of these two control methods. The improvement of the control method is relized, nd the unblnced lod cpcity of the inverter is obviously improved [11]. Simultion studies show tht, the inverter opertes normlly under vrious lods nd cn output very symmetricl voltges. 2 Mthemticl model of threephse inverter As shown in Figure 1, the three phse threewire inverter topology is composed of cpcitnce C, threephse filter inductnce L nd threephse inverter bridge, r is equivlent impednce nd loss. The output voltge of the inverter is U AB, U BC, U CA, the cpcitnce voltge is uu b, uu bc, uu c,the inductor current isi A, i B, i C, the lod current is ii, ii bb, ii cc. VT1 VT2 A VT3 VT4 B VT5 VT6 C r L C Fig. 1. Three phse inverter min circuit topology digrm The inductnce current nd cpcitnce voltge re treted s stte quntity, cn get the following eqution of stte: 3LL ddii AA = uu uu cccc 3rrrr AA 2UU AA UU BB UU CC 3LL ddii BB = uu bbbb uu 3rrrr BB 2UU BB UU AA UU CC (1) 3LL ddii CC = uu cccc uu bbbb 3rrrr CC 2UU CC UU AA UU BB 3CC dduu 3CC dduu bb = ii AA ii = ii BB ii bb 3CC dduu cc = ii CC ii cc Formul 1 nd Formul 2 re trnsformed by CLARK s follows: b c l o d (2) CC dduu αα = ii αα II αα CC dduu ββ = ii ββ II ββ LL ddii αα = UU αα uu αα rrrr αα LL ddii ββ = UU ββ uu ββ rrrr ββ (3) (4) The CLARK trnsform cn be used to derive the mthemticl model of the threephse inverter in the sttionry coordinte system, then type 3 nd 4 through the Prk trnsformtion, vilble: dd CC = 1 ii 3 dd 1 II 3 dd ωωωωωω qq CC dduu qq = 1 ii 3 qq 1 II ( ) 3 qq ωωωωωω dd dd LL = UU dd uu dd rrrr dd ωωωω qq LL ddii qq = UU (6) qq uu qq rrrr qq ωωωω dd The mthemticl model of the threephse inverter in the dq rotting coordinte system is obtined. The following vector digrm cn be obtined by converting the threephse still bc coordinte system into two phserotting dq coordinte systems. b c q U ωt d θ ωt U Fig. 2. bc coordinte system to dq coordinte system trnsformtion If the output voltge is set s follows: uu = UU mm cos ωωωω uu bb = UU mm cos( ωωωω 2 ππ) 3 (7) uu cc = UU mm cos( ωωωω 2 ππ) 3 The inverter's threephse output voltge is converted to twophse rottion dq coordinte system: uu [ uu bb uu ] = CC PPPPPPPP. CC CCCCCCCCCC. [ uu bb ] = [ UU mm] (8) qq uu cc In formul 8, CC CCCCCCCCCC nd CC PPPPPPPP re CLARK trnsform mtrices nd PARK trnsform mtrices 2

CC CCCCCCCCCC = 2 1/2 1/2 [1 3 3/2 3/2 ] (9) cos θθ sin θθ CC PPPPPPPP = [ sin θθ cos θθ ] (1) The mthemticl model of the threephse inverter cn be seen from ech of the bove coordinte systems, in the threephse sttionry coordinte system nd the dq rotting coordinte system, there is coupling phenomenon between the inverters, but there is no coupling reltion in lph bet coordinte system. The inverter outputs threephse voltge to the rotting coordinte system, the stright xis component is the phse voltge pek, the component of the cross xis is zero, thus there is only the DC component. 3 Inverter control system design When the threephse inverter is operting in nonliner lod nd unblnced lod,the output voltge hs periodic disturbnces, nd use of repetitive control methods to suppress this disturbnce. And in order to improve the dynmic response of the system, compound control lgorithm with repetitive control nd voltge nd current double loop control is dopted. Figure 3 is system block digrm of composite control. αβ Shft reference voltge dq Shft reference voltge Repetitive control Voltge, current double loop PI control dq Shft voltge αβ Shft voltge Prk inverse trnsformtion dq shft current S V P W M CLARKK&PARK Trnsform CLARK Trnsform Inverter Threephse current Three phse voltge Three phse voltge response is chieved. The voltge outer ring controller cn mintin stble output voltge. For the coupling of inverter, feedforwrd decoupling control method is dopted to decouple voltge current. The PI regultor is used to control the current inner loop. The current control eqution is: uu dd = (KK PPPP KK IIII s ) (ii dd ii dd ) uu dd ωωωωωω qq uu qq = (KK PPPP KK IIII s ) (ii qq ii qq ) uu qq ωωωωωω dd The voltge control eqution is: ii dd = 3 (KK PPPP KK IIII s ) (uu dd uu dd ) ii dd 3ωωωωωω qq ii qq = 3 (KK PPPP KK IIII s ) (uu qq uu qq ) ii qq 3ωωωωωω qq (11) (12) In the formul, the KK PPPP is the PI regultor nd the KK PPPP is the integrl fctor of the PI regultor. The ii dd nd ii qq re reference currents for the inner loop of the current. Controlled by current control eqution 11 nd voltge control eqution 12, vilble: uu dd = 1 CCCC [(KK PPPP KK IIII s ) (uu dd uu dd )] uu qq = 1 CCCC [(KK PPPP KK IIII s ) (uu qq uu qq )] ii dd = 1 LLLL [(KK PPPP KK IIII s ) (ii dd ii dd ) rrrr dd ] ii qq = 1 LLLL [(KK PPPP KK IIII s ) (ii qq ii qq ) rrrr qq ] (13) It cn be seen by eqution 13 tht fter decoupling control, the decoupling of voltge nd current is completed. Figure 4 is the block digrm of d xis current closed loop control. Fig. 3. Composite control system digrm 3.1 Design of Closed loop Controller for Voltge nd Current The double closedloop controller consists minly of two prts, one prt is the current inner loop controller, nd the other prt is the voltge outer ring controller. Among them, the current loop controller cn mke the inverter fst trcking the ctul output current, thus, quick Fig. 4. Dxis current closedloop control block digrm In figure 4, the Ts is the current smpling period (switching cycle of the inverter). The L is the filter inductnce, the KK PPPPPP is the modultion rtio of the inverter, nd the r is the equivlent impednce, the GG PPPP (s) is the trnsfer function. 3

The inverter is under the control of the current loop, in stedystte opertion, ii qq is equl to zero, nd the chnge of ii dd in dynmic process is very smll. And before the big chnge in the DC voltge, ii qq hs completed its trnsient process to zero, therefore. Trnsfer function of loop closed loop: CC(ss) = 1 TT iiii 1 (14) Formul of TT iiii =L/KK pppp KK PPPPPP, the voltge loop control block digrm cn be drwn from the bove nlysis, s shown in figure 5 Fig. 5. Voltge loop control block digrm It cn be seen from the formul 14 tht there is no coupling between the voltge nd current on the dq xis, so the control block digrm of the decoupling system is s follows. in the estblishment of internl model. Figure 7() is block digrm of n idel structure, which is equivlent to n integrl of step size with certin cycles, so tht given signl is trcked. If the repet control system is stble,the constrint is 1 P < 1. However, it is difficult for the system to stisfy this constrint during the opertion of the idel internl mode. Therefore, internl model structure should be improved. As shown in Figure 7(b), in the feedbck loop, the uxiliry compenstor 1 zz NN is replced by Q(z) to ensure the stbility of the system. R E 1 1P Fig. 7 (). the idel structure block digrm Q(z) Fig. 7 (b). Improved internl model block digrm PI PI PI PI Fig. 6. Control digrm of the decoupling system SPWM modulted inverter GG(zz) = UU (zz) EE(zz) = 1 (15) 1 QQ(zz)zz NN The N is the fundmentl period smpling number, nd the Q(z) is lowpss filter constnt, or function, to enhnce system stbility, this pper tkes.95 nd z N s the periodic dely link, the E(z) is the input nd output error, the UU ii (z) is the internl model output. In the improved internl model structure, the uxiliry compenstor S(z) nd the periodic dely link ZZ NN. The complete repet controller is constructed, s shown in figure 8. 3.2 Repetitive controller design Repetitive control in inverters hs wide rnge of pplictions. The min control method of the system is bsed on the principle of system internl mode, it is to dd n "internl model" tht cn better describe the chrcteristics of the system under the control system. Therefore, the control ccurcy cn be improved by solving the trcking of the controlled signl. So the core of the repetitive control system is the internl model, the performnce of repetitive control lies e (z) Q(z) (z) P (z) Fig. 8. Repetitive control system block digrm The P(z) is the control object, r is the reference sinusoidl input signl, nd Z N is the periodic dely link, to chieve the dely control, d is the interference signl. But If the object P(z) hs zero outside the unit (z) 4

circle, the compenstor is S=P 1 there will be pole outside the unit circle. Therefore, the compenstor is unstble t this time, resulting in instbility of the repetitive control system. For this problem, the form of compenstor is improved, the modified form is shown in eqution 16, in dvnce, compensting for the phse of internl mode output signl, nd then in series with lowpss filter, this mkes up highly stble controller. SS(zz) = KK rr. zz kk. SS (zz) (16) In the formul, Kr is the compenstor gin to djust the output mplitude, generlly < Kr < 1, the min function is to compenste filter phse, S (z) for low pss filter, To eliminte the high resonnce pek of P(z). 4 Simultion nlysis The threephse inverter power supply model built in this pper is simulted on the MATLAB/Simulink simultion softwre. Min prmeters of the system: DC input voltge UU ii =2V, filter cpcitorcc ff =4.7μF, RR ff =.7Ω, filter inductnce L=11.25mH, filter inductnce internl resistnce R=2mΩ, rted output frequency f = 4HZ, switching frequency is 1KHz. Figure 9() is threephse inverter under the compound control mode, A, B, C threephse lod in which two phses for the rted lod, nd the output voltge simultion wveform of one phse is empty. In order to contrst, in this pper, the simultion wveforms of one phse nolod voltge in the trditionl double loop control mode re shown in Figure 9(b). It is obvious tht the compound control in one phse nolod of the sitution does not hve big impct on the output, the blnce of output voltge of inverter is obviously better nd distortion is smll. Uz Uzb Uzc/V 2 1 1 2.2.25.3.35.4.45.5 Fig. 9 (). Voltge simultion wveforms of compound control in one phse nolod opertion Uz Uzb Uzc/V 2 1 1 2.9.92.94.96.98.1.12.14.16.18.11 Fig. 9 (b). Double loop control voltge simultion wveform t one phse nolod opertion Figure 1 shows the cse of lod muttions, in the process of system two phse lod opertion, In.1s when the sudden increse in one lod when the composite control system nd dulloop control system voltge nd current output of the simultion wveform. It is possible to see tht the voltge wveform of the composite control system hs not chnged much before nd fter.1s. Tht is, the composite control system in the bsence of one phse lod still mintin the output voltge blnce. The voltge output wveform under the double loop control system is shown in figure (b), there ws severe voltge imblnce before.1 s, nd the blnce ws restored fter.1 s. It cn be seen tht the output wveform of the composite control system is better. Uz Uzb Uzc/V 2 1 1 2.9.92.94.96.98.1.12.14.16.18.11 Fig. 1 (). Composite control sudden plus one phse lod voltge wveform Uz Uzb Uzc/V 2 1 1 2.9.92.94.96.98.1.12.14.16.18.11 Fig. 1 (b). Double loop control sudden plus one phse lod voltge wveform 5

iz izb izc/a 6 4 2 2 4 6.9.92.94.96.98.1.12.14.16.18.11 Fig. 1. (c) Compound controls sudden plus one phse lod current wveform 5 Conclusion In this pper, the mthemticl model of threephse three wire inverter is constructed, fter nlyzing nd designing two kinds of inverter control methods, repetitive control nd doubleloop control, composite control method combining them is proposed. And through MATLAB/Simulink simultion test verifiction, comprison of severl simultion wveforms, it cn be concluded tht the dul loop control is much better thn the compound control in suppressing the output voltge distortion due to unblnced lods. The threephse 4Hz inverter cn mintin the voltge blnce better under the compound control. And the system hs fst response speed, esy to control nd fst response, nd the structure of the control method is reltively simple. Reference 1. Li Cui. Control system nlysis of single phse 4Hz inverter power supply [D]. Wuhn: Wuhn University of Science nd Technology,215. 2. SUN Chi,MA Weiming,LU Junyong. Anlysis of the unsymmetricl output voltges distortion mechnism of threephse inverternd its correction [J] Proceedings of the CSEE,26,26 ( 21 ) :57 64. 3. Co Tiqing,Qi Qing,Wng Jun.Study on unblnced lod of threephse inverter[j].electric Mchines nd Control, 212, 16(4) : 555(in Chinese). 4. Jeong C Y,Cho J G, Kng Y,et l.a 1k VA power conditioner for threephse fourwire emergency genertors[c].ieee PESC 98,Fukuok, Jpn,1998. 5. Sun Chi,Lu Junyong,M Weiming. A novel control method forthreephse Fourleg Invert [ J ]. Trnsction of Chin Electrotechnicl Society,27 22( 2) : 5763. 6. Uffe Borup Jensen, Prsd N Enjeti, Frede Blbjerg.A new spce vector bsed control method for ups systems powering nonliner nd unblnced lods[j].ieee Trns on IA.21,37(6): 1864187. 7. Kong Xuejun, Wng Jingjing. Wveform Control Technology of Three phse Voltge Source Inverter Bsed on Internl Model Principle [J] Chinese Journl of Electricl Engineering, 23, 23(7):677. 8. Kukrer O, Komurcugil H, Dognlp A. A threelevel hysteresis function pproch to the slidingmode control of singlephse UPS inverters[j].ieee Trns on Industril Electronics, 29,56(9):34773486.. 9. Chen Dolin, Li Xun, Zhng Rong. Reserch on Combined Three phse High Frequency Pulse DC Link Inverter [J]. Chinese Journl of Electricl Engineering, 25, 25(8): 7579. 1. Ilvrsi V,Rjn C C A.qulity improvement in grid connected system using four leg VSI[C]//Advnces in Engineering,Science nd Mngement.Tmil Ndu,Indi:ICAESM,212: 54546. 11. Zheng Zhiyo, Sun Qinpei, Wng Jingbo. Synchronous control method of combined three phse inverter [J]. Journl of Agriculturl Engineering,215,31(5): 146151. 6