TB6674G TOSIBA BiCD Integrted Circuit Silicon Monolithic TB6674G Stepping Motor Driver IC TB6674G is stepping motor driver IC with MOS output trnsistors. The IC cn control two-phse stepping motor forwrd nd reverse by bipolr driving. A power-sving circuit nd stndby circuit re included. etures SOP16-P-300-1.00 One-chip two-phse bipolr stepping motor driver (including two bridge drivers) Power sving opertion is vilble. Weight: 0.50 g (typ.) Stndby opertion is vilble. Current consumption 20 μa (typ.) Built-in punch-through current restriction circuit for system relibility nd noise suppression. TT-comptible inputs IN A, IN B, PS, nd VS2B terminls ON resistnce PS = : 2.9 Ω (Typ.) PS = : 7.9 Ω (Typ.) igh driving bility. : IO (START) 350 ma (MAX) : VS1 ENABE : IO (OD) 100 ma (MAX) : VS2 ENABE Typicl PKG SOP16 pin GND terminl = EAT SINK Over current shutdown circuit (ISD). Therml shutdown circuit (TSD). Under voltge lockout circuit (UVO). Pull-down resistnce for input terminl (250 kω). 1
TB6674G Block Digrm VS1A VS2A VCC VS2B VS1B 16 1 3 8 9 ΦA ΦA 15 14 (A-ch) Control logic nd Bridge driver (B-ch) Control logic nd Bridge driver 10 11 ΦB ΦB IN A 4 5 IN B 6 PS in GND Note: TB6674G: Terminls 2, 7, 12, nd 13 re NC. TB6674G: The het fin is connected to GND. Pin Description Pin No. Symbol unctionl Description 1 V S2A ow-voltge power supply terminl 3 V CC Power voltge supply terminl for control 4 IN A A-ch forwrd rottion / reverse rottion signl input terminl, Truth Tble 1 GND GND terminl (ogic GND) GND GND terminl (ogic GND) 5 IN B B-ch forwrd rottion / reverse rottion signl input terminl, Truth Tble 1 6 PS Power sving signl input terminl 8 V S2B Stndby signl input terminl, Truth Tble 2 9 V S1B igh-voltge power supply terminl 10 ΦB Output B 11 ΦB Output B GND GND terminl (Power GND) GND GND terminl (Power GND) 14 ΦA Output Α 15 ΦA Output A 16 V S1A igh-voltge power supply terminl. 2
TB6674G Truth Tble 1. Input Output PS IN Φ Φ Mode ENABE V S1 ENABE V S1 ENABE V S2 (Power sving) ENABE V S2 (Power sving) Truth Tble 2. V S2B Mode POWER O (Stndby mode) OPERATION Note: Apply 5 V to V S2A s supply terminl. <Terminl circuit> Input terminl (IN A, IN B, PS, nd V S2B ) Vcc 15 kω 250 kω The digrm is prtly-provided nd omitted or simplified for explntory purposes. 3
TB6674G Absolute Mximum Rtings (T = 25 C) Chrcteristic Symbol Rting Unit V CC 6.0 Supply voltge V S1 24.0 V Output current V S2 Up to V CC I O (PEAK) ±400 I O (START) ±350 I O (OD) ±100 Input voltge V IN Up to V CC V Power dissiption Operting temperture P D 0.9 (Note 1) 1.4 (Note 2) ma T opr -30 to 75 C Storge temperture T stg -55 to 150 C W Note 1: IC only Note 2: This vlue is obtined if mounting is on 60 mm 30 mm 1.6 mm PCB, 50 % or more of which is occupied by copper. Operting Conditions (T = 25 C) Chrcteristic Symbol Min Typ. Mx Unit V CC 4.5-5.5 Supply voltge V S1 8.0-22.0 V S2A 2.7-5.5 V Output current I O - - ±350 ma Input voltge V IN 0 - V CC V Mximum frequency of input pulse f IN - - 25 kz Minimum resolution of input pulse tw 20 - - μs Vlue of ON resistnce tends to increse when the difference between V S1 nd V S2A becomes 5 V or less. 4
TB6674G Electricl Chrcteristics (Unless otherwise specified, T = 25 C, V CC = 5 V, V S1 = 12 V, nd V S2A = 5 V) Supply current Chrcteristic Symbol I CC1 Test Cir cuit Test Condition Min Typ. Mx Unit PS:, V S2B : 3 5 I CC2 1 PS:, V S2B : 3 5 ma I CC3 V S2B : 1 20 μa Input voltge igh V IN 2.0 Vcc ow V IN IN A, IN B, PS, V S2B - 0.2 0.8 V Input hysteresis voltge* V INhys 1 90 mv Input current Output ON resistnce Diode forwrd voltge Dely time I IN () 1 IN A, IN B, PS, Vs2B V IN = 5.0 V 5 20 38 μa Built in pull-down resistnce. I IN () V IN = 0 V 1 μa R on 1 2 PS:, V S2B : I OUT = 400 ma 2 5 R on 2 3 PS:, V S2B : I OUT = 100 ma 7 16 R on 2 V S2B : I OUT = 400 ma 0.9 3.5 V U 4 I = 350 ma, PS = 1.2 2.5 V 1.0 2.2 t p 0.5 t p IN Φ 0.5 Therml shutdown circuit* TSD (Design trget only) 160 C TSD hysteresis * TSDhys (Design trget only) 20 C Ω V μs *: Toshib does not implement testing before shipping. 5
TB6674G Under voltge ockout Circuit (UVO) An under voltge lockout circuit is included. Outputs re turned off (i-z) under the conditions s follows; VCC 4.0 V (Design trget) or VS1A 6.0 V (Design trget) nd VS1B 6.0 V (Design trget) or VS2A 2.2 V (Design trget) The UVO circuit hs hysteresis nd the function recovers under the conditions s follows; VCC = 4.1 V (Design trget), VS1A/ VS1B = 6.5 V (Design trget), VS2A = 2.3 V (Design trget) <UVO opertion> Vcc voltge 4.1 V (design trget only) 4.0 V (design trget only) UVO opertion UVO internl signl Output pin Norml opertion O (i-z) <UVO opertion> V S1A, V S1B voltge 6.5 V (design trget only) 6.0 V (design trget only) UVO opertion UVO internl signl Output pin Norml opertion O (i-z) 6
TB6674G <UVO opertion> V S2A voltge 2.3 V (design trget only) 2.2 V (design trget only) UVO opertion UVO internl signl Output pin Norml opertion O (i-z) 7
Over Current Protection (ISD) Circuit TB6674G The IC hs the over current protection circuit tht monitors the current flowing through ech output power trnsistor. If current, which is out of the detecting current, is sensed t ny one of these trnsistors, ll output trnsistors re turned off (i-z). (owever, ISD is not included in upper PchDMOS when PS is high level (VS2A is 5 V usge) becuse ON resistnce is lrge. Msking time is 20 μs. The opertion does not recover utomticlly (ltch method). There re two recovery methods written below. (1) Power monitor turns on when ny of the power supply decreses nd reches the specified voltge. (2) VS2B is set low level for 20 μs or more nd then set high. The opertion recovers in 10 μs. Reference design trget of detecting current is s follows; PS =, VS1A (12 V) :PchDMOS = 1.1 A PS = /PS = in common :ower NchDMOS = 1.4 A Plese reduce the externl noise to prevent mlfunction for ISD. <ISD opertion> ISD detecting vlue Output current 0 20 μs (Design trget) O time ISD internl signl 20 μs 10 μs (Design trget) (Design trget) V S2B Opertion recovers by one of two cses. Power monitoring: ON UVO (Power monitor) Power monitoring: O Power monitoring: ON Output terminl Norml opertion O (i-z) 8
Therml Shutdown Circuit (TSD) TB6674G The TB6674G hs therml shutdown circuit. If the junction temperture (Tj) exceeds 160 C (design trget only), ll the outputs re tuned off (i-z). It recovers utomticlly t 140 C. It hs hysteresis width of 20 C. TSD = 160 C (design trget only) < TSD opertion > Chip temperture 160 C (typ.) 140 C (typ.) TSD opertion Internl TSD signl Output terminl Norml opertion O (i-z) 9
TB6674G Test Circuit 1. I CC1, I CC2, I CC3, I IN A, I IN B, nd I PS Mesuring method 1 16 Item SW 1 SW 2 SW 3 SW 4 3 4 5 TB6674PG,/G/AG TB6674G 15 14 11 I CC1 b b I CC2 b b b I CC3 b b b I IN A I IN B I PS 6 10 8 9 All terminls of IN A, IN B, nd PS should output low or be connected to the ground terminl in mesuring I CC3. 10
TB6674G Test Circuit 2. Ron 11, Ron 12, Ron 2, nd Ron 3 1 3 16 15 4 5 6 TB6674PG,/G/AG TB6674G 14 11 10 8 9 *: Adjust R to correspond to I. Item SW 1 SW 2 SW 3 SW 4 SW 5 I (ma) V SAT 11 V SAT 12 V SAT 2 V SAT 3 b b b d b c b b b d b c b b c b d b b b c b d 100 400 b 100 b 400 11
TB6674G Test Circuit 3. Ron 21, Ron 22, nd Ron 1 1 3 16 15 4 5 6 TB6674PG,/G/AG TB6674G 14 11 10 8 9 *: Adjust R to correspond to I. Item SW 1 SW 2 SW 3 SW 4 SW 5 I (ma) V SAT 21 V SAT 22 V SAT 1 b b c b d b b c b d b b c b d 20 100 b 20 12
TB6674G Test Circuit 4. V U, nd V Mesuring Method 1 3 4 5 6 TB6674PG,/G/AG TB6674G 16 15 14 11 10 Item SW 1 SW 2 V U b e c d V e b c d 8 9 Timing Chrt (two-phse excittion) tp : 0.5μs(typ.) tp : 0.5μs(typ.) 13
TB6674G Therml Performnce Chrcteristics TB6674G Therml resistnce Mounting on PCB of 60 mm x 30 mm x1.5 mm, 50% or more of which is occupied by copper No het sink Power Dissiption Ambient Temperture Appliction Circuit 4 5 6 8 9 16 1 3 15 14 TB6674G 10 11 Note 1: Connect the V S2A terminl to the lower supply voltge (5 V). Note 2: Supply smoothing cpcitor* should be connected between ech supply terminl (V CC, V S2A, nd V S1A/B ) nd GND terminl. *: (Ex.): Cpcitors of tens of μ nd 0.1 μ which re connected in prllel. Note 3: Utmost cre is necessry in the design of the output, V CC, V S1A/B, nd GND lines since the IC my be destroyed by short-circuiting between outputs, ir contmintion fults, or fults due to improper grounding, or by short-circuiting between contiguous terminls. Note 4: By our short-circuited exmintion of neighboring terminls, when 9 nd 10 terminls or 15 nd 16 terminls re short-circuited, the TB6674G might to be destroyed nd cuse the trouble of smoking etc. Plese use n pproprite fuse to the power supply line. Note 5: Connect V S1A terminl nd V S1B terminl externlly. Note 6: Connect ech GND terminl externlly. 14
TB6674G Pckge Dimensions SOP16-P-300-1.00 Unit: mm Weight: 0.50 g (Typ.) 15
TB6674G Notes on Contents 1. Block Digrms Some of the functionl blocks, circuits, or constnts in the block digrm my be omitted or simplified for explntory purposes. 2. Equivlent Circuits The equivlent circuit digrms my be simplified or some prts of them my be omitted for explntory purposes. 3. Timing Chrts Timing chrts my be simplified for explntory purposes. 4. Appliction Circuits The ppliction circuits shown in this document re provided for reference purposes only. Thorough evlution is required, especilly t the mss production design stge. Toshib does not grnt ny license to ny industril property rights by providing these exmples of ppliction circuits. 5. Test Circuits Components in the test circuits re used only to obtin nd confirm the device chrcteristics. These components nd circuits re not gurnteed to prevent mlfunction or filure from occurring in the ppliction equipment. IC Usge Considertions Notes on hndling of ICs [1] The bsolute mximum rtings of semiconductor device re set of rtings tht must not be exceeded, even for moment. Do not exceed ny of these rtings. Exceeding the rting(s) my cuse the device brekdown, dmge or deteriortion, nd my result injury by explosion or combustion. [2] Use n pproprite power supply fuse to ensure tht lrge current does not continuously flow in cse of over current nd/or IC filure. The IC will fully brek down when used under conditions tht exceed its bsolute mximum rtings, when the wiring is routed improperly or when n bnorml pulse noise occurs from the wiring or lod, cusing lrge current to continuously flow nd the brekdown cn led smoke or ignition. To minimize the effects of the flow of lrge current in cse of brekdown, pproprite settings, such s fuse cpcity, fusing time nd insertion circuit loction, re required. [3] If your design includes n inductive lod such s motor coil, incorporte protection circuit into the design to prevent device mlfunction or brekdown cused by the current resulting from the inrush current t power ON or the negtive current resulting from the bck electromotive force t power O. IC brekdown my cuse injury, smoke or ignition. Use stble power supply with ICs with built-in protection functions. If the power supply is unstble, the protection function my not operte, cusing IC brekdown. IC brekdown my cuse injury, smoke or ignition. [4] Do not insert devices in the wrong orienttion or incorrectly. Mke sure tht the positive nd negtive terminls of power supplies re connected properly. Otherwise, the current or power consumption my exceed the bsolute mximum rting, nd exceeding the rting(s) my cuse the device brekdown, dmge or deteriortion, nd my result injury by explosion or combustion. In ddition, do not use ny device tht is pplied the current with inserting in the wrong orienttion or incorrectly even just one time. 16
TB6674G Points to remember on hndling of ICs (1) et Rdition Design In using n IC with lrge current flow such s power mp, regultor or driver, plese design the device so tht het is ppropritely rdited, not to exceed the specified junction temperture (Tj) t ny time nd condition. These ICs generte het even during norml use. An indequte IC het rdition design cn led to decrese in IC life, deteriortion of IC chrcteristics or IC brekdown. In ddition, plese design the device tking into considerte the effect of IC het rdition with peripherl components. (2) Bck-EM When motor rottes in the reverse direction, stops or slows down bruptly, current flow bck to the motor s power supply due to the effect of bck-em. If the current sink cpbility of the power supply is smll, the device s motor power supply nd output terminls might be exposed to conditions beyond bsolute mximum rtings. To void this problem, tke the effect of bck-em into considertion in system design. 17
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