1 Integrated diodes pn junctions of transistor structures can be used as integrated diodes. The choice of the junction is limited by the considerations of switching speed and breakdown voltage. The forward voltage drop only slightly depends on the forward current.
2 Integrated diode
3 Integrated capacitors Capacitors in ICs are fabricated by using either the depletion region capacitance of a reverse-biased pn junction, the MOS structure, or thin-film deposition. A typical diffused junction capacitor uses the capacitance of the base-collector junction. The capacitance of such a component is typically 100 pf/mm 2 with reverse voltage of around 1 V. Capacitance depends on the applied reverse bias. The capacitor has an access resistance, associated with the built-in resistance of the epilayer between the active region of the capacitance and a contact. It is also possible to use the emitter-base junction to form an integrated capacitor. Its capacitance per unit area is around 1000 pf/mm 2. This increase is at the expense of a reduction in breakdown voltage, which limits operating voltages to less than 5 V.
4 Integrated capacitors An MOS capacitor is a parallelplate capacitor with SiO 2 (whose thickness is about 50 nm) as the dielectric. A surface thin film of metal (aluminium) is the top plate. The bottom plate consists of the heavily doped n + region. Because of the heavily doped bottom layer, MOS capacitors are nonpolarized capacitors. The upper plate can be the polysilicon layer used to obtain the gate regions of the MOS transistors. The capacitance of junction or MOS capacitors is quite small, typically less than 100 pf.
5 Integrated capacitors Planar capacitor "Trench" capacitor http://images.google.lt/imgres?imgurl=http://www.tf.unikiel.de/matwis/amat/elmat_en/kap_5/illustr/capacitor1.gif&imgrefurl=http://www.tf.unikiel.de/matwis/amat/elmat_en/kap_5/backbone/r5_1_4.html&h=160&w=480&sz=5&hl=lt&start=88&tbnid=yvk81rngiepojm:&tbnh= 43&tbnw=129&prev=/images%3Fq%3DIntegrated%2Bcapacitor%26start%3D80%26ndsp%3D20%26svnum%3D10%26hl%3Dlt%2 6sa%3DN
6 Integrated capacitors The deviation of capacitance of integrated capacitors is usually great (to 20 %). If permissible deviation is less, thin film capacitors are used. Silicon dioxide SiO 2 or aluminium oxide Al 2 O 3 can be used as a dielectric layer. The use of tantalum films can increase the capacitance per unit area by a factor of 10. A controlled growth of tantalum pentoxide (Ta 2 O 5 ) is used for the dielectric, and metallic tantalum is deposited for the top plate (since aluminium is soluble in Ta 2 O 5 ). The increased capacitance is obtained at the expense of additional processing steps.
7 Integrated capacitor
8 Integrated resistors Resistors in monolithic integrated circuits use the bulk resistivity of one of the transistor regions. The most common technique is to use the diffused or implanted p-type base region of the bipolar transistor. The n-type epitaxial layer (the collector region) serves to isolate the p-type resistor from other chip components. Actual sheet resistance for the base diffused layer is typically 100-250 Ω/. So, resistors in the range 50Ω-10 kω can be provided. The high-value resistors are often folded to conserve chip area.
9 Integrated transistor and resistor http://www.necel.com/en/faq/faq_opcomp12.gif
10 Integrated resistor
11 Integrated resistor
12 Integrated resistors A pinch-resistor, in which additional floating emitter diffusion is incorporated, can provide high resistance values. For low-value resistors the emitter n + layer, which has a sheet resistance typically in the range 1-10Ω/, can be used.
13 Integrated resistors The deviation of resistance of IC resistors is usually great (to 20 % when the base region is used, and to 50 % for pinch-resistors). Diffused resistors are all relatively extravagant in their use of chip area. For example, one 1 kω resistor might occupy the same area as 10 bipolar transistors. That is why integrated resistors tend to be omitted altogether if possible in modern ICs or replaced by the active resistance of a BJT. In MOS technology, polysilicon layer resistors and ion-implanted resistors are used. The third type of resistor is the MOS transistor itself. When biased in the ohmic region, the MOSFET behaves as a resistance. In addition, both enhancement and depletion MOSFETs are used as non-linear resistors in the saturation region. The technique of vapour thin-film deposition can also be used to fabricate resistors for integrated circuits. The ohmic value of a thin-film resistor may be trimmed by cutting away part of the resistor with a laser beam.
14 Some layers of conductors, isolated by crossover oxide are used in complex ICs. Multiple interconnect layers IBM photomicrograph (Si has been removed!) Metal 2 M1/M2 via Metal 1 Polysilicon Diffusion Mosfet (under polysilicon gate) 6.004 Fall 2001 9/13/01 L03 - CMOS Technology 14
15 Conductors Aluminium conductors are used to interconnect elements of ICs. But it is impossible to avoid crossovers of conductors. So, some layers of conductors, isolated by crossover oxide are used in complex ICs. The wiring required to interconnect transistors must scale at the same rate as the transistors in order to take advantage of improvements in size and speed. The industry is currently moving from aluminum to lower-resistance copper metallurgy, which can decrease both wiring resistance and capacitance. Research is also underway to move from silicon dioxide insulators between wiring levels to various low-dielectric-constant insulators, which can further decrease wiring capacitance.
16 The bridge-like cross Some crossovers can be avoided using bridge-like crosses. Such a bridge-like cross is a diffused resistor. Its resistance is 3-5 ohms. It is also important that an isolated island is needed for the bridge-like cross. This reduces the complexity factor of the IC.
17 The bridge-like cross
18 The bridge-like cross
19 Contact pads Individual processing of chips includes the connection of package leads to the contact pads of chips. Most contact pads are deposited on SiO 2 layer and isolated from the semiconductor substrate. But the thin dielectric layer can be easily damaged during the chip mounting (chip bonding). That causes the failure of the chip. Therefore isolated islands are used below the contact pads to avoid failure. Such an isolated island is not necessary below the contact pad to which the greatest negative voltage is applied. This contact pad is specially connected to the substrate through the window opened in the SiO 2 layer.
20 http://www.answers.com/topic/integrated-circuit
21 Elements Isolation of elements MOS ICs http://www.answers.com/topic/integrated-circuit