Design of DC-DC Converters using Tunable Piezoelectric Transformer

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Design of DC-DC Converters using Tunable Piezoelectric Transformer Mudit Khanna Master of Science In Electrical Engineering olando Burgos Khai D.T Ngo Shashank Priya

Objectives and Scope Analyze the operation and working of tunable piezoelectric transformers. Propose methods to tune tunable piezoelectric transformers. Implement control strategies to enable load and line regulation in tunable piezoelectric transformer based DC-DC converters. Detailed design of DC-DC converters using tunable PTs. I-2

Outline Overview of piezoelectric transformers Tunable piezoelectric transformers Electrical Circuit Aanlysis Voltage Gain Characteristics Optimum oad Tunability Design of DC-DC Converter using tunable PT Design of series inductor Inverter Topology ectifier Topology Implementation of variable capacitor: Switch Capacitor PWM Control Closed oop Design Hardware Design and Experimental esults Conclusion and Future Work I-3

Piezoelectric Transformers Transfer of electrical energy by acoustic coupling. Piezoelectric materials develop mechanical stress due to application of alternating electrical voltage. Inverse effect can also occur. The piezoelectric materials are poled to impart piezoelectric properties osen type piezoelectric transformer structure developed by Charles A. osen [1]. [1] C. osen, "Electromechanical transducer," Patent US Patent 2,830,274., 1958. I-4

Types of Piezoelectric Transformers ongitudinal Vibration Mode (osen Type PT ) adial Vibration Mode (Transoner PTs ) High output voltage application. Power: 5-8 W Power Density : 5-10W/cm3 Weight: 2g esonant Frequency: CCF backlighting for CDs Step down/step up applications. Power: up to 200 W Power Density : 40 W/cm3 esonant Frequency : up to 250 khz Electronic Ballasts, AC/DC adapters Thickness Vibration Mode PTs Thickness-shear Vibration Mode PTs ow Voltage, higher current applications. Power: ~50 W Power Density : 50 W/cm3 Weight: 8g for a 50 W design esonant Frequency: up to 1 MHz AC/DC adapter applications Step down applications. Power: 170 W (using 2 outputs) Power Density : 18 W/cm3 esonant Frequency: ~260 khz I-5

Applications AC/DC adapter developed by ICAT, PA ED Driver developed by DTU, Denmartk amp Ballast developed by CPES I-6

Electrical Equivalent Circuit C 1:N Input Impedance Inductive egion of operation for PTs in resonant topologies V in C d1 C d2 Vout Capacitive Capacitive 1 2 Voltage Gain Full oad ight oad owest Power Point ange of frequencies for output voltage regulation in a conventional PT I-7

CC esonant Converters CC Tank C s 1: N V in Inverter V sw C p V T ectifier V o V in V sw V T V o C 1:N V in C d1 C d2 Vout I-8

Outline Overview of piezoelectric transformers Tunable piezoelectric transformers Electrical Circuit Aanlysis Voltage Gain Characteristics Optimum oad Tunability Design of DC-DC Converter using tunable PT Design of series inductor Inverter Topology ectifier Topology Implementation of variable capacitor: Switch Capacitor PWM Control Closed oop Design Hardware Design and Experimental esults Conclusion and Future Work I-9

Tunable Piezoelectric Transformer Standard PT PUT PUT PUT PUT PUT PUT C d1 C 1:N C d2 C 1:N 1 Tunable PT C d1 C d2 C d3 CONTO C ext 1:N 2 Input Impedance C ext = 1pF C ext = 100nF Voltage Gain I-10

Equivalent Electrical Circuit Analysis C 1:N 1 Similar to a CC Tank Circuit Cd2 Cd2 C seq Cd1 Cd1 Dielectric osses CONTO C d1 C p1 acp Cd3 Cd3 1:N 2 Simplified Model With ac and C ext C 1:N 1 C 1: N 1 Cd1 Cd2 ac CONTO Cd1 Cd2 ac CONTO Cd3 C ext Cd3 C ext 1:N 2 1: N 2 I-11

Variable Control Capacitor C 1: N 1 Cd2 ac Cd1 CONTO Cd3 C ext C d1 C C p2 1: N 2 C p1 acp 1.4 2 1.8 V 1.2 out /V in in 1.6 1.4 1 1.2 0.8 1 0.8 0.6 0.8 0.6 0.6 0.4 0.4 0.4 0.2 0.2 0.2 0 0 60 70 80 90 100 60 65 70 75 80 85 90 95 100 Frequency (in (in khz) khz) C seq C d1 C p1 acp I-12

Voltage Gain Characteristics Standard PT Gain (V o /V in ) Operating Frequency range Tunable PT Frequency (in Hz) ac = 25Ω, C ext = 1pF ac = 100Ω, C ext = 40nF ac = 200Ω, C ext = 75nF ac = 300Ω, C ext = 90nF Voltage Gain characteristics similar to C Converter! Gain (V o /V in ) Fixed Frequency Operation What is the fixed frequency? What is the gain at that frequency? Frequency (in Hz) I-13

Voltage Gain Characteristics C seq 1.4 1.2 V out /V in C d1 C p1 ac 1 0.8 Ignore C d1 0.6 V in C seq C p1 ac V out 0.4 0.2 0 60 65 70 75 80 85 90 95 100 Frequency (in khz) Assuming << ac 1 1 1 1 1 1 1 1 2 1 1 0 1 1 1 1 Parallel resonant frequency of the CC tank I-14

Voltage Gain Characteristics At light load 1 1 1 1/ 2 1 1 Increase C seq C seq_new _ 11/ 1 1 1 1 2 1 A unique value of C seq exists at which gain of the tank circuit = 1 at for a given load 1 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 V out /V in 60 70 80 90 100 Frequency (in khz) V out /V in ω s @ ac and C seq_new 0 60 70 80 Frequency (in khz) 90 100 I-15 ω p ω'

Voltage Gain Characteristics C 1:N 1 Cd1 Cd2 ac CONTO C d1 C seq 1:N 1 Cd2 ac Cd3 C ext 1:N 2 Gain (V o /V in ) _ / 1 _ / 1 1 Frequency (in Hz) I-16

Tunability Tunability = 1 100 where, C (At a constant output and input voltage) 1: N 1 Cd1 Cd2 Cd3 ac CONTO C ext Depends on two ratios: 1: N 2 = 0.1 3.47 khz 2 Determines the maximum change in the resonant frequency of the Tunable PT at a given load. The closer C/C p2 to 1, higher the Tunability! Gain (V o /V in ) = 0.2 6.97 khz (*without the external capacitor) Frequency (in Hz) I-17

Tunability 1 C d1 C seq C p1 acp esonant Freq. (in Hz) arger rate of change in resonant frequency for smaller C seq /C p1 Smaller C seq /C p1 = arger Tunability C p1 = 7.75nF C seq (in F) Series esonant Frequency 1 At heavy loads /short circuit If C seq /C p1 <<1, the series resonant frequency (SF) and the parallel resonant frequency (PF) would be close to each other. Parallel esonant Frequency 1 At light loads /open circuit If the shift in the frequency from SF to PF is less, less change in C seq would be needed to regulate the converter from light load to full load. I-18

Tunability C seq /C p1 = 0.0797 1.58 khz Full oad ight oad Gain (V o /V in ) Frequency (in Hz) C seq /C p1 = 0.155 2.04 khz Full oad ight oad Gain (V o /V in ) Frequency (in Hz) I-19

eview C 1: N 1 Cd1 C seq 1: N 2 Cd2 Cd3 ac CONTO C ext Gain (V o /V in ) Tunable PT ac = 25Ω, C ext = 1pF ac = 100Ω, C ext = 40nF ac = 200Ω, C ext = 75nF ac = 300Ω, C ext = 90nF C d1 C p1 acp Frequency (in Hz) C seq_min C p2 = Min. C ext = Min. Full oad C seq_max C p2 = Max. C ext = Max. ight oad Corresponding to full load C seq_min _ 11/ 1 1 1 1 2 1 _ 1 1 _ 1 1 1 _ 1 1 I-20

Condition for 100 % Tunability Assumptions C 1: N 1 Optimum load resistance = 100% oad C seq_max = C (C ext_min = 0, C ext_max >> C) Cd1 Cd2 Cd3 ac CONTO C ext 1: N 2 C C p2 C seq C d1 C p1 acp C d1 C p1 acp For a specified β max, minimum value of C seq required _ 1 1 1 1 1 1 1 For 100 % Tunability, β max = _ & _ Hence, maximum value of C p2 for 100 % Tunability Condition for 100% Tunability I-21

Design of the Control Section 33 1 31 33 11 3 3 Cd1 C 1: N 1 Cd2 ac CONTO 2 Cd3 C ext 1: N 2 educe C d3 such that C/C p2 is as close to 1 as possible for maximum Tunability. Parameter N 2 C p2 osses Size and Weight Number of ayers Thickness of layers For max ( C seq _ min 2( C C p1 seq _ min )( C 1 * C seq _ max seq _ max C ) seq _ min * C p1 1 ) Tunability 1 1 max *100 I-22

Input Voltage egulation Voltage gain Gain (V o /V in ) Nominal oad C ext = Max 2.37x change in gain C ext = Min Input Voltage range decreases as the load decreases. Frequency (in Hz) 50 % oad Gain (V o /V in ) C ext = Max 1.54x change in gain C ext = Min Frequency (in Hz) I-23

Outline Overview of piezoelectric transformers Tunable piezoelectric transformers Electrical Circuit Aanlysis Voltage Gain Characteristics Optimum oad Tunability Design of DC-DC Converter using tunable PT Design of series inductor Inverter Topology ectifier Topology Implementation of variable capacitor: Switch Capacitor PWM Control Closed oop Design Hardware Design and Experimental esults Conclusion and Future Work I-24

Design of Input Inductor Minimize the higher order harmonics entering the PT. Enable ZVS in the inverter switches. educe common mode noise in the converter s Cd1 C 1:N 1 Cd2 Cd3 CONTO C ext 1:N 2 arge Inductor Bigger size, more inductor losses Interferes with natural PT gain Good for ZVS Good attenuation of higher order harmonics Small Inductor Gain (V o /V in ) Away from 3 rd harmonic Might not be enough for ZVS ower attenuation of higher order harmonics Frequency (in Hz) I-25

ZVS in Inverter Switches i in s C 1:N 1 V in C in V sw C d1 C d2 V sw i in C d3 Im (Zin ) > 0 1:N 2 ϴ Im (Z in ) Frequency (in Hz) I-26

Inverter Topology V sw s V in C in + V sw C d1 H-Bridge Inverter Fixed Frequency Oscillator With fixed dead time 2 sin,,.., 2 2 0.45 Suitable for higher power Easy to design Higher efficiency with ZVS I-27

Comparison of ectifier Topologies Full Bridge with Voltage oad ac C o 8 For ac = 20 Ω and P o = 30 W = 24.65 Ω V o = 27.2 V Full power obtained at higher voltage Full Bridge with Current oad ac C o 8 For ac = 20 Ω and P o = 30 W = 16.22 Ω V o = 22 V Full power obtained at lower voltage o1 Current Doubler ac C o 2 For ac = 20 Ω and P o = 30 W = 4 Ω V o = 11 V o2 Full power obtained at much lower voltage Note: The equivalent resistance for each rectifier is based on the assumption that the current through the inductor is constant. This is not a feasible design constraint as that would require a large inductance. Hence, it is not very accurate. I-28

Implementation of a variable capacitor C 1:N 1 equirements C d1 C d2 C ext V cntrl V c_ext arge range of values for C ext (typically pf - nf) Easy control 1:N 2 C d3 V sw_cntrl C ext V g_mc C ext = Fixed capacitor Control Circuit Control F sw = H.B F sw Tunable PT ac = 25Ω, C ext = 1pF ac = 100Ω, C ext = 40nF ac = 200Ω, C ext = 75nF ac = 300Ω, C ext = 90nF Gain (V o /V in ) Frequency (in Hz) I-29

Implementation of a variable capacitor Variable Capacitor V g_mc i cext C ext C d3 V cntrl V c_ext V sw_cntrl V g_mc Gate Driver Vc V sw_cntrl i cext C eff ZCD sync V cntrl V c_ext V c_ext 1cos 2 2 Capacitor charging phase Capacitor discharging phase PWM control of the effective value of C ext. Enables ZVS in the control switch. High efficiency operation. Simple control possible using PWM driver and type II compensator. I-30

Closed oop Design s C Vin Cin V sw Cd1 V PT Cd2 Co 1 Compensator C ext Tunable-Piezoelectric Transformer Cd3 V cntrl V c_ext V sw_cntrl V g_mc V ref 1 Control Circuit Simulated Open oop Control to Output Characteristics Gain Phase Frequency (in Hz) Frequency (in Hz) I-31

Compensator Design Type II Compensator Simulated Closed loop gain of the converter 2 C 2 C 1 G m V ref 1 Gain Gen 3 TPT Closed loop bandwidth = 2.5 khz Gain Margin = 5 db Phase Margin = 52º Frequency (in Hz) Phase Frequency (in Hz) I-32

Design Summary V in s C 1:N 1 C o C in Cd2 Cd1 1 Cd3 C ext V ref 1 H-Bridge Inverter 1:N 2 I-33

Outline Overview of piezoelectric transformers Tunable piezoelectric transformers Electrical Circuit Aanlysis Voltage Gain Characteristics Optimum oad Tunability Design of DC-DC Converter using tunable PT Design of series inductor Inverter Topology ectifier Topology Implementation of variable capacitor: Switch Capacitor PWM Control Closed oop Design Hardware Design and Experimental esults Conclusion and Future Work I-34

Gen 2 TPT vs. Gen 3 TPT Gen 2 TPT Gen 3 TPT 4x0.625 mm 2x1.50 mm 4x0.625 mm C 8.073mH 514pF 7.9407 1:N 1 Cd2 21.23nF C 5.064mH 914pF 8.392 1:N 1 Cd2 96.243nF Cd1 11.011nF N 1 = 0.4068 N 2 = 0.721 Cd3 CONTO 11.148nF Cd1 10.781nF N 1 = 0.327 N 2 = 0.926 Cd3 CONTO 9.296nF 1:N 2 Operating Frequency = 86 khz Optimum oad ( ac ) = 85 Ω Voltage Gain of TPT = 0.4 1:N 2 Operating Frequency = 81.2 khz Optimum oad ( ac ) = 20 Ω Voltage Gain of TPT = 0.31 2 0.0887 1 0.1344 2 0.115 1 0.0797 I-35

Gen 2 TPT vs. Gen 3 TPT = 5.795 nf = 3.513 nf = 7.97 nf = 10.29 nf Tunability = 55 % Tunability = 100 % V in 220 V V in 172 V V o 55 V V o 23.3 V Power 30 W 16 W Power 29 W 2.9 W 85 Ω 20 Ω F sw 82.5 khz* F sw 81.2 khz Efficiency 90 % (full load) Efficiency 77 % (full load) *The difference in the calculated frequency and the experimental frequency is due to the error in the model. I-36

Hardware Design Top View On Board mounting space for new generation PTs Space for PTs upto 38mm diameter Bottom View Gen 3 Tunable PT mounted on-board 24 V DC I/P Gen 3 TPT V in Output I-37

esults : Gen 2 Tunable PT 10 V/div 100 V/div 77 % oad 60 % oad 10 V/div 100 V/div D Mc V cntrl_sw V sw 100 V/div 100 V/div 10 V/div 51 % oad 47 % oad 10 V/div 100 V/div 100 V/div 100 V/div 100 V/div I-38

esults : Gen 3 Tunable PT 10 V/div 100 % oad 42 % oad 10 V/div D Mc V cntrl_sw 100 V/div 100 V/div 10 V/div 20 % oad 10 % oad 10 V/div 100 V/div 100 V/div I-39

Outline Overview of piezoelectric transformers Tunable piezoelectric transformers Electrical Circuit Aanlysis Voltage Gain Characteristics Optimum oad Tunability Design of DC-DC Converter using tunable PT Design of series inductor Inverter Topology ectifier Topology Implementation of variable capacitor: Switch Capacitor PWM Control Closed oop Design Hardware Design and Experimental esults Conclusion and Future Work I-40

Conclusion Detailed understanding on the operation of tunable piezoelectric transformers. Electrical circuit analysis approach taken to derive important relations between circuit and performance. Proposed a way to tune the transformers by adding a variable capacitor. Important equations for calculating tunability derived. Hardware implementation of the variable capacitor : PWM controlled switched capacitor. Detailed design procedure for DC-DC converter design using tunable PT. Publications Manuscript TPE-etter-2017-02-0035.2 New Tunable Piezoelectric Transformers and their application in DC-DC converters selected for publication IEEE transactions for power electronics. In the process of writing another journal paper as a follow up to this paper. I-41

Future Scope and Work Optimize the converter design to increase efficiency. OSS BEAKDOWN Others 3% Inductor 7% Total osses = 6 W eduction in losses by using MoSFETs for rectification ectifier 34% 2.1 W 3.4 W PT 56% For 30 W Gen 3 Tunable PT Implement current sensing in the control circuit i cext C ext Variable Capacitor C d3 V cntrl V c_ext V sw_cntrl V g_mc Gate Driver Vc C eff ZCD sync I-42

Inductor less design for TPT Future Scope and Work Output ectifier s C Vin Cin + Vsw Cd1 esr1 Cd2 Co oad H-Bridge Inverter Tunable-Piezoelectric Transformer C ext V Cd3 c_ext V cntrl V sw_cntrl PWM Modulator V ef V g_mc Error Amplifier Control Circuit Universal AC/DC adapter stage with PFC Inductor less charge pump PFC Electronic Ballast [2] [2] Z. Jinghai, T. Fengfeng, and F. C. ee, "Inductor-less charge pump PFC electronic ballast," in Conference ecord of the 2001 IEEE Industry Applications Conference. 36th IAS Annual Meeting (Cat. No.01CH37248), 2001, vol. 1, pp. 524-529 vol.1. I-43

Improvised control strategy Future Scope and Work Output ectifier s C Vin Cin + Vsw Cd1 esr1 Cd2 Co oad H-Bridge Inverter Tunable-Piezoelectric Transformer C ext V Cd3 c_ext V cntrl V sw_cntrl PWM Modulator V ef V g_mc Error Amplifier Control Circuit VCO For input voltage regulation Design and Modeling of TPT for a specific application I-44

Thank you I-45

Optimum oad C ext = 1 pf 1 2 MATAB Code was developed to verify the optimum load for PT. Theoretical prediction of optimum load matches the circuit analysis result. Design the output section of the Tunable PT to have nominal power at the optimum load. I-46

Comparison of ectifier Topologies Full Bridge with Current oad Current Doubler V dc F sw load ac C ext V o P o 160 V (nominal) 81 khz 16 Ω 20 Ω 1 pf 22 V 30 W V dc F sw load ac C ext V o P o 160 V (nominal) 81 khz 4 Ω 20 Ω 1 pf 11 V 30 W Advantages Advantages ower output voltage. equires 1 filter inductor Disadvantages Number of diodes in the rectifier stage are twice compared to the current doubler. This reduces the efficiency of the converter. Output voltage is much lower for the same power and optimum PT load. Better efficiency due to reduced diode number. Disadvantages equires 2 filter inductor at the output. This increases the size and the weight of the converter. Design of the rectifier must be done considering both Overlapping and Nonoverlapping modes [1]. [1] G. Ivensky, S. Bronstein, and S. Ben-Yaakov, "A comparison of piezoelectric transformer AC/DC converters with current doubler and voltage doubler rectifiers," IEEE Transactions on Power Electronics, vol. 19, no. 6, pp. 1446-1453, 2004. I-47

High Power Test: Gen 2 TPT GEN 2 - TPT Test Conditions Control Duty Cycle, D = 0.1 oom Temperature = 24 C Temperature recorded after 5 minutes of converter operation at each operating point. TPT can be operated safely up to 40 W I-48

Gen 1 TPT vs Gen 2 TPT Gen 1 TPT Gen 2 TPT C 1:N 1 C 1:N 1 7.01mH 643pF 6.22 Cd2 21.8nF 8.073mH 514pF 7.9407 Cd2 21.23nF Cd1 10.47nF N 1 = 0.3847 N 2 = 1.246 Cd3 CONTO 11.39nF Cd1 11.011nF N 1 = 0.4068 N 2 = 0.721 Cd3 CONTO 11.148nF 1:N 2 2 0.03636 1 0.19702 1:N 2 2 0.0887 1 0.1344 max ( C seq _ min 2( C C seq _ min p1 )( C 1 * C seq _ max seq _ max C ) seq _ min * C p1 1 ) 1 Tunability 1 max *100 Tunability = 14.88 % Tunability = 55 % I-49