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Transcription:

STD2NM60 STD2NM60-1 N-CHANNEL 600V - 2.8Ω - 2A DPAK/IPAK Zener-Protected MDmesh Power MOSFET TYPE V DSS R DS(on) I D STD2NM60 STD2NM60-1 600V 600V TYPICAL R DS (on) = 2.8 Ω < 3.2 Ω < 3.2 Ω HIGH dv/dt AND AVALANCHE CAPABILITIES 100% AVALANCHE TESTED LOW INPUT CAPACITANCE AND GATE CHARGE LOW GATE INPUT RESISTANCE TIGHT PROCESS CONTROL AND HIGH MANUFACTORING YIELDS DESCRIPTION The MDmesh is a new revolutionary MOSFET technology that associates the Multiple Drain process with the Company s PowerMESH horizontal layout. The resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Company s proprietary strip technique yields overall dynamic performance that is significantly better than that of similar completition s products. APPLICATIONS The MDmesh family is very suitable for increase the power density of high voltage converters allowing system miniaturization and higher efficiencies. ABSOLUTE MAXIMUM RATINGS 2 A 2 A Symbol Parameter Value Unit V DS Drain-source Voltage (V GS = 0) 600 V V DGR Drain-gate Voltage (R GS = 20 kω) 600 V V GS Gate- source Voltage ±30 V I D Drain Current (continuous) at T C = 25 C 2 A I D Drain Current (continuous) at T C = 100 C 1.26 A I DM ( ) Drain Current (pulsed) 8 A P TOT Total Dissipation at T C = 25 C 46 W Derating Factor 0.37 W/ C V ESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ) 1 kv dv/dt(1) Peak Diode Recovery voltage slope 15 V/ns T stg Storage Temperature 65 to 150 C T j Max. Operating Junction Temperature 150 C ( )Pulse width limited by safe operating area (1)I SD<2A, di/dt<400a/µs, V DD<V (BR)DSS, T J<T JMAX 1 DPAK TO-252 3 IPAK TO-251 3 2 1 INTERNAL SCHEMATIC DIAGRAM September 2002 1/10

THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 2.73 C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 C/W T l Maximum Lead Temperature For Soldering Purpose 300 C AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit I AR Avalanche Current, Repetitive or Not-Repetitive 0.5 A (pulse width limited by T j max) E AS Single Pulse Avalanche Energy (starting T j = 25 C, I D = I AR, V DD = 50 V) 250 mj ELECTRICAL CHARACTERISTICS (T CASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF V (BR)DSS Drain-source I D = 1 ma, V GS = 0 600 V Breakdown Voltage I DSS Zero Gate Voltage V DS = Max Rating 1 µa Drain Current (V GS = 0) V DS = Max Rating, T C = 125 C 10 µa I GSS Gate-body Leakage Current (V DS = 0) V GS = ± 20V ± 5 µa ON (1) V GS(th) Gate Threshold Voltage V DS = V GS, I D = 250µA 3 4 5 V R DS(on) Static Drain-source On Resistance V GS = 10V, I D = 1 A 2.8 3.2 Ω DYNAMIC g fs (1) Forward Transconductance V DS > I D(on) x R DS(on)max, 1.4 I D =2 A S C iss Input Capacitance V DS = 25V, f = 1 MHz, V GS = 0 160 pf C oss Output Capacitance 67 pf C rss Reverse Transfer 4 pf Capacitance R G Gate Input Resistance f=1 MHz Gate DC Bias = 0 Test Signal Level = 20mV Open Drain 3.5 Ω Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2/10

ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON t d(on) Turn-on Delay Time V DD = 300V, I D = 1 A 13 ns t r Rise Time R G = 4.7Ω V GS = 10V 8 ns (see test circuit, Figure 3) Q g Total Gate Charge V DD = 480V, I D = 2 A, 6 8.4 nc Q gs Gate-Source Charge V GS = 10V 1.8 nc Q gd Gate-Drain Charge 3.3 nc SWITCHING OFF t r(voff) Off-voltage Rise Time V DD = 480 V, I D = 2 A, 12 ns t f Fall Time R G =4.7Ω, V GS = 10V (see test circuit, Figure 5) 25 ns t c Cross-over Time 30 ns SOURCE DRAIN DIODE I SD Source-drain Current 2 A I SDM (2) Source-drain Current (pulsed) 8 A V SD (1) Forward On Voltage I SD = 2 A, V GS = 0 1.5 V t rr Q rr I RRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 2 A, di/dt = 100A/µs, V DD = 100 V, T j = 25 C (see test circuit, Figure 5) 516 516 2 ns nc A t rr Q rr I RRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 2 A, di/dt = 100A/µs, V DD = 100 V, T j = 150 C (see test circuit, Figure 5) 808 890 2.2 ns nc A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. GATE-SOURCE ZENER DIODE BV GSO Gate-Source Breakdown Igs=± 1mA (Open Drain) 30 V Voltage PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device s integrity. These integrated Zener diodes thus avoid the usage of external components. 3/10

Safe Operating Area Thermal Impedance Output Characteristics Transconductance Transfer Characteristics Static Drain-source On Resistance 4/10

Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Thereshold Voltage vs Temp. Source-drain Diode Forward Characteristics Normalized On Resistance vs Temperature Normalized BVDSS vs. Temperature 5/10

Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit 6/10

TO-252 (DPAK) MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A 2.20 2.40 0.087 0.094 A1 0.90 1.10 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.90 0.025 0.035 B2 5.20 5.40 0.204 0.213 C 0.45 0.60 0.018 0.024 C2 0.48 0.60 0.019 0.024 D 6.00 6.20 0.236 0.244 E 6.40 6.60 0.252 0.260 G 4.40 4.60 0.173 0.181 H 9.35 10.10 0.368 0.398 L2 0.8 0.031 L4 0.60 1.00 0.024 0.039 V2 0 o 8 o 0 o 0 o P032P_B 7/10

TO-251 (IPAK) MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 0.85 0.033 B5 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039 A E = = C2 L2 B2 = = D 1 2 3 H B3 B6 A1 L B C B5 A3 G = = L1 0068771-E 8/10

DPAK FOOTPRINT TUBE SHIPMENT (no suffix)* All dimensions are in millimeters All dimensions are in millimeters TAPE MECHANICAL DATA mm inch DIM. MIN. MAX. MIN. MAX. TAPE AND REEL SHIPMENT (suffix T4 )* A0 6.8 7 0.267 0.275 B0 10.4 10.6 0.409 0.417 B1 12.1 0.476 D 1.5 1.6 0.059 0.063 D1 1.5 0.059 E 1.65 1.85 0.065 0.073 F 7.4 7.6 0.291 0.299 K0 2.55 2.75 0.100 0.108 P0 3.9 4.1 0.153 0.161 P1 7.9 8.1 0.311 0.319 P2 1.9 2.1 0.075 0.082 R 40 1.574 W 15.7 16.3 0.618 0.641 DIM. REEL MECHANICAL DATA mm inch MIN. MAX. MIN. MAX. A 330 12.992 B 1.5 0.059 C 12.8 13.2 0.504 0.520 D 20.2 0.795 G 16.4 18.4 0.645 0.724 N 50 1.968 T 22.4 0.881 BASE QTY BULK QTY 2500 2500 * on sales type 9/10

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 10/10