TC4093BP, TC4093BF TC4093BP/BF. TC4093B Quad 2-Input NAND Schmitt Triggers. Pin Assignment. Logic Diagram

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Transcription:

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4093BP, TC4093BF TC4093B Quad 2-Input NAND Schmitt Triggers The TC4093B is a quad 2-input NAND gate having Schmitt trigger function for all the input terminals. Since the circuit threshold varies with rising time and falling time of the input waveform ( P and N ), this gate can be used for a wide variety of applications to line receivers, waveform shaping, astable multivibrators, monosatable multivibrators in addtion to regular NAND gates. As the TC4093B and the TC4011B are identical in pin assignment, they are compatible each other. TC4093BP Pin Assignment TC4093BF Weight DIP14-P-300-2.4 SOP14-P-300-1.27A : 0.96 g (typ.) : 0.18 g (typ.) Logic Diagram Start of commercial production 1978-04 1

Input-Output Characteristic Input-Output oltage Waveform Transfer Characteristics Absolute Maximum Ratings (Note) Characteristics Symbol Rating Unit DC supply DD SS 0. to SS + 20 Input IN SS 0. to DD + 0. Output OUT SS 0. to DD + 0. DC input current I IN ± ma Power dissipation P D 300 (DIP)/180 (SOIC) mw Operating temperature range T opr 40 to 8 C Storage temperature range T stg 6 to C Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/ and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ( Handling Precautions / Derating Concept and Methods ) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Operating Ranges ( SS = 0 ) (Note) Characteristics Symbol Test Condition Min Typ. Max Unit DC supply DD 3 18 Input IN 0 DD Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either DD or SS. 2

Static Electrical Characteristics ( SS = 0 ) Characteristics Symbol Test Condition 40 C 2 C 8 C DD () Min Max Min Typ. Max Min Max Unit High-level output OH I OUT < 1 μa IN = SS, DD 1 4.9 9.9 14.9 4.9 9.9 14.9.00.00 1.00 4.9 9.9 14.9 Low-level output OL I OUT < 1 μa IN = DD 1 0.0 0.0 0.0 0.00 0.00 0.00 0.0 0.0 0.0 0.0 0.0 0.0 OH = 4.6 0.61 0.1 1.0 0.42 OH = 2. 2.0 2. 4.0 1.70 Output high current I OH OH = 9. 1.0 1.30 2.2 1. ma OH = 13. 1 4.00 3.40 9.0 2.80 IN = SS, DD OL = 0.4 0.61 0.1 1. 0.42 Output low current I OL OL = 0. OL = 1. 1 1. 4.0 1.30 3.40 3.8 1.0 1. 2.80 ma IN = DD High threshold Low threshold P N OUT = 0., 4. OUT = 1.0, 9.0 OUT = 1., 13. OUT = 0., 4. OUT = 1.0, 9.0 OUT = 1., 13. Hysteresis H Input current Quiescent supply current 1 1 1 2.0 4. 6.20 1. 3.2 4.8 0.20 0.30 0.4 2.8.3 7.8 2.3 4. 6.6 0. 0.8 1.2 3. 7.00.40 3.1 6.30 9.30 0.8 1.40 1.90 H level I IH IH = 18 18 0.1 0.1 1.0 L level I IL IL = 0 18 0.1 0.1 1.0 I DD IN = SS, DD (Note) 1 1 2 4 0.001 0.002 0.004 1 2 4 7. 1.0 30.0 μa μa Note: All valid input combinations. 3

Dynamic Electrical Characteristics (Ta = 2 C, SS = 0, C L = 0 pf) Characteristics Symbol Test Condition DD () Min Typ. Max Unit 80 200 Output transition time t TLH 0 0 (low to high) 1 40 80 ns 80 200 Output transition time t THL 0 0 (high to low) 1 40 80 ns Propagation delay time t plh t phl 1 130 60 40 260 120 80 ns Input capacitance C IN 7. pf Circuit and Waveform for Measurement of Dynamic Characteristics Circuit Waveform 4

Package Dimensions Weight: 0.96 g (typ.)

Package Dimensions Weight: 0.18 g (typ.) 6

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