AKD4122A-A Evaluation board Rev.0 for AK4122A

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[K4-] K4- valuation board Rev.0 for K4 GNRL SRIPTION The K4- is an evaluation board for the digital sample rate converter, the K4 with built-in digital audio interface receiver (). The K4- has the digital audio interface and can achieve the interface with digital audio system via opt-connector. Ordering guide K4- --- valuation board for K4 (able for connecting with printer port of IM-T compatible P and control software are packed with this. This control software does not operate on Windows NT.) FUNTION /IT with optical input/output 0pin Header for KM / evaluation board N connector for an external clock input 0pin Header for serial control mode +5V V, V GN, GN Opt In K4 4 K44 Opt Out RG.V SP ata 0 pin Head er 0pi n Header SP ata K4 IK In l ock ivider MLK In igi tal In Opt In 0 pin Header ontrol ata MLK In lock i vi der 0pin H eader K44 Opt In Opt Out SP ata Figure. K4- lock iagram * ircuit diagram and P layout are attached at the end of this manual. - -

[K4-] valuation oard Manual Operation sequence ) Set up the power supply lines. [V] (red) =.0.V (typ..v, V pin) [V] (red) =.0.V (typ..v, V pin) [+5V] (orange) = +5V (for regulator) [V] (blue) =.0.V (typ..v, for digital logic) [GN] (black) = 0V [GN] (black) = 0V ach supply line should be distributed from the power supply unit. ) Set up the evaluation mode, jumper pins. (See the followings.) ) Power on. The K4 should be reset once bringing SW (PN) L upon power-up. valuation mode I/O ports and jumper pins on the board should be set according to the following explanation in order to evaluate each pass of the K4. The block diagram is shown in Figure. MKO INT0 INT INT R FILT RX RX RX RX RX4 RX RX RX4 OPS-0 TX TX PN IK LRK STI IK LRK STI PORT Serial udio I/F IPS-0 ISL-0 e-em Filter SR YPS OSL PORT Serial udio I/F LRK IK STO SMUT LRK IK STO PORT PLL OMLK IK LRK STIO IK LRK STIO Serial udio I/F M/S M/S MLK ontrol Register MK V VSS V VSS TO TI LK SN Figure. K4 lock iagram - -

[K4-] () K4 PORT SR K4 PORT Refer to page 5 for input port setting, and page 5 8 for output port setting. PORT4 U K44 U4 K44 PORT0 IT K4 PORT5 SP IK LRK ST I IK LRK STO OMLK PORT9 SP J4 ivider J Figure. K4 PORT SR K4 PORT () K4 PORT SR K4 PORT Refer to page 9 for input port setting, and page 5 8 for output port setting. PORT U K44 U4 K44 PORT0 IT K4 IK IK PORT7 SP LRK ST IO LRK STO PORT9 SP MLK OMLK J ivider ivider J Figure 4. K4 PORT SR K4 PORT () K4 SR K4 PORT Refer to page 0 for input port setting, and page 5 8 for output port setting. U4 K44 PORT0 IT PORT K4 RX I K RX LR K RX ST O PORT9 SP J RX RX4 OMLK ivider J Figure 5. K4 SR K4 PORT - -

[K4-] (4) K4 PORT SR K4PORT Refer to page 5 for input port setting, and page 4 for output port setting. PORT4 U K44 U K44 PORT8 IT K4 PORT5 SP IK LRK ST I IK LRK ST IO MLK PORT7 SP J4 ivider J Figure. K4 PORT SR K4 PORT (5) K4 SR K4 PORT Refer to page 0 for input port setting, and page 4 for output port setting. U K44 PORT8 IT PORT K4 RX IK RX LRK RX STIO PORT7 SP J RX RX4 MLK ivider J Figure 7. K4 SR K4 PORT () ypass Mode Refer to page 5 0 for input port setting, and output port setting should be master mode. The bypass mode of the K4 is set by the register. In bypass mode, the IT function of the K44 can not be used as the output port. 0pin PORT should be used instead. Input IK, LRK, and T are output from the output port side in the bypass mode. - 4 -

[K4-] () Setting for Input port (K4 PORT) (-) Slave Mode. When using function of K44 (U) When using PORT4 (), nothing should be connected to J4 () and PORT5 (SP). JP () should be short. JP IK JP JP STO JP4 LRK SW setting (See Table,Table ) Upper-side is H and lower-side is L. SW No. Name ON ( H ) OFF ( L ) OKS Fixed to L IF0 IF 4 IF K44 udio Format Setting Refer to Table Table. SW setting Mode udio I/F Format K44 K4 IF IF IF0 IF IF0 0 bit, LS justified 0 0 0 0 0 4bit, MS justified 0 0 0 efault 4bit, I S ompatible 0 0 4bit, LS justified 0 Table. K44 udio interface format setting * IF-0 of the K4 is set by the register.. When connecting with the serial interface of UP, ROH & SHWRZ When using PORT5 (SP), nothing should be connected to PORT4 (). IK is input from J4 (), and the LRK and STI are supplied from UP. JP () should be open. JP IK JP JP STO JP4 LRK. ll clocks are fed through the 0pin port When using PORT5 (SP), nothing should be connected to J4 () and PORT4 (). JP () should be short. JP IK JP JP STO JP4 LRK - 5 -

[K4-] () Setting for Input port (K4 PORT) (-) Slave mode. When using function of K44 (U) When using PORT (), nothing should be connected to J () and PORT7 (SP). Set JP8 (MLK) to the when MLK is supplied to the K4. JP5 STIO JP IK JP7 LRK JP8 MLK SW setting (See Table,Table 4,Table 5) Upper-side is H and lower-side is L. SW No. Name ON ( H ) OFF ( L ) K44 Master lock Output Setting OKS Refer to Table 4 IF0 IF 4 IF K44 udio Format Setting Refer to Table 5 Table. SW setting Mode OKS MKO X tal fs 0 0 5fs 5fs 9kHz efault 5fs 5fs 48kHz Table 4. K44 MKO setting Mode udio I/F Format K44 K4 IF IF IF0 IIF IIF0 0 bit, LS justified 0 0 0 0 0 4bit, MS justified 0 0 0 efault 4bit, I S ompatible 0 0 4bit, LS justified 0 Table 5. K44 udio interface format setting * IIF-0 of the K4 is set by the register. - -

[K4-]. When connecting with the serial interface of UP, ROH & SHWRZ When using PORT7 (SP), nothing should be connected to PORT (). MLK is input from J (), IK is supplied by using the clock dividing circuit on this evaluation board and the LRK and STI are supplied from UP. Set JP8 (MLK) to the when MLK is supplied to the K4. JP5 STIO JP IK JP7 LRK JP8 MLK lock Setting MLK is input from J (), IK is supplied by using the clock dividing circuit. JP4 (IV) and JP5 (LK) are set by referring to Table. JP (FS) selects the frequency of IK. JP7 () should be open. JP4 IV JP5 LK JP FS JP7 5 84 4fs fs 5 5 78 fs MLK JP4(IV) JP5(LK) 5fs =.048MHz 5 5 8kHz 84fs =.07MHz Open 84 5fs = 4.09MHz 5 5 78fs =.44MHz 78 5 5fs = 8.9MHz 5 5 khz 84fs =.88MHz Open 84 5fs =.84MHz 5 5 78fs = 4.57MHz 78 5 5fs =.89MHz 5 5 44.kHz 84fs =.944MHz Open 84 5fs =.579MHz 5 5 78fs =.888MHz 78 5 5fs =.88MHz 5 5 48kHz 84fs = 8.4MHz Open 84 5fs = 4.57MHz 5 5 78fs =.84MHz 78 5 88.kHz 5fs =.579MHz 5 5 84fs =.888MHz Open 84 9kHz 5fs = 4.57MHz 5 5 84fs =.84MHz Open 84 Table. xample for lock setting - 7 -

[K4-]. ll clocks are fed through the 0pin port When using PORT7 (SP), nothing should be connected to J () and PORT (). JP7 () should be short. JP5 STIO JP IK JP7 LRK JP8 MLK (-) Master mode MLK must be provided in the master mode.. When using function of K44 (U) When using PORT (), nothing should be connected to J () and PORT7 (SP). Set JP8 (MLK) to the in order to supply MLK to the K4. JP5 STIO JP IK JP7 LRK JP8 MLK SW setting (See Table 7,Table 8,Table 9) Upper-side is H and lower-side is L. SW No. Name ON ( H ) OFF ( L ) K44 Master lock Output Setting OKS Refer to Table 8 IF0 IF 4 IF K44 udio Format Setting Refer to Table 9 Table 7. SW setting Mode OKS MKO X tal fs 0 0 5fs 5fs 9kHz 5fs 5fs 48kHz Table 8. K44 MKO setting Mode udio I/F Format K44 K4 IF IF IF0 IIF IIF0 0 4bit, MS justified 0 0 4bit, I S ompatible 0 Table 9. K44 udio interface format setting * IIF-0 of the K4 is set by the register. - 8 -

[K4-]. ll clocks are fed through the 0pin port When using PORT7 (SP), nothing should be connected to J () and PORT (). JP7 () should be short. MLK is supplied to the K4, and the T that synchronizes with IK and LRK output from the K4 is supplied to the K4. JP5 STIO JP IK JP7 LRK JP8 MLK (-) SW setting Set SW according to the mode of the K4 PORT. SW No. Name ON ( H ) OFF ( L ) efault M/S Master Mode Slave Mode L M/S Master Mode Slave Mode L TST4 Fixed to L L Table 0. SW setting - 9 -

[K4-] () Setting for Input port (K4 ) (-) Setting for input The signal source of K4 s can be set by JP (RX) and JP (RX-4). V L 47u PORT V GN OUT OPT J RX R5 75 R4 470 JP RX N JP RX-4 RX RX RX RX4 RX RX RX RX4 Figure 8. input circuit JP RX JP RX JP RX-4 RX RX RX RX4 RX JP RX-4 Optical N RX N oaxial Figure 9. JP setting RX RX RX RX4 JP RX-4 RX RX RX RX4 JP RX-4 RX RX RX RX4 Figure 0. JP setting RX RX RX RX4 (-) Setting for through signal through signal of the K4 is output to TX pin via PORT (TX). TX V PORT IN V GN TX Figure. through signal - 0 -

[K4-] (4) Setting for Output port (K4 PORT) (4-) Slave mode. When using IT function of K44 (U) When using X tal (X) and PORT8 (IT), nothing should be connected to PORT () and PORT7 (SP). Set JP8 (MLK) to the when MLK is supplied to the K4. When MLK frequency is changed, the value of X tal (X) frequency should be changed according to MLK frequency. JP5 STIO JP IK JP7 LRK JP8 MLK SW setting (See Table,Table,Table ) Upper-side is H and lower-side is L. SW No. Name ON ( H ) OFF ( L ) K44 Master lock Output Setting OKS Refer to Table IF0 IF 4 IF K44 udio Format Setting Refer to Table Table. SW setting Mode OKS MKO X tal fs 0 0 5fs 5fs 9kHz efault 5fs 5fs 48kHz Table. K44 MKO setting Mode udio I/F Format K44 K4 IF IF IF0 IIF IIF0 0 4bit, MS justified 0 0 0 0 4bit, MS justified 0 0 0 efault 4bit, I S ompatible 0 0 4bit, MS justified 0 0 Table. K44 udio interface format setting * IIF-0 of the K4 is set by the register. - -

[K4-]. When connecting with the serial interface of UP, ROH & SHWRZ When using PORT7 (SP), nothing should be connected to PORT (). MLK is input from J (), IK and LRK are supplied by using the clock dividing circuit on this evaluation board to the K4. Set JP8 (MLK) to the when MLK is supplied to the K4. JP5 STIO JP IK JP7 LRK JP8 MLK lock Setting MLK is input from J (), IK and LRK are generated by using the clock dividing circuit. JP4 (IV) and JP5 (LK) are set by referring to Table 4. JP (FS) selects the frequency of IK. JP7 () should be open. JP4 IV JP5 LK JP FS JP7 5 84 4fs fs 5 5 78 fs MLK JP4(IV) JP5(LK) 5fs = 8.9MHz 5 5 khz 84fs =.88MHz Open 84 5fs =.84MHz 5 5 78fs = 4.57MHz 78 5 5fs =.89MHz 5 5 44.kHz 84fs =.944MHz Open 84 5fs =.579MHz 5 5 78fs =.888MHz 78 5 5fs =.88MHz 5 5 48kHz 84fs = 8.4MHz Open 84 5fs = 4.57MHz 5 5 78fs =.84MHz 78 5 88.kHz 5fs =.579MHz 5 5 84fs =.888MHz Open 84 9kHz 5fs = 4.57MHz 5 5 84fs =.84MHz Open 84 Table 4. xample for lock setting. ll clocks are fed through the 0pin port When using PORT7 (SP), nothing should be connected to J () and PORT (). JP7 () should be short. JP5 STIO JP IK JP7 LRK JP8 MLK - -

[K4-] (4-) Master mode MLK must be provided in the master mode.. When using IT function of K44 (U) When using X tal (X) and PORT8 (IT), nothing should be connected to PORT () and PORT7 (SP). Set JP8 (MLK) to the when MLK is supplied to the K4. When MLK frequency is changed, the value of X tal (X) frequency should be changed according to MLK frequency. JP5 STIO JP IK JP7 LRK JP8 MLK SW setting (See Table 5,Table,Table 7) Upper-side is H and lower-side is L. SW No. Name ON ( H ) OFF ( L ) K44 Master lock Output Setting OKS Refer to Table IF0 IF 4 IF K44 udio Format Setting Refer to Table 7 Table 5. SW setting Mode OKS MKO X tal fs 0 0 5fs 5fs 9kHz 5fs 5fs 48kHz Table. K44 MKO setting Mode udio I/F Format K44 K4 IF IF IF0 IIF IIF0 0 4bit, MS justified 0 0 4bit, I S ompatible 0 Table 7. K44 udio interface format setting * IIF-0 of the K4 is set by the register. - -

[K4-]. When connecting with the serial interface of UP, ROH & SHWRZ When using PORT7 (SP), nothing should be connected to PORT () and PORT8 (IT). MLK is input from J (), IK LRK, and T are supplied from the K4. Set JP8 (MLK) to the in order to supply MLK to the K4. JP5 STIO JP IK JP7 LRK JP8 MLK lock Setting MLK is input from J (). JP7 () should be open. JP4 IV JP5 LK JP FS JP7 5 84 4fs fs 5 5 78. ll clocks are fed through the 0pin port When using PORT7 (SP), nothing should be connected to J (), PORT () and PORT8 (IT). JP7 () should be short. MLK is supplied to the K4, and IK, LRK and T are supplied from the K4. JP5 STIO JP IK JP7 LRK JP8 MLK (4-) SW setting Set SW according to the mode of the K4 PORT. SW No. Name ON ( H ) OFF ( L ) efault M/S Master Mode Slave Mode L M/S Master Mode Slave Mode L TST4 Fixed to L L Table 8. SW setting - 4 -

[K4-] (5) Setting for Output port (K4 PORT) (5-) Slave mode. When using IT function of K44 (U4) When using X tal (X) and PORT0 (IT), nothing should be connected to PORT9 (SP). Please set JP (OMLK) to the IT when MLK is supplied to the K4. When MLK frequency is changed, the value of X tal (X) frequency should be changed according to MLK frequency. JP9 IK JP0 LRK JP OMLK JP5 TST IT IT IT OMK TST SW4 setting (See Table 9,Table 0,Table ) Upper-side is H and lower-side is L. SW4 No. Name ON ( H ) OFF ( L ) OKS K44 Master lock Output Setting Refer to Table 0 IF0 K44 udio Format Setting Refer to Table Table 9. SW4 setting Mode OKS MKO X tal fs 0 0 5fs 5fs 9kHz efault 5fs 5fs 48kHz Table 0. K44 MKO setting Mode udio I/F Format K44 K4 IF0 OIF 0 4bit, MS justified 0 0 efault 4bit, I S ompatible Table. K44 udio interface format setting * OIF of the K4 is set by the register. - 5 -

[K4-]. When connecting with the serial interface of UP, ROH & SHWRZ When using PORT9 (SP), nothing should be connected to PORT0 (IT). MLK is input from J (), IK and LRK are supplied by using the clock dividing circuit on this evaluation board to the K4. Set JP (OMLK) to the when MLK is supplied to the K4. JP9 IK JP0 LRK JP OMLK JP5 TST IT IT IT OMK TST lock Setting MLK is input from J (), IK and LRK are generated by using the clock dividing circuit. JP8 (IV) and JP9 (LK) are set by referring to Table. JP0 () should be open. JP8 IV JP9 LK JP0 5 84 5 5 78 fs MLK JP8(IV) JP9(LK) 5fs = 8.9MHz 5 5 khz 84fs =.88MHz Open 84 5fs =.84MHz 5 5 78fs = 4.57MHz 78 5 5fs =.89MHz 5 5 44.kHz 84fs =.944MHz Open 84 5fs =.579MHz 5 5 78fs =.888MHz 78 5 5fs =.88MHz 5 5 48kHz 84fs = 8.4MHz Open 84 5fs = 4.57MHz 5 5 78fs =.84MHz 78 5 88.kHz 5fs =.579MHz 5 5 84fs =.888MHz Open 84 9kHz 5fs = 4.57MHz 5 5 84fs =.84MHz Open 84 Table. xample for lock setting. ll clocks are fed through the 0pin port When using PORT9 (SP), nothing should be connected to PORT0 (IT). Set JP5 (TST) to the OMK when MLK is supplied to the K4. JP0 () should be short. JP9 IK JP0 LRK JP OMLK JP5 TST IT IT IT OMK TST - -

[K4-] (5-) Master mode MLK must be provided in the master mode.. When using IT function of K44 (U4) When using X tal (X) and PORT0 (IT), nothing should be connected to PORT9 (SP). Set JP (OMLK) to the IT in order to supply MLK to the K4. When MLK frequency is changed, the value of X tal (X) frequency should be changed according to MLK frequency. JP9 IK JP0 LRK JP OMLK JP5 TST IT IT IT OMK TST SW4 setting (See Table,Table 4,Table 5) Upper-side is H and lower-side is L. SW4 No. Name ON ( H ) OFF ( L ) OKS K44 Master lock Output Setting Refer to Table 4 IF0 K44 udio Format Setting Refer to Table 5 Table. SW4 setting Mode OKS MKO X tal fs 0 0 5fs 5fs 9kHz 5fs 5fs 48kHz Table 4. K44 MKO setting Mode udio I/F Format K44 K4 IF0 OIF 0 4bit, MS justified 0 0 4bit, I S ompatible Table 5. K44 udio interface format setting * OIF of the K4 is set by the register. - 7 -

[K4-]. When connecting with the serial interface of UP, ROH & SHWRZ When using PORT9 (SP), nothing should be connected to PORT0 (IT). MLK is input from J (), IK LRK, and T are supplied from the K4. Set JP (OMLK) to the in order to supply MLK to the K4. JP9 IK JP0 LRK JP OMLK JP5 TST IT IT IT OMK TST lock Setting MLK is input from J (). JP0 () should be open. JP8 IV JP9 LK JP0 5 84 5 5 78. ll clocks are fed through the 0pin port When using PORT9 (SP), nothing should be connected to J () and PORT0 (IT). Set JP5 (TST) to the OMK in order to supply MLK to the K4. JP0 () should be short. MLK is supplied to the K4, and IK, LRK and T are supplied from the K4. JP9 IK JP0 LRK JP OMLK JP5 TST IT IT IT OMK TST (5-) SW setting Set SW according to the mode of the K4 PORT. SW No. Name ON ( H ) OFF ( L ) efault M/S Master Mode Slave Mode L M/S Master Mode Slave Mode L TST4 Fixed to L L Table. SW setting - 8 -

[K4-] Other jumper pins set up. JP (GN) : nalog ground and igital ground OPN: Separated. SHORT: ommon. (The connector GN can be open.) <efault>. JP (V) : V and V OPN: Separated. SHORT: ommon. (The connector V can be open.) <efault>. JP (V) : V and V OPN: Separated. SHORT: ommon. (The connector V can be open.) <efault> 4. JP4 (RG) : +5V and V OPN: Separated. SHORT: ommon. (The connector V can be open.) <efault> The regulator can be supplied.v to all circuits by shorting JP, and 4 and supplying 5V to +5V connector. The function of the toggle SW Upper-side is H and lower-side is L. [SW5] (SMUT): Soft mute of K4 [SW] (PN): Resets the K4. Keep H during normal operation. The K4 should be resets once bringing L upon power-up. [SW7] (PN): Resets the K44 (U). Keep H during normal operation. The K44 (U) should be resets once bringing L upon power-up. Keep L when K44 (U) is not used. [SW8] (PN): Resets the K44 (U). Keep H during normal operation. The K44 (U) should be resets once bringing L upon power-up. Keep L when K44 (U) is not used. [SW9] (PN): Resets the K44 (U4). Keep H during normal operation. The K44 (U4) should be resets once bringing L upon power-up. Keep L when K44 (U4) is not used. - 9 -

[K4-] Indication for L [L] (RF): Monitor INT0 pin of the K44 (U). L turns on when unlock or parity error occurs. [L] (RF): Monitor INT0 pin of the K44 (U). L turns on when unlock or parity error occurs. [L] (INT0): Monitor INT0 pin of the K4. [L4] (INT): Monitor INT pin of the K4. [L5] (INT): Monitor INT pin of the K4. Serial ontrol The K4 can be controlled via the printer port (parallel port) of IM-T compatible P. onnect PORT (TRL) with P by 0 wire flat cable packed with the K4-. 0 P onnect SN LK TI K4- TO 0 Wire Flat able 5 0pin onnector 0pin Header Figure. onnection of 0 wire flat cable - 0 -

[K4-] ontrol Software Manual Set-up of evaluation board and control software. Set up the K4- according to previous term.. onnect IM-T compatible P with K4- by 0-line type flat cable (packed with K4-). Take care of the direction of 0pin header. (Please install the driver in the -ROM when this control software is used on Windows 000/XP. Please refer Installation Manual of ontrol Software river by KM device control software. In case of Windows95/98/M, this installation is not needed. This control software does not operate on Windows NT.). Insert the -ROM labeled K4 valuation Kit into the -ROM drive. 4. ccess the -ROM drive and double-click the icon of K4-.exe to set up the control program. 5. Then please evaluate according to the follows. Operation flow Keep the following flow.. Set up the control program according to explanation above.. lick Port Setup button.. lick Write default button. Then set up the dialog and input data. xplanation of each buttons. [Port Setup] : Set up the printer port.. [Write default] : Initialize the register of K4.. [ll Read] : Read the all register of K4. 4. [Function] : ialog to write data by keyboard operation. 5. [Write] : ialog to write data by mouse operation.. [Read] : Read each register data by mouse operation. xplanation of each dialog. [Function ialog] : ialog to write data by keyboard operation ddress ox: ata ox: Input register address in figures of hexadecimal. Input register data in figures of hexadecimal. If you want to write the input data to K4, click OK button. If not, click ancel button.. [Write ialog] : ialog to write data by mouse operation There are dialogs corresponding to each register. lick the Write button corresponding to each register to set up the dialog. If you check the check box, data becomes H or. If not, L or 0. If you want to write the input data to K4, click OK button. If not, click ancel button. - -

[K4-] Indication of data Input data is indicated on the register map. Red letter indicates H or and blue one indicates L or 0. lank is the part that is not defined in the datasheet. - -

[K4-] MSURMNT RSULTS [Measurement condition] Measurement unit : udio Precision, System Two ascade Power Supply : V = V =.V and width : 0Hz FSO/ Temperature : Room Measurement Path : K4 PORT SR K4 PORT [Measurement Result] SR haracteristics Result Unit TH+N (Input = khz, 0dFS) FSO/FSI = 44.kHz/48kHz FSO/FSI = 48kHz/44.kHz FSO/FSI = khz/48khz FSO/FSI = 9kHz/kHz Worst ase (FSO/FSI = 48kHz/8kHz).5.4 4...7 d d d d d ynamic Range (Input = khz, 0dFS) FSO/FSI = 44.kHz/48kHz FSO/FSI = 48kHz/44.kHz FSO/FSI = khz/48khz FSO/FSI = 9kHz/kHz Worst ase (FSO/FSI = khz/44.khz) ynamic Range (Input = khz, 0dFS, -weighted) FSO/FSI = 44.kHz/48kHz 5. 5. 5. 5. 5.5 7. d d d d d d - -

[K4-] [Plots] -00 K4 TH + N vs Input Level FSI = 44.kHz, SFO = 48kHz, fin = khz -0-04 -0-08 -0 - d F S -4 - -8-0 - -4 - -8-0 akd4a.at7 Figure. TH+N vs. Input Level d F S -80-8.5-85 -87.5-90 -9.5-95 -97.5-00 -0.5-05 -07.5-0 -.5-5 -7.5-0 -.5-5 -7.5-0 K4 TH + N vs Input Frequency FSI = 44.kHz, SFO = 48kHz, Input = 0dFS akd4a.at7 Figure 4. TH+N vs. Input Frequency (Input = 0dFS) - 4 -

[K4-] d F S -80-8.5-85 -87.5-90 -9.5-95 -97.5-00 -0.5-05 -07.5-0 -.5-5 -7.5-0 -.5-5 -7.5-0 K4 TH + N vs Input Frequency FSI = 44.kHz, SFO = 48kHz, Input = -0dFS akd4a.at7 Figure 5. TH+N vs. Input Frequency (Input = -0dFS) +0 K4 Linearity FSI = 44.kHz, SFO = 48kHz, fin = khz -0-0 -0-40 -50 d F S -0-70 -80-90 -00-0 -0-0 akd4a.at7 Figure. Linearity - 5 -

[K4-] d F S +0-0. -0.4-0. -0.8 - -. -.4 -. -.8 - -. -.4 -. -.8 - -. -.4 -. -.8-4 K4 Frequency Response FSI = 44.kHz, SFO = 48kHz, Input = 0dFS akd4a.at7 d F S +0-0 -0-0 -40-50 -0-70 -80-90 -00-0 -0-0 -40-50 -0-70 -80 Figure 7. Frequency Response K4 FFT FSI = 44.kHz, SFO = 48kHz, Input = 0dFS, fin = khz akd4a.at7 Figure 8. FFT Plot (Input = 0dFS) - -

[K4-] +0 K4 FFT FSI = 44.kHz, SFO = 48kHz, Input = -0dFS, fin = khz -0-0 -0-40 -50-0 -70 d F S -80-90 -00-0 -0-0 -40-50 -0-70 -80 akd4a.at7 Figure 9. FFT Plot (Input = -0dFS) - 7 -

[K4-] RVISION HISTORY ate Manual oard Reason Page ontents (yy/mm/dd) Revision Revision 09/0/0 KM099400 0 First dition IMPORTNT NOTI These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of sahi Kasei M orporation (KM) or authorized distributors as to current status of the products. KM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of any information contained herein. ny export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. KM products are neither intended nor authorized for use as critical components Note) in any safety, life support, or other hazard related device or system Note), and KM assumes no responsibility for such use, except for the use approved with the express written consent by Representative irector of KM. s used here: Note) critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note) hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. It is the responsibility of the buyer or distributor of KM products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold KM harmless from any and all claims arising from the use of said product in the absence of such notification. - 8 -

V V PORT 0 9 8 4 7 5 TRL SN LK TI TO R 47k R 47k R 47k R4 470 R5 470 R 470 U Y Y 4 Y 5 4 Y4 5 Y5 7 Y 8 7 Y7 9 8 Y8 G 9 G 74LV54 8 7 5 4 N 48 R7 5 47 R8 5 4 45 44 OMLK 4 R9 5 LRK 4 IK STO R0 R R 5 5 5 4 40 9 INT 8 INT0 7 V PORT IN V GN TX 0u U TI LK 48 SN 47 VSS 4 V 45 VSS 44 + R 5 N OMLK 4 LRK 4 IK 4 STO 40 TX 9 8 INT 7 INT0 STIO N R4 5 STIO R5 5 TO IK 5 5 R 5 IK TST TST LRK 4 4 R7 5 LRK V INT 4 4 INT MLK R8 5 MLK PORT-IF R8 R9 R70 47K 47K 47K M/S M/S TST4 SW K4 4 5 5 7 8 5 7 8 TST TST M/S M/S K4 V VSS STI 0 IK 9 4 + 5 0u 0 9 R9 5 R0 5 STI IK SMUT 9 9 SMUT LRK 8 8 R 5 LRK V 0 0 TST4 PN 7 7 PN PORT V GN OUT J RX L 47u R4 470 OPT JP RX JP RX RX RX RX4 RX-4 RX RX RX RX4 7.n R 470 8.u TST5 FILT N4 VSS 9 0 0u 4 V + TST 5 RX 7 TST7 8 RX TST8 9 0 RX TST9 RX4 TST0 TST 4 VSS R 5 R k 5 JP GN nalog Ground igital Ground R5 75 N 4 5 7 8 9 0 4 V RX RX RX RX4 Title K4- Size ocument Number Rev K4 0 ate: Monday, March, 009 Sheet of - 9 -

V For K4 PORT J R 5 JP7 LK PR 0 L U4 7474 Q 9 Q 8 U Q 4 4 Q 5 Q Q RO 5 7 NP 0 NT LK 9 LO LR 74 PR 4 Q 5 JP4 5 5 LK U5 5 JP5 0 4fs 78 Q LK Q 9 LK Q 7 RST Q IV 84 Q4 5 fs Q5 Q Q7 4 fs Q8 Q9 Q0 4 Q 5 Q 74H4040 L U4 7474 JP FS U G V 4 GN 7 4 G Y 5 0 G Y 9 Y 8 4G 4 4Y 74VH5 V -MLK -IK -LRK U 74H4 V U8 V For K4 PORT J R7 5 JP0 LK PR 0 L U 4 5 U9 7474 Q 9 Q 8 Q 4 Q Q Q RO 5 7 NP 0 NT LK 9 LO LR 74 PR 4 U9 7474 Q 5 JP8 5 5 LK U0 5 JP9 0 LK Q 9 4fs 78 Q LK Q 7 RST Q IV 84 Q4 5 Q5 Q Q7 4 fs Q8 Q9 Q0 4 Q 5 Q 74H4040 L G V 4 GN 7 4 G Y 5 0 G Y 9 Y 8 4G 4 4Y 74VH5 -MLK -IK -LRK 4 U 74H4 Title K4- Size ocument Number Rev xternal lock 0 ate: Monday, March, 009 Sheet of - 0 -

V V HSU9 R 0k PORT4 V GN OUT 5 L 47u + 4 0u SW7 PN L H 0 U7 74H4 9 8 U7 74H4 44-PN R8 470 + 7 0.47u R9 8k PORT-IF0 U IPS0 N IF0 4 TST 48 RX N 47 4 RX U7 5 74H4 R0 L k RF PORT-OKS IK LRK STI IK LRK STI PORT5 0 9 8 4 7 5 SP PORT-IF 44-PN PORT-IF JP IK 9 OKS IF0 IF IF 4 V 0u R7 R7 R7 R74 47K 47K 47K 47K PORT-OKS PORT-IF0 PORT-IF PORT-IF Title K4- Size ocument Number Rev PORT 0 ate: Monday, March, 009 Sheet of + 45 TST 44 RX N 4 4 RX0 VSS 4 VOM 40 R 9 V 8 7 INT INT0 OKS0 OKS M 5 4 R 00 R 00 R 00 5 IF M0 R4 0k R5 0k R 0k N K44 PN 7 IF XTI 0 8 IPS XTO 9 U7 74H4 4 U7 74H4 9 0 P/SN XTL0 UX 8 MKO 7 XTL VIN TV VSS 8 + J4 R7 5 JP 4 TX0 5 TX OUT 7 OUT 8 UOUT 9 VOUT 0 V VSS MKO 4 LRK IK STO 5 JP STO JP4 LRK SW PORT 8 7 5 0 0u U7F 74H4 - -

V V PORT V GN OUT L 47u R8 470 + + 0u 4 5 0.47u R9 8k SW8 PN 4 HSU9 L H R4 0k 0 U 74H4 9 8 U 74H4 44-PN U IPS0 48 RX N 47 4 RX 45 TST 44 RX N 4 4 RX0 VSS 4 VOM 40 R 9 V 8 7 INT INT0 U 74H4 5 R40 k L RF PORT-IF0 PORT-IF PORT-IF 4 5 7 8 9 N IF0 TST IF N IF IPS P/SN K44 OKS0 5 OKS 4 M M0 PN XTI 0 XTO 9 UX 8 PORT-OKS 44-PN p X.89MHz 7 p MLK IK LRK STIO R45 0k R4 0k R47 0k R4 00 R4 00 R4 00 R44 00 R48 0k MLK IK LRK STIO PORT7 0 9 8 4 7 5 SP 0 XTL0 XTL VIN TV VSS 8 4 TX0 5 TX OUT 7 OUT 8 UOUT 9 VOUT 0 V VSS 9 MKO 4 LRK MKO 7 IK STO 5 JP5 STIO JP IK -IK R75 R7 R77 R78 47K 47K 47K 47K OKS IF0 IF IF 4 SW PORT 8 7 5 V PORT-OKS PORT-IF0 PORT-IF PORT-IF 0 0u 0u JP7 LRK PORT8 IN V GN IT + + UF 74H4 JP8 MLK -LRK -MLK Title K4- Size ocument Number Rev PORT 0 ate: Monday, March, 009 Sheet 4 of - -

V V + 0u 5 HSU9 R5 0k + 4 5 0.47u R49 8k SW9 PN L H U5 74H4 4 U5 74H4 44-PN U4 IPS0 48 RX N 47 4 RX 45 TST 44 RX N 4 4 RX0 VSS 4 VOM 40 R 9 V 8 7 INT INT0 TST JP5 TST TST PORT-IF0 PORT-IF 4 5 7 8 9 N IF0 TST IF N IF IPS P/SN K44 OKS0 5 OKS 4 PORT-OKS M M0 PN 44-PN p XTI 0 X 4.57MHz XTO 9 7 p UX 8 OMLK IK LRK STO R54 0k R55 0k R5 0k R50 00 R5 00 R5 00 R5 00 R57 0k OMK PORT9 OMLK 0 IK LRK 9 8 STO 4 7 5 SP 0 XTL0 MKO 7 XTL IK IT VIN TV VSS TX0 TX OUT OUT UOUT VOUT V VSS MKO LRK STO 5 JP9 IK -IK OKS IF0 SW4 PORT 4 V 8 4 5 7 8 9 0 9 4 IT R R7 47K 47K PORT-OKS PORT-IF0 40 0u 4 0u JP0 LRK PORT0 IN V GN IT 4 + + IT JP OMLK -LRK -MLK - - Title K4- Size ocument Number Rev PORT 0 ate: Monday, March, 009 Sheet 5 of

V HSU9 R58 0k SW5 SMUT L H 4 5 U5 74H4 9 8 U5 74H4 SMUT V L INT0 R59 k U7 74H4 INT0 V L4 INT R0 k 4 U7 74H4 INT HSU9 R 0k INT SW PN L H PN L5 INT R k 5 U7 74H4 44 U5F 74H4 0 U5 74H4 V V V +5V U7 74H4 9 8 4 48 For 74H4 x 4, 74H4040 x, 7474 x, 74 x, 74LV54 x 49 50 5 5 5 54 55 5 57 58 47u + JP V V 59 47u + L4 (short) JP V V L5 (short) + 0 47u JP4 RG 45 T T48MF OUT GN IN 4 47 47u + U7 74H4 0 U7F 74H4 Title K4- Size ocument Number Rev 0 Power Supply ate: Monday, March, 009 Sheet of - 4 -

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