LABORATORY #3 QUARTZ CRYSTAL OSCILLATOR DESIGN OBJECTIVES 1. To design and DC bias the JFET transistor oscillator for a 9.545 MHz sinusoidal signal. 2. To simulate JFET transistor oscillator using MicroCap software. 3. To measure the open circuit gain frequency response of the oscillator in the frequency range of 7.5 MHz to 12.5 MHz 4. To determine the upper and lower cutoff frequencies using a graphical method, and calculate Q-factor of the oscillator circuit. 5. To build and test 9.545 MHz Quartz crystal oscillator using a supply voltage of 12V. INFORMATION It is often required to produce a signal where the frequency is very stable and exactly known. It is relatively simple to make an oscillator that produces some sort of a signal, but another matter to produce one of relatively precise frequency and stability. AM radio stations must have a carrier frequency accurate within 10Hz of its assigned frequency, which may be from 530 to 1710 khz. SSB radio systems used in the HF range (2-30 MHz) must be within 50 Hz of channel frequency for acceptable voice quality, and within 10 Hz for best results. An oscillator is basically an amplifier and a frequency selective feedback network (Figure 3.1). Where at a particular frequency, the loop gain is unity or more, and the total phase shift at this frequency is zero. These are the conditions required for oscillation. The feedback network determines the frequency and stability of the generated signal. AMPLIFIER + GAIN A OUTPUT OUT - Α β>1 FEEDBACK GAIN β Figure 3.1. Oscillator diagram 1. Quartz oscillator resonance contour. The quartz crystal is the most widely used frequency-determining element. It is relatively cheap, widely available, and comes in frequencies from audio to low UHF. Frequencies in the HF range (2-30 MHz) are most common. 3-1
Figure 3.2 is an approximate equivalent circuit of a quartz crystal. This circuit is a pretty good approximation near the crystal resonant frequency. It has two fundamental resonances, one series, the other parallel (antiresonant) see Figure 3.3. C1 L 1 2 Rs C2 Figure 3.2. a) Crystal equivalent circuit and b) Crystal symbol The resonance of a series RLC circuit occurs when the inductive and capacitive reactances are equal in magnitude but cancel each other because they are 180 degrees apart in phase. The sharp minimum in impedance, which occurs, is useful in tuning applications. The sharpness of the minimum depends on the value of R and is characterized by the "Q- factor" of the circuit. This property of the quartz resonator with series resonance is going to be used in our circuit design. Parallel Resonance Anti Resonance Series Resonance Frequency Figure 3.3. Frequency response of the Quartz crystal resonator 2. JFET oscillator DC biasing Before starting the JFET oscillator biasing, you should obtain input and output characteristics of your JFET transistor, using the PC Characteristic Curve Tracer located in SEB 3108. Following the described procedure, determine the operational Q-point for the JFET transistor and calculate necessary component values for DC biasing. Figure 3.4 shows typical input characteristics of a JFET transistor. Using this diagram, you can set the quiescent operating point of the JFET transistor as follows: For I D = ½ I DSS, find the value of V GS : In our example I DSS = 4.8 ma and the DC operating point conditions (V S, V G and V GS ) will be determined for I D = ½ I DSS = 2.4 ma. 3-2
I DSS ½ I DSS V P Figure 3.4. Typical JFET Input characteristics Since the oscillator is built at the base of a Common Gate (CG) JFET configuration, the Gate is connected to the ground potential and V G =0V (see Figure 3.5), V S = V G -V GS = 0.8V Equation 3.1. Knowing the values for I D = 2.4mA and V S = 0.8V one can calculate R S. JFET values will be different. VS R s = Equation 3.2. I D V GS 3. JFET oscillator circuit The circuit diagram of the JFET oscillator is shown in Figure 3.5. This circuit is built with a 2N5457 N-channel JFET transistor, which is provided in your parts kit. 9.545 Mhz Figure 3.5. JFET oscillator circuit diagram (with optional trimmer capacitor omitted). As per the note of the following page it is best to put a Cap Trimmer in parallel with C1. 3-3
In order to calculate the values of the circuit components L, C1 and C2, one has to determine the gain A V of the amplifier to determine the value of the feedback gain β as it is shown in Figure 3.1. From the theory, the gain A V of Common Gate JFET amplifier is determined by finding g m of the configuration. This is found using the graphical method where g m is the slope of the tangent to the transistor transfer curve (e.g., as in Figure 3.4). For a given g m, we can find the gain of the circuit as: A = v gmr 1 Equation 3.3. From this, we can derive a value of β using the following bounds which satisfies the feedback condition for self-oscillation: A V * β > 1 and β < 0.52 Equation 3.4. Select a suitable β, which satisfies the condition. In this case, you shouldn t choose β value very close to 0.52 because of some approximations during the calculations and possible variations in JFET parameters, so use β around 0.2 for your further calculations. To find the exact values of the C1 and C2 use the following set of formulas: C C + C 2 β = Equation 3.5. 1 2 C + C = LC C 2 1 2 ω Equation 3.6. 1 2 VARIABLE CAPACITOR NOTE: In order to make tuning the oscillator faster and simpler, you may place a variable capacitor in parallel with either C1 or C2. It is advised that the variable capacitor be placed in parallel to C1. This is because C1 tunes the frequency, while C2 is used to tune the gain of the oscillator. As in Lab 1, the variable capacitor has a range of 5-65pF, and thus a midpoint of approximately 30pF. If you choose to use a variable capacitor in your oscillator design, make sure you consider the total capacitance of both the variable capacitor, and either C1 or C2, in your pre-lab calculations. EQUIPMENT 1. Digital multimeter BK PRECISION 2831B 2. Digital oscilloscope Tektronix TDS 3012 3. Function Generator STANFORD DS345. 4. Construction breadboard 5. DC Power Supply 3-4
PRE-LABORATORY PREPARATION The lab preparation must be completed before coming to the lab. Show it to your TA for checking and grading at the beginning of the lab and get his/her signature. 1. JFET oscillator calculations 1.1. Print the input characteristics of your JFET transistor, using the PC Characteristic Curve Tracer in SEB3108. Following the described procedure, determine the operational Q-point for the JFET transistor. Attach the printout to your Lab Measurements Sheet (LMS). 1.2. Calculate R S value for the DC biasing in section 1 of the LMS. 1.3. Using graphical method, calculate g m value from the input characteristics of the JFET in section 2 of the LMS. 1.4. Using the provided inductor L=15uH, calculate the circuit gain A V and the value of the capacitors C1 and C2 in order to achieve the circuit resonance at f 0 = 9.545 MHz. Show your calculations in section 3 of the LMS. 2. MicroCap simulations 2.1. Simulate the circuit of Figure 3.6 in MicroCap. Include calculated Rs, C1 and C2. Use 2N5545 JFET transistor model in your simulations. In order to check the frequency response of the oscillator you have to connect to the Source of the JFET a sinusoidal voltage source V2 with 1V amplitude operating at a frequency of 9.545MHz. 2.2. Using MicroCap Probe DC Analysis check and print DC biasing conditions of this circuit, including DC voltages and DC currents. Enter the DC biasing parameters in Table 3.1 at LMS. Because of the different transistor model, you might get DC values different (within 10-15%) than calculated. This is acceptable for the simulation. Use 12 V for DC analysis settings. Compare DC values to JFET curve. 2.3. Using the MicroCap AC analysis function print the gain frequency response for this circuit from 7.5 MHz to 12.5MHz, find the (-3dB) points and calculate the Q-factor of this circuit. Fill the results in Table 3.3. Bring these plots with you to the lab session for comparing with the experimental data. 2.4. Using MicroCap Transient analysis funtion print the output waveform at the output node, i.e., R1. Figure 3.6. Gain frequency response test 3-5
PROCEDURE 1. DC biasing the Oscillator. 1.1.Build the circuit in Figure 3.7 using the component values calculated in the pre-lab. Use standard parts when building the oscillator. Avoid using multiple resistors to match the specified values. Also, measure the actual value of the resistors using the multi-meter, before connecting them to the circuit. Figure 3.7. DC biasing check 1.2.At this initial stage, connect ONLY the components related to the DC biasing, as it is shown in Figure 3.7. This will make your design easy to manage and modify. 1.3.Connect the DC power supply and measure the DC voltages at Gate and Source. Also, calculate the drain current and record the measured values in Table 3.1. Compare your measurements with the Pre-Lab and comment on discrepancies. 1.4.If you don t measure the correct DC voltages, check the resistors values and correct connection of each of them to the circuit. 1.5.Show the circuit and the collected data to your TA, and get his/her signature to proceed with the experiment. 2. Open circuit gain test. 2.1. Connect the external generator as it is shown in Figure 3.6 with a input voltage of around Vin=300mV Pk-Pk. Sweep the frequency in a range from 7.5 MHz to 12.5MHz and check the output signal over the load resistor. Record your measurements in Table 3.2. Plot the measured gain frequency response of this circuit on top of your MicroCap printout. 2.2. Calculate the measured Q-factor and Compare the measured gain at 9.545MHz with the calculated gain in section 6 of LMS. Adjust the gain if it is too low. 2.3. Properly tuned and biased oscillator circuit resonance contour should provide maximum Vout= 4Vp-p at 9.545MHz. 2.4.In case of a maximum output at a different frequency then 9.545MHz, tune the resonance frequency by varying the C1 value. 2.5.Show the circuit and the collected data to your TA, and get his/her signature to proceed with the experiment. 3-6
3. Self-oscillation test without quartz crystal feedback 3.1. Build the oscillator with a wired feedback connection, as it is shown in Figure 3.8. Check and tune the output signal to be Vout= 4Vp-p at 9.545MHz. If the frequency needs adjustment tune C1. If the output level is not sufficient tune C2. 3.2. Record the measured values of Vout and frequency in Table 3.4. Figure 3.8. Self-oscillation test 3.3.Show the circuit and the collected data to your TA and get his/her signature to proceed with the experiment. 4. Self-oscillation test with quartz crystal feedback 4.1. Build the oscillator with a quartz crystal feedback connection, as it is shown in Figure 3.5. Check and tune the output signal to be Vout= 4Vp-p at 9.545MHz. 4.2. Record the measured values of Vout and frequency in Table 3.4. 3-7
Lab Measurements Sheet LAB #3 QUARTZ CRYSTAL OSCILLATOR DESIGN Name Student No Workbench No NOTE: Questions are related to observations, and must be answered as a part of the procedure of this experiment. Sections marked * are pre-lab preparation and must be completed BEFORE coming to the lab. 1. Calculate R S value for the DC biasing*: 2. Using graphical method, calculate g m value from the input characteristics of the JFET*: 3. Calculate the gain A V and the value of the capacitors C1 and C2* 3-8
4. DC biasing Table 3.1. PRELAB* MEASURED Vd [V] Vs [V] V GS [V] Id [ma] 5. Frequency response of the Oscillator. Table 3.2 Lab measurements f [MHz] Vin [V] Vout [V] Av[dB] 7.500 8.000 8.500 8.800 9.000 9.200 9.400 9.500 9.545 9.600 9.700 9.900 10.100 10.300 10.500 11.000 12.500 Compare the gain, Av, measured from transient analysis at 9.545MHz with the calculated gain in section 3 of LMS. Then measure these with the gain measured at 9.545MHz: 6. Q-factor calculations for the oscillator*: Table 3.3. PRELAB * MEASURED f1 [Hz] f2 [Hz] Q-factor 3-9
Compare and comment on possible differences in calculated and measured Q-factor of oscillator: 7. Oscillator output parameters Table 3.4. Wired feedback Quartz feedback Vout [Vp-p] fo [MHz] MARKING SHEET To be completed by TA during the lab session. TA name: Check Boxes Max Marks Granted Marks TA Signature 30 Pre-lab preparation Student Task 10 DC biasing completed and data collected 20 AC frequency response completed and data collected 10 Self-oscillation completed and data collected 10 Complete circuit measured and data collected 20 Data collected and observations made 100 TOTAL 3-10