i4483ey P-Channel 30-V (-) MOFET PROUCT UMMARY V (V) R (on) (Ω) I (A) 0.0085 at V G = - 0 V - 4-30 0.04 at V G = - 4.5 V - FEATURE Halogen-free According to IEC 649-- Available TrenchFET Power MOFET E Protection: 3000 V APPLICATION Notebook PC - Load witch - Adapter witch O-8 8 7 3 6 G 4 5 G 700 Ω Top View Ordering Information: i4483ey-t-e3 (Lead (Pb)-free) i4483ey-t-ge3 (Lead (Pb)-free and Halogen-free) P-Channel ABOLUTE MAXIMUM RATING T A = 5 C, unless otherwise noted Parameter ymbol 0 s teady tate Unit rain-ource Voltage V - 30 V Gate-ource Voltage V G ± 5 Continuous rain Current (T J = 50 C) a T A = 5 C - 4-0 I T A = 70 C - - 8 A Pulsed rain Current I M - 50 Continuous ource Current (iode Conduction) a I -.7 -.36 T A = 5 C Maximum Power issipation a 3.0.5 P W T A = 70 C.9 0.95 Operating Junction and torage Temperature Range T J, T stg - 55 to 50 C THERMAL REITANCE RATING Parameter ymbol Typical Maximum Unit Maximum Junction-to-Ambient a t 0 s 33 4 R thja teady tate 70 85 C/W Maximum Junction-to-Foot (rain) teady tate R thjf 6 Notes: a. urface Mounted on " x " FR4 board. ocument Number: 786-83038-Rev., -ec-08
i4483ey PECIFICATION T J = 5 C, unless otherwise noted Parameter ymbol Test Conditions Min. Typ. Max. Unit tatic Gate Threshold Voltage V G(th) V = V G, I = - 50 µa -.0-3.0 V V = 0 V, V G = ± 4.5 V ± µa Gate-Body Leakage I G V = 0 V, V G = ± 5 V ± 0 ma V = - 30 V, V G = 0 V - Zero Gate Voltage rain Current I V = - 30 V, V G = 0 V, T J = 70 C - 0 µa On-tate rain Current a I (on) V = - 5 V, V G = - 0 V - 30 A V G = - 0 V, I = - 4 A rain-ource On-tate Resistance a 0.007 0.0085 R (on) V G = - 4.5 V, I = - A 0.05 0.04 Ω Forward Transconductance a g fs V = - 5 V, I = - 4 A 60 iode Forward Voltage a V I = -.7 A, V G = 0 V - 0.74 -. V ynamic b Turn-On elay Time t d(on) 0 5 Rise Time t r V = - 5 V, R L = 5 Ω 0 30 Turn-Off elay Time t d(off) I - A, V GEN = - 0 V, R g = 6 Ω 4 65 µs Fall Time t f 50 80 Notes: a. Pulse test; pulse width 300 µs, duty cycle %. b. Guaranteed by design, not subject to production testing. tresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TYPICAL CHARACTERITIC 5 C, unless otherwise noted 8 00 0 I G - Gate Current (ma) 6 4 I G - Gate Current (ma) 0. 0.0 T J = 50 C T J = 5 C 0.00 0 0 5 0 5 0 5 30 0.000 0 6 8 4 30 V G - Gate-to-ource Voltage (V) Gate-Current vs. Gate-ource Voltage V G - Gate-to-ource Voltage (V) Gate Current vs. Gate-ource Voltage ocument Number: 786-83038-Rev., -ec-08
i4483ey TYPICAL CHARACTERITIC 5 C, unless otherwise noted 50 50 40 V G = 0 thru 4 V 3 V 40 I - rain Current (A) 30 0 0 I - rain Current (A) 30 0 0 T C = 5 C 5 C - 55 C 0 0 3 4 5 V - rain-to-ource Voltage (V) Output Characteristics 0.00 0 0.0 0.5.0.5.0.5 3.0 3.5 V G - Gate-to-ource Voltage (V) Transfer Characteristics.6 - On-Resistance (Ω) R (on) 0.06 0.0 0.008 0.004 V G = 4.5 V V G = 0 V R (on) - On-Resistance (Normalized).4..0 0.8 0.000 0 0 0 30 40 50 I - rain Current (A) On-Resistance vs. rain Current 0.6-50 - 5 0 5 50 75 00 5 50 T J - Junction Temperature ( C) On-Resistance vs. Junction Temperature 50 0.05 I - ource Current (A) 0 T J = 50 C T J = 5 C - On-Resistance (Ω) R (on) 0.04 0.03 0.0 0.0 I = 4 A 0. 0.0 0. 0.4 0.6 0.8.0. V - ource-to-rain Voltage (V) ource-rain iode Forward Voltage 0.00 0 4 6 8 0 V G - Gate-to-ource Voltage (V) On-Resistance vs. Gate-to-ource Voltage ocument Number: 786-83038-Rev., -ec-08 3
i4483ey TYPICAL CHARACTERITIC 5 C, unless otherwise noted 0.8 50 0.6 I = 50 µa 40 Variance (V) V G(th) 0.4 0. 0.0 Power (W) 30 0-0. 0-0.4-50 - 5 0 5 50 75 00 5 50 T J - Temperature ( C) Threshold Voltage 0 0.0 0. 0 00 600 Time (s) ingle Pulse Power 00 Limited by R (on)* I - rain Current (A) 0 0. T C = 5 C ingle Pulse ms 0 ms 00 ms s 0 s C 0.0 0. 0 00 V - rain-to-ource Voltage (V) * V G > minimum V G at which r (on) is specified afe Operating Area, Junction-to-Case Normalized Effective Transient Thermal Impedance t uty Cycle = 0.5 0. Notes: 0. 0. P M 0.05 t t. uty Cycle, = t 0.0. Per Unit Base = R thja = 70 C/W ingle Pulse 3. T JM - T A = P M Z (t) thja 4. urface Mounted 0.0 0-4 0-3 0-0 - 0 00 600 quare Wave Pulse uration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient 4 ocument Number: 786-83038-Rev., -ec-08
i4483ey TYPICAL CHARACTERITIC 5 C, unless otherwise noted Normalized Effective Transient Thermal Impedance 0. uty Cycle = 0.5 0. 0. 0.05 0.0 0.0 0-4 ingle Pulse 0-3 0-0 - 0 quare Wave Pulse uration (s) Normalized Thermal Transient Impedance, Junction-to-Foot maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for ilicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see /ppg?786. ocument Number: 786-83038-Rev., -ec-08 5
Package Information OIC (NARROW): 8-LEA JEEC Part Number: M-0 8 7 6 5 E H 3 4 A 0.5 mm (Gage Plane) h x 45 C All Leads e B A L q 0.0 mm 0.004" MILLIMETER INCHE IM Min Max Min Max A.35.75 0.053 0.069 A 0.0 0.0 0.004 0.008 B 0.35 0.5 0.04 0.00 C 0.9 0.5 0.0075 0.00 4.80 5.00 0.89 0.96 E 3.80 4.00 0.50 0.57 e.7 BC 0.050 BC H 5.80 6.0 0.8 0.44 h 0.5 0.50 0.00 0.00 L 0.50 0.93 0.00 0.037 q 0 8 0 8 0.44 0.64 0.08 0.06 ECN: C-0657-Rev. I, -ep-06 WG: 5498 ocument Number: 79 -ep-06
VIHAY ILICONIX TrenchFET Power MOFETs Application Note 808 Mounting LITTLE FOOT, O-8 Power MOFETs Wharton Mcaniel urface-mounted LITTLE FOOT power MOFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. ee Application Note 86, Recommended Minimum Pad Patterns With Outline rawing Access for MOFETs, (http:///ppg?786), for the basis of the pad design for a LITTLE FOOT O-8 power MOFET. In converting this recommended minimum pad to the pad set for a power MOFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. In the case of the O-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOFET for a single MOFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are 0.00 inches wide. ince the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board. 0.050.7 0.07 0.69 0.078.98 0.88 7.3 0. 5.07 Figure. ingle MOFET O-8 Pad Pattern With Copper preading 0.96 5.0 0.050.7 0.07 0.69 0.078.98 0.88 7.3 0. 5.07 0.088.5 0.088.5 Figure. ual MOFET O-8 Pad Pattern With Copper preading The minimum recommended pad patterns for the single-mofet O-8 with copper spreading (Figure ) and dual-mofet O-8 with copper spreading (Figure ) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose. ince surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, thermal connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.00 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. APPLICATION NOTE ocument Number: 70740 Revision: 8-Jun-07
Application Note 86 RECOMMENE MINIMUM PA FOR O-8 0.7 (4.369) 0.08 (0.7) APPLICATION NOTE 0.047 (.94) 0.46 (6.48) 0.5 (3.86) 0.0 (0.559) 0.050 (.70) Recommended Minimum Pads imensions in Inches/(mm) Return to Index Return to Index ocument Number: 7606 Revision: -Jan-08
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