3.3V / 5V EL :2 ifferential Fanout Buffer escription The M0/00EP is a differential :2 fanout buffer. The device is pin and functionally equivalent to the LVEL device. With performance much faster than the LVEL device, the EP is ideal for applications requiring the fastest performance available. The 00 Series contains temperature compensation. Features 220 ps Typical Propagation elay Maximum lock Frequency > 3 GHz Typical PEL Mode Operating Range: V = 3.0 V to 5.5 V with V EE = 0 V NEL Mode Operating Range: V = 0 V with V EE = 3.0 V to 5.5 V Open Input efault State Safety lamp on Inputs Q Outputs Will efault LOW with Inputs Open or at V EE Pb Free Packages are vailable SOI SUFFIX SE 75 TSSOP T SUFFIX SE 94R MRKING IGRMS* HEP LYW HP LYW KEP LYW KP LYW FN MN SUFFIX SE 506 2Z M 4 H K 5K 2Z M = M0 = M00 = M0 = M00 = ate ode L Y W = ssembly Location = Wafer Lot = Year = Work Week = Pb Free Package (Note: Microdot may be in either location) *For additional marking information, refer to pplication Note N002/. ORERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. Semiconductor omponents Industries, LL, 200 ugust, 200 Rev. 9 Publication Order Number: M0EP/
Q0 V Table. PIN ESRIPTION PIN FUNTION *, ** EL ata Inputs Q0 2 7 Q0, Q0, Q, Q EL ata Outputs R V V EE Positive Supply Negative Supply Q 3 R 2 R 6 EP (FN only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GN) or leave unconnected, floating open. Q 4 5 V EE * Pins will default LOW when left open. ** Pins will default to high when left open. Figure. Lead Pinout (Top View) and Logic iagram Table 2. TTRIBUTES s Internal Input Pulldown Resistor Internal Input Pullup Resistor ES Protection Human Body Model Machine Model harged evice Model Value 75 k 37.5 k > 4 kv > 200 V > 2 kv Moisture Sensitivity, Indefinite Time Out of rypack (Note ) Pb Pkg Pb Free Pkg SOI TSSOP FN Level Level Level Level Level 3 Level Flammability Rating Oxygen Index: 2 to 34 UL 94 V 0 @ 0.25 in Transistor ount Meets or exceeds JEE Spec EI/JES7 I Latchup Test. For additional information, see pplication Note N003/. 73 evices 2
Table 3. MXIMUM RTINGS Parameter ondition ondition 2 Rating Unit V PEL Mode Power Supply V EE = 0 V 6 V V EE NEL Mode Power Supply V = 0 V 6 V V I PEL Mode Input Voltage NEL Mode Input Voltage V EE = 0 V V = 0 V I out Output urrent ontinuous Surge V I V 6 V I V EE 6 T Operating Temperature Range 40 to +5 T stg Storage Temperature Range 65 to +50 J Thermal Resistance (Junction to mbient) 0 lfpm 500 lfpm SOI SOI J Thermal Resistance (Junction to ase) Standard Board SOI 4 to 44 J Thermal Resistance (Junction to mbient) 0 lfpm 500 lfpm TSSOP TSSOP J Thermal Resistance (Junction to ase) Standard Board TSSOP 4 to 44 J Thermal Resistance (Junction to mbient) 0 lfpm 500 lfpm FN FN 50 00 90 30 5 40 29 4 V V m m T sol Wave Solder Pb Pb Free <2 to 3 sec @ 24 <2 to 3 sec @ 260 265 265 J Thermal Resistance (Junction to ase) (Note 2) FN 35 to 40 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating onditions is not implied. Extended exposure to stresses above the Recommended Operating onditions may affect device reliability. 2. JEE standard multilayer board 2S2P (2 signal, 2 power) Table 4. 0EP HRTERISTIS, PEL V = 3.3 V, V EE = 0 V (Note 3) 40 25 5 Min Typ Max Min Typ Max Min Typ Max Unit I EE Negative Power Supply urrent 20 29 37 20 30 39 22 3 40 m V OH Output HIGH Voltage (Note 4) 265 2290 245 2230 2355 240 2290 245 2540 mv V OL Output LOW Voltage (Note 4) 365 490 65 430 555 60 490 65 740 mv V IH Input HIGH Voltage (Single Ended) 2090 245 255 240 225 2540 mv V IL Input LOW Voltage (Single Ended) 365 690 430 755 490 5 mv V IHMR Input HIGH Voltage ommon Mode Range (ifferential onfiguration) (Note 5) 2.0 3.3 2.0 3.3 2.0 3.3 V I IH Input HIGH urrent 50 50 50 I IL Input LOW urrent NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit 3. Input and output parameters vary : with V. V EE can vary +0.3 V to 2.2 V. 4. ll loading with 50 to V 2.0 V. 5. V IHMR min varies : with V EE, V IHMR max varies : with V. The V IHMR range is referenced to the most positive side of the differential 3
Table 5. 0EP HRTERISTIS, PEL V = 5.0 V, V EE = 0 V (Note 6) 40 25 5 Min Typ Max Min Typ Max Min Typ Max Unit I EE Negative Power Supply urrent 20 29 37 20 30 39 22 3 40 m V OH Output HIGH Voltage (Note 7) 365 3990 45 3930 4055 40 3990 45 4240 mv V OL Output LOW Voltage (Note 7) 3065 390 335 330 3255 330 390 335 3440 mv V IH Input HIGH Voltage (Single Ended) 3790 45 355 40 395 4240 mv V IL Input LOW Voltage (Single Ended) 3065 3390 330 3455 390 355 mv V IHMR Input HIGH Voltage ommon Mode 2.0 5.0 2.0 5.0 2.0 5.0 V Range (ifferential onfiguration) (Note ) I IH Input HIGH urrent 50 50 50 I IL Input LOW urrent NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit 6. Input and output parameters vary : with V. 7. ll loading with 50 to V 2.0 V.. V IHMR min varies : with V EE, V IHMR max varies : with V. The V IHMR range is referenced to the most positive side of the differential Table 6. 0EP HRTERISTIS, NEL V = 0 V; V EE = 5.5 V to 3.0 V (Note 9) 40 25 5 Min Typ Max Min Typ Max Min Typ Max Unit I EE Negative Power Supply urrent 20 29 37 20 30 39 22 3 40 m V OH Output HIGH Voltage (Note 0) 35 00 5 070 945 20 00 5 760 mv V OL Output LOW Voltage (Note 0) 935 0 65 70 745 620 0 65 560 mv V IH Input HIGH Voltage (Single Ended) 20 5 45 20 05 760 mv V IL Input LOW Voltage (Single Ended) 935 60 70 545 0 45 mv V IHMR Input HIGH Voltage ommon Mode Range (ifferential onfiguration) (Note ) V EE + 2.0 0.0 V EE + 2.0 0.0 V EE + 2.0 0.0 V I IH Input HIGH urrent 50 50 50 I IL Input LOW urrent NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit 9. Input and output parameters vary : with V. 0.ll loading with 50 to V 2.0 V.. V IHMR min varies : with V EE, V IHMR max varies : with V. The V IHMR range is referenced to the most positive side of the differential 4
Table 7. 00EP HRTERISTIS, PEL V = 3.3 V, V EE = 0 V (Note 2) 40 25 5 Min Typ Max Min Typ Max Min Typ Max I EE Negative Power Supply urrent 26 35 44 26 35 44 26 35 46 m V OH Output HIGH Voltage (Note 3) 255 220 2405 255 220 2405 255 220 2405 mv V OL Output LOW Voltage (Note 3) 355 40 605 355 40 605 355 40 605 mv V IH Input HIGH Voltage (Single Ended) 2075 2420 2075 2420 2075 2420 mv V IL Input LOW Voltage (Single Ended) 355 675 355 675 355 675 mv V IHMR Input HIGH Voltage ommon Mode Range (ifferential 2.0 3.3 2.0 3.3 2.0 3.3 V onfiguration) (Note 4) I IH Input HIGH urrent 50 50 50 I IL Input LOW urrent NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit 2.Input and output parameters vary : with V. V EE can vary +0.3 V to 2.2 V. 3.ll loading with 50 to V 2.0 V. 4.V IHMR min varies : with V EE, V IHMR max varies : with V. The V IHMR range is referenced to the most positive side of the differential Unit Table. 00EP HRTERISTIS, PEL V = 5.0 V, V EE = 0 V (Note 5) 40 25 5 Min Typ Max Min Typ Max Min Typ Max I EE Negative Power Supply urrent 26 35 44 26 35 44 26 35 46 m V OH Output HIGH Voltage (Note 6) 355 390 405 355 390 405 355 390 405 mv V OL Output LOW Voltage (Note 6) 3055 30 3305 3055 30 3305 3055 30 3305 mv V IH Input HIGH Voltage (Single Ended) 3775 420 3775 420 3775 420 mv V IL Input LOW Voltage (Single Ended) 3055 3375 3055 3375 3055 3375 mv V IHMR Input HIGH Voltage ommon Mode Range (ifferential onfiguration) (Note 7) 2.0 5.0 2.0 5.0 2.0 5.0 V I IH Input HIGH urrent 50 50 50 I IL Input LOW urrent NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit 5.Input and output parameters vary : with V. V EE can vary +2.0 V to V. 6.ll loading with 50 to V 2.0 V. 7.V IHMR min varies : with V EE, V IHMR max varies : with V. The V IHMR range is referenced to the most positive side of the differential Unit 5
Table 9. 00EP HRTERISTIS, NEL V = 0 V; V EE = 5.5 V to 3.0 V (Note ) 40 25 5 Min Typ Max Min Typ Max Min Typ Max I EE Negative Power Supply urrent 26 35 44 26 35 44 26 35 46 m V OH Output HIGH Voltage (Note 9) 45 020 95 45 020 95 45 020 95 mv V OL Output LOW Voltage (Note 9) 945 20 695 945 20 695 945 20 695 mv V IH Input HIGH Voltage (Single Ended) 225 0 225 0 225 0 mv V IL Input LOW Voltage (Single Ended) 945 625 945 625 945 625 mv V IHMR Input HIGH Voltage ommon Mode Range (ifferential onfiguration) (Note 20) V EE + 2.0 0.0 V EE + 2.0 0.0 V EE + 2.0 0.0 V I IH Input HIGH urrent 50 50 50 I IL Input LOW urrent NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit.input and output parameters vary : with V. 9.ll loading with 50 to V 2.0 V. 20.V IHMR min varies : with V EE, V IHMR max varies : with V. The V IHMR range is referenced to the most positive side of the differential Unit Table 0. HRTERISTIS V = 0 V; V EE = 3.0 V to 5.5 V or V = 3.0 V to 5.5 V; V EE = 0 V (Note 2) 40 25 5 Min Typ Max Min Typ Max Min Typ Max Unit f max Maximum Frequency (Figure 2) > 3 > 3 > 3 GHz t PLH, t PHL Propagation elay to Output ifferential LK to Q, Q 40 200 250 60 220 270 0 240 300 ps t SKEW Within evice Skew Q0, Q (Note 22) evice to evice Skew 0 5 0 5 20 0 20 25 20 ps t JITTER Random lock Jitter (RMS) (Figure 2) 0.2 < 0.2 < 0.2 < ps V INPP Input Voltage Swing Sensitivity (ifferential onfiguration) 50 00 200 50 00 200 50 00 200 mv t r Output Rise/Fall Times Q, Q t f (20% 0%) @.0 GHz 70 20 70 0 30 0 90 50 200 ps NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit 2.Measured using a 750 mv source, 50% duty cycle clock source. ll loading with 50 to V 2.0 V. 22. Skew is measured between outputs under identical transitions. uty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. 6
900 9 OUTPUT VOLTGE MPLITUE (mv) 00 700 600 500 400 300 200 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 00 0 0 000 2000 3000 INPUT FREQUENY (MHz) Figure 2. Output Voltage mplitude (V OUTPP ) RMS Jitter vs. Input lock Frequency at mbient Temperature 7 6 5 4 3 2 JITTER OUT ps (RMS) ÉÉ Q Q V INPP = V IH (LK) V IL (LK) V OUTPP = V OH (Q) V OL (Q) t PLH t PHL Figure 3. Reference Measurement river evice Q Q Z o = 50 Z o = 50 Receiver evice 50 50 V TT V TT = V 2.0 V Figure 4. Typical Termination for Output river and evice Evaluation (See pplication Note N020/ Termination of EL Logic evices.) 7
ORERING INFORMTION evice Package Shipping M0EP SOI 9 Units / Rail M0EPG SOI 9 Units / Rail M0EPR2 SOI 2500 / Tape & Reel M0EPR2G SOI 2500 / Tape & Reel M0EPT TSSOP 00 Units / Rail M0EPTG TSSOP 00 Units / Rail M0EPTR2 TSSOP 2500 / Tape & Reel M0EPTR2G TSSOP 2500 / Tape & Reel M0EPMNR4 FN 000 / Tape & Reel M0EPMNR4G FN 000 / Tape & Reel M00EP SOI 9 Units / Rail M00EPG SOI 9 Units / Rail M00EPR2 SOI 2500 / Tape & Reel M00EPR2G SOI 2500 / Tape & Reel M00EPT TSSOP 00 Units / Rail M00EPTG TSSOP 00 Units / Rail M00EPTR2 TSSOP 2500 / Tape & Reel M00EPTR2G TSSOP 2500 / Tape & Reel M00EPMNR4G FN 000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BR0/. Resource Reference of pplication Notes N405/ EL lock istribution Techniques N406/ esigning with PEL (EL at +5.0 V) N503/ ELinPS I/O SPiE Modeling Kit N504/ Metastability and the ELinPS Family N56/ Interfacing Between LVS and EL N672/ The EL Translator Guide N00/ Odd Number ounters esign N002/ Marking and ate odes N020/ Termination of EL Logic evices N066/ Interfacing with ELinPS N090/ s of EL evices
PKGE IMENSIONS X B Y 5 4 S 0.25 (0.00) M Y SOI NB SE 75 07 ISSUE H M K NOTES:. IMENSIONING N TOLERNING PER NSI Y4.5M, 92. 2. ONTROLLING IMENSION: MILLIMETER. 3. IMENSION N B O NOT INLUE MOL PROTRUSION. 4. MXIMUM MOL PROTRUSION 0.5 (0.006) PER SIE. 5. IMENSION OES NOT INLUE MBR PROTRUSION. LLOWBLE MBR PROTRUSION SHLL BE 0.27 (0.005) TOTL IN EXESS OF THE IMENSION T MXIMUM MTERIL ONITION. 6. 75 0 THRU 75 06 RE OBSOLETE. NEW STNR IS 75 07. Z H G 0.25 (0.00) M Z Y S X S SETING PLNE 0.0 (0.004) N X 45 M J MILLIMETERS INHES IM MIN MX MIN MX 4.0 5.00 0.9 0.97 B 3.0 4.00 0.50 0.57.35.75 0.053 0.069 0.33 0.03 0.020 G.27 BS 0.050 BS H 0.0 0.25 0.004 0.00 J 0.9 0.25 0.007 0.00 K 0.40.27 0.06 0.050 M 0 0 N 0.25 0 0.00 0.020 S 5.0 6.20 0.22 0.244 SOLERING FOOTPRINT*.52 0.060 7.0 0.275 4.0 0.55 0.6 0.024.270 0.050 SLE 6: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLERRM/. 9
PKGE IMENSIONS TSSOP T SUFFIX PLSTI TSSOP PKGE SE 94R 02 ISSUE 0.5 (0.006) T 0.5 (0.006) T L U U S 2X L/2 PIN IENT S 5 x V K REF 4 0.0 (0.004) M T U S V S B U F 0.25 (0.00) M NOTES:. IMENSIONING N TOLERNING PER NSI Y4.5M, 92. 2. ONTROLLING IMENSION: MILLIMETER. 3. IMENSION OES NOT INLUE MOL FLSH. PROTRUSIONS OR GTE BURRS. MOL FLSH OR GTE BURRS SHLL NOT EXEE 0.5 (0.006) PER SIE. 4. IMENSION B OES NOT INLUE INTERLE FLSH OR PROTRUSION. INTERLE FLSH OR PROTRUSION SHLL NOT EXEE 0.25 (0.00) PER SIE. 5. TERMINL NUMBERS RE SHOWN FOR REFERENE ONLY. 6. IMENSION N B RE TO BE ETERMINE T TUM PLNE -W-. 0.0 (0.004) T SETING PLNE G ETIL E ETIL E W MILLIMETERS INHES IM MIN MX MIN MX 2.90 3.0 0.4 0.22 B 2.90 3.0 0.4 0.22 0.0.0 0.03 0.043 0.05 0.5 0.002 0.006 F 0.40 0.70 0.06 0.02 G 0.65 BS 0.026 BS K 0.25 0.40 0.00 0.06 L 4.90 BS 0.93 BS M 0 6 0 6 0
PKGE IMENSIONS FN SE 506 0 ISSUE PIN ONE REFERENE B NOTES:. IMENSIONING N TOLERNING PER SME Y4.5M, 994. 2. ONTROLLING IMENSION: MILLIMETERS. 3. IMENSION b PPLIES TO PLTE TERMINL N IS MESURE BETWEEN 0.25 N 0.30 MM FROM TERMINL. 4. OPLNRITY PPLIES TO THE EXPOSE P S WELL S THE TERMINLS. 2 X 0.0 2 X 0.0 ÇÇÇ ÇÇÇ ÇÇÇ TOP VIEW E MILLIMETERS IM MIN MX 0.0.00 0.00 0.05 3 0.20 REF b 0.20 0.30 2.00 BS 2.0.30 E 2.00 BS E2 0.70 0.90 e 0 BS K 0.20 L 0.25 0.35 0.0 X SETING PLNE 0.0 SIE VIEW (3) 2 e/2 4 X L e E2 K 5 X b 0.0 0.05 B NOTE 3 BOTTOM VIEW ELinPS is a trademark of Semiconductor omponents Industries, LL (SILL). ON Semiconductor and are registered trademarks of Semiconductor omponents Industries, LL (SILL). SILL reserves the right to make changes without further notice to any products herein. SILL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SILL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SILL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SILL does not convey any license under its patent rights nor the rights of others. SILL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SILL product could create a situation where personal injury or death may occur. Should Buyer purchase or use SILL products for any such unintended or unauthorized application, Buyer shall indemnify and hold SILL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SILL was negligent regarding the design or manufacture of the part. SILL is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLITION ORERING INFORMTION LITERTURE FULFILLMENT: Literature istribution enter for ON Semiconductor P.O. Box 563, enver, olorado 027 US Phone: 303 675 275 or 00 344 360 Toll Free US/anada Fax: 303 675 276 or 00 344 367 Toll Free US/anada Email: orderlit@onsemi.com N. merican Technical Support: 00 22 955 Toll Free US/anada Europe, Middle East and frica Technical Support: Phone: 42 33 790 290 Japan ustomer Focus enter Phone: 3 5773 350 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative M0EP/