Radolerant Current Mode PWM Controller Description he is fit, form and function compatible to the SG1846 with the addition of guaranteed performance after radiation exposure to otal Ionizing Dose (ID), Enhanced Low Dose Rate Sensitivity (ELDRS), and Single Event Latchup (SEL) conditions. he control IC provides the required features to implement fixed frequency, current mode control schemes while maintaining a minimum external parts count. he advanced performance of this technique can be measured in improved line regulation, enhanced load response characteristics, and a simpler, easiertodesign control loop. opological advantages include, inherent pulsebypulse current limiting capability, automatic symmetry correction for pushpull converters, and the ability to parallel power modules while maintaining equal current sharing. Protection circuitry includes builtin undervoltage lockout and programmable current limit in addition to soft start capability. A shutdown function is also available which can initiate either a complete shutdown with automatic restart or latch the supply off. ther features include fully latched operation, doublepulse suppression, deadtime adjust capability, and a ±1% trimmed bandgap reference. Block Diagram Features Automatic Feedforward Compensation Programmable Pulse by pulse Current Limiting Automatic Symmetry Correction in Pushpull Configuration Enhanced Load Response Characteristics Parallel peration Capability for Modular Power Systems Differential Current Sense Amplifier with Wide Commonmode Range Double Pulse Suppression 200 ma otempole utputs ± 1% Bandgap Reference UnderVoltage Lockout Softstart and Shutdown Capability 500kHz peration High Reliability Features Radtolerance: (est data available) ID to a Minimum of 100krad(Si) ELDRS to a Minimum of 50krad(Si) SEL Immunity to 87MeVcm 2 /mg V IN SYNC 5.1 V REFERENCE REGULAR R C SC U.V.LCKU V C Q A U CURREN SENSE CURREN SENSE X3 S R S Q Q utput Stage B U GND 0.5 V 0.5 ma CURREN LIMI ADJUS N.I. INV. E.A. 350 mv 6K SHUDWN Figure 1 Block Diagram November 2013 Rev. 1.1 www.microsemi.com 1 2013 Microsemi Corporation Analog Mixed Signal Group
Current Mode PWM Controller Connection Diagrams and rdering Information Ambient emperature ype Package Part Number Packaging ype Connection Diagram J 16PIN CERAMIC DIP PACKAGE JEV* J C.L./SFSAR () C.S. () C.S. () ERRR AMP () ERRR AMP ENSAIN C 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SHUDWN V IN UPU B V C GRUND UPU A SYNC R 55 C to 125 C F 16PIN CERAMIC FLA PACK 2 FEV* F Hermetic C.L./SFSAR () C.S. () C.S. () ERRR AMP () ERRR AMP ENSAIN C 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SHUDWN V IN UPU B V C GRUND UPU A SYNC R L 20PIN CERAMIC LEADLESS CHIP CARRIER 2 LEV* L 1. N.C. 3 2 1 20 19 11. N.C. 2. C.L./SFSAR 12. R 3. 4 18 13. SYNC 4. () C.S. 5 17 14. UPU A 5. () C.S. 6 16 15. GRUND 6. N.C. 16. N.C. 7. () ERRR AMP 8. () ERRR AMP 7 8 15 14 17. V C 18. UPU B 9. ENSAIN 19. V IN 10. C 9 10 11 12 13 20. SHUDWN * EV is Microsemi s Equivalent V flow that follows MILPRF38535 requirements for Class V processing. Absolute Maximum Ratings Parameter Value Units Supply Voltage (V IN) 40 V Collector Supply Voltage(V C) 40 V Analog Inputs (Pins 3, 4, 5, 6, and 16) 0.3V to V IN V Logic Input 0.3V to 5.5V V Source/Sink Load current (continuous) 200 ma Source/Sink Load Current (peak, 200 ns) 500 ma Reference Load Current 30 ma Soft Start Sink Current 50 ma Sync utput Current 5 ma Error Amplifier utput Current 5 ma scillator Charging current (Pin 9) 5 ma perating Junction emperature Hermetic (J, L, F Packages) 150 C Storage emperature Range 65 to 150 C Lead emperature (Soldering, 10 Seconds) 300 C RoHS Peak Package Solder Reflow emp. (40 sec. max. exp.) 260 (0, 5) C Notes: 1. Values beyond which damage may occur. 2. Consult factory for product availability. 2
hermal Data hermal Data Parameter Value Units J Package: hermal ResistanceJunction to Case, θ JC 30 C/W hermal ResistanceJunction to Ambient, θ JA 80 C/W F Package: hermal ResistanceJunction to Case, θ JC 70 C/W hermal ResistanceJunction to Ambient, θ JA 115 C/W L Package: hermal ResistanceJunction to Case, θ JC 35 C/W hermal ResistanceJunction to Ambient, θ JA 120 C/W Notes: 1. Junction emperature Calculation: J = A (P D x θ JA ). 2. he above numbers for θ JC are maximums for the limiting thermal resistance of the package in a standard mounting configuration. he θ JA numbers are meant to be guidelines for the thermal performance of the device/pcboard system. All of the above assume no ambient airflow. Recommended perating Conditions Parameter Value Units Supply Voltage Range 8 to 40 V Collector Supply Voltage Range 4.5 to 40 V Source/Sink utput Current (continuous) 100 ma Source/Sink utput Current (peak 200ns) 200 ma Reference Load Current 0 to 10 ma scillator Frequency Range 1 to 500 khz scillator iming Resistor (R ) 2 to 100 kω scillator iming Capacitor (C ) 1 to 100 nf perating Ambient emperature Range 55 to 125 C Note: Range over which the device is functional. 3
Current Mode PWM Controller Electrical Characteristics Unless otherwise specified, these specifications apply over the operating ambient temperatures for with 55 C A 125 C. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature. Symbol Parameter est Condition Reference Section Min yp Max Units utput Voltage J = 25 C, I = 1mA 5.05 5.10 5.15 V V REG Line Regulation V IN = 8V to 40V 5 20 mv I REG Load Regulation I L = 1mA to 10mA 3 15 mv emperature Stability 1 0.4 mv/ C otal utput Variation 1 Line, Load and emperature 5.00 5.20 V utput Noise Voltage 1 10Hz f 10kHz. J = 25 C 100 µv Long erm Stability 1 J = 125 C, 1000Hrs. 5 mv VREF ISC Short Circuit utput Current = 0V 10 45 ma scillator Section 6 SC Initial Accuracy J = 25 C 39 43 47 khz SC VS Voltage Stability V IN = 8V to 40V 1 2 % SC S emperature Stability 1 ver perating Range 1 % VH Sync utput High Level 3.9 4.35 V VL Sync utput Low Level 2.3 2.5 V VIH Sync Input High Level Pin 8 = 0V 3.9 V VIL Sync Input Low Level Pin 8 = 0V 2.5 V IIL Sync Input Current Sync Voltage = 5.25V, Pin 8 = 0V 1.2 1.5 ma Error AMP Section EA VS Input ffset Voltage 0.5 5 mv EA IIB Input Bias Current 1 0.6 µa EA IS Input ffset Current 40 250 na EA CM Common Mode Range V IN = 8V to 40V 0 V IN2V V EA AV pen Loop Voltage Gain V = 1.2V to 3V, V CM = 2V 80 105 db EA UGB Unity Gain Bandwidth 1 J = 25 C 0.7 1.0 MHz EA CMRR CMRR V CM = 0V to 38V, V IN = 40V 75 100 db EA PSRR PSRR V IN = 8V to 40V 80 105 db EA SNK utput Sink Current V ID = 15mV to 5V, V PIN 7 = 1.2V 2 6 ma EA SRC utput Source Current V ID = 15mV to 5V, V PIN 7 = 2.5V 0.5 0.4 ma EA VH High Level utput Voltage R L = 15kΩ (Pin 7) 4.3 4.6 V EA VL Low Level utput Voltage R L = 15kΩ (Pin 7) 0.7 1 V 4
Electrical Characteristics Symbol Parameter est Condition Current Sense Amplifier Section Min yp Max CS AV Amplifier Gain 2 &3 V PIN 3 = 0V, Pin 1 pen 2.5 2.75 3.0 V Maximum Differential 3 Pin 1 pen R L = 15kΩ (Pin 7) Input Signal 2 (V PIN 4 V PIN 3) 1.1 1.2 V Input ffset Voltage 2 V PIN 1 = 0.5V, Pin 7 pen 5 25 mv CS CMRR CMRR V CM = 1V to 12V 60 83 db CS PSRR PSRR V IN = 8V to 40V 60 84 db CS IIB Input Bias Current 2 V PIN 1 = 0.5V, Pin 7 pen 10 2.5 µa CSI C Input ffset Current 2 V PIN 1 = 0.5V, Pin 7 pen 0.08 1 µa CS CM Input Common Mode Range 0 V IN 3 V Delay to utputs 1 J = 25 C 200 500 ns Current Limit Adjust Section Current Limit ffset 2 Voltage VPIN 3 = 0, VPIN 4 = 0V, Pin 7 pen 0.45 0.5 0.55 V CL IIB Input Bias Current V PIN 5 =, V PIN 6 = 0V 30 10 µa Shutdown erminal Section SD hreshold Voltage 250 350 400 mv Input Voltage Range 0 V IN V SD LC Minimum Latching Current (I PIN 1) 4 3.0 1.5 ma Maximum NonLatching Current (I PIN 1) 5 1.5 0.8 ma SD DELAY Delay to utputs 1 J = 25 C 300 600 ns utput Section Collector Emitter Voltage 40 V Collector Leakage Current V C = 40V 200 µa utput Low Level I SINK = 20mA 0.1 0.4 V I SINK = 100mA 0.4 2.1 V utput High Level I SURCE = 20mA 13 13.5 V I SURCE = 100mA 12 13.5 V Rise ime 1 C L = 1nF, J = 25 C 50 300 ns Fall ime 1 C L = 1nF, J = 25 C 50 300 ns UnderVoltage Lockout Section StartUp hreshold 7.7 8.0 V hreshold Hysteresis 0.75 V otal Standby Current IQ Supply Current 17 21 ma Notes: 1. hese parameters, although guaranteed over the recommended operating conditions, are not tested in the production. 2. Parameter measured at trip point of latch with V PIN 5 =, V PIN 6 = 0V. 3. Amplifier gain defined as : G = ΔV PIN7 ΔV PIN4 ; V PIN 4 = 0V to 1.0V 4. Current into Pin 1 guaranteed to latch circuit in shutdown state. 5. Current into Pin 1 guaranteed not to latch circuit in shutdown state. 6. R = 10kΩ, C = 4.7nF Units 5
Current Mode PWM Controller Characteristic Curves REFERENCE VLAGE (V) 5.15 5.10 5.05 5.00 4.95 SHR CIRCUI CURREN (ma) 100 90 80 70 60 50 40 30 20 C.S. VLAGE DIFFENIAL (V) 1.5 1.0 0.5 J = 125 C J = 55 C 4.90 55 25 0 25 50 75 100 125 10 0 55 25 0 25 50 75 100 125 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 JUNCIN EMPERAURE ( C) JUNCIN EMPERAURE ( C) ERRR AMPLIFIER UPU VLAGE (V) Figure 2 Reference Voltage Vs. emperature Figure 3 Short Circuit Current Vs. emperature Figure 4 Current Sense hreshold Vs. Error Amplifier utput CURREN SENSE GAIN (V/V) 2.84 2.82 2.80 2.78 2.76 2.74 2.72 2.70 SCILLAR VALLEY VLAGE (V) 1.50 1.40 1.30 1.20 SCILLAR PEAK VLAGE (V) 3.20 3.10 3.00 2.90 2.68 1.10 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 5 Current Sense Gain Vs. emperature 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 6 scillator Valley Voltage Vs. emperature 2.80 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 7 scillator Peak Voltage Vs. emperature LACH CURREN HRESHLD (ma) 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 V IN = 15 V 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 8 Minimum SCR Latch Current CURREN SENSE DELAY (ns) 190 180 170 160 150 (10% ABVE HRESHLD) 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 9 Current Sense Delay Vs. emperature SHUDWN DELAY (ns) 220 200 180 160 140 (10% ABVE HRESHLD) 120 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 10 Shutdown Delay o utput Vs. emperature 6
Characteristic Curves INPU FFSE VLAGE (mv) 1.60 1.50 1.40 1.30 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 11 Error Amplifier Input ffset Voltage Vs. emperature ERRR AMP SINK CURREN (ma) 12.0 11.0 10.0 9.0 8.0 7.0 6.0 5.0 4.0 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 12 Error AMP Sink Current Vs. emperature SAURAIN VLAGE (V) 5.0 4.0 3.0 2.0 1.0 0 0 J= 55 C 100 200 300 400 500 UPU CURREN (ma) = 25 C J = 125 C J Figure 13 utput ransistor Saturation Voltage Vs. utput Current (Skin ransistor) SAURAIN VLAGE (V) 6.0 5.0 4.0 3.0 2.0 1.0 0 0 J= 55 C 100 200 300 400 500 UPU CURREN (ma) J= 125 C J= 25 C Figure 14 utput ransistor Saturation Voltage Vs. utput Current (Source ransistor) SYNC PULSEWIDH (ns) 180 160 140 120 100 80 60 40 20 C = 0.001µF R = 8 KΩ 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 15 Sync Pulsewidth Vs. emperature SYNC PULSEWIDH (ns) 2000 1900 1800 1700 1600 1500 1400 1300 1200 C = 0.01µF R = 8 KΩ 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 16 Sync Pulsewidth Vs. emperature SCILLAR FREQUENCY (KHz) 26.5 26.0 25.5 25.0 C = 0.01µF R = 8 KΩ SCILLAR FREQUENCY (KHz) 2.85 2.75 2.65 C = 0.1µF R = 8 KΩ DUY CYCLE (%) 46 45 44 43 42 41 40 39 38 C = 0.001µF R = 8 KΩ 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 17 scillator Frequency Vs. emperature 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 18 scillator Frequency Vs. emperature 55 25 0 25 50 75 100 125 JUNCIN EMPERAURE ( C) Figure 19 Duty Cycle Vs. emperature 7
Current Mode PWM Controller Application Information 100K 50K 20K C = 1 nf C = 2 nf C = 5 nf C = 10 nf C = 20 nf C = 50 nf C =.1 µf R (Ω) 10K 5K 2K 1K 10µsec 100µsec 1000µsec SCILLAR PERID (µs) Figure 20 scillator Frequency Curves 5 V 3 V I R 1.2 V I R 3.7 V C R SAWH(Pin 8) I d SC(Pin 10) scillator frequency is approximated by the formula: f ~ 2.2 R C UPU DEADIME( ) D Figure 21 scillator Circuit 8
Application Information 5 0.5 ma Z s 6 7 Z f I f < 0.5 ma Figure 22 Error AMP utput Configuration (Error amplifier can source up to 0.5 ma) I S R S R C 3 4 CURREN SENSE Figure 23 Current Sense AMP Connections A small RC filter may be required in some applications to reduce switch transients. Differential input allows remote, noise free switching. 9
Current Mode PWM Controller SYNC 10 15 V IN V C 13 V IN 9 R SC F/F NR A U 11 8 C 2 REF PWM LACH NR B U 14 V U 0.5 ma 7 6 5 INV NI EA 0.5 V I/A SENSE SENSE 4 3 FEEDBACK 1 I LIMI SF/S GND 12 S/D SH/DN 350 mv 16 Figure 24 Single Ended Boost Configuration SYNC 10 15 V IN V C 13 V IN 9 R SC F/F NR A U 11 8 C 2 REF PWM LACH NR B U 14 0.5 ma 7 6 5 INV NI EA 0.5 V I/A SENSE SENSE 4 3 V U FEEDBACK 1 I LIMI SF/S GND 12 S/D SH/DN 16 350 mv Figure 25 Buck Converter with Current Sense Winding 10
Application Information SYNC 10 15 V IN V C 13 9 R SC F/F NR A U 11 8 C 2 REF PWM LACH NR B U 14 0.5 ma 7 6 5 INV NI EA 0.5 V I/A SENSE SENSE 4 3 FEEDBACK 1 I LIMI SF/S GND 12 S/D SH/DN 16 350 mv Figure 26 Push/Pull Converter with Slope Compensation I S () 4 R S () 3 x3 I SENSE 0.5 V 0.5 ma R 1 CURREN LIMI 1 R 2 E/A 7 R 2 0.5 R1R2 Peak Current (IS) is determined by the formula: IS = 3RS Figure 27 Pulse by Pulse Current Limiting 11
Current Mode PWM Controller R 1 R 2 I SS CURREN LIMI 1 I SENSE ʃ 0.5 E/A S S C 16 SHU DWN 350 mv Figure 28 Soft Start and Shutdown/Restart Functions 0.5 V CURREN LIMI (PIN 1) 0 SHUDWN(PIN 16) N FF PWM ~ ~ ~ ~ < 0.8 ma R 1 If < 0.8 ma, the shutdown latch commutates. R 1 when I SS < 0.8 ma, a restart cycle will be initiated. Figure 29 Shutdown with AutoRestart ~ ~ ~ ~ R 1 > 3 ma (LACHED FF) If R 1 Figure 30 Shutdown without AutoRestart (Latched) > 3 ma, the device will latch off until power is recycled. 12
PACKAGE ULINE DIMENSINS PACKAGE ULINE DIMENSINS Controlling dimensions are in inches, metric equivalents are shown for general information. Seating Plane H E D 16 9 1 8 b2 e b Q A L c ea θ Dim Note: MILLIMEERS INCHES MIN MAX MIN MAX A 5.08 0.200 b 0.38 0.51 0.015 0.020 b2 1.04 1.65 0.045 0.065 c 0.20 0.38 0.008 0.015 D 19.30 19.94 0.760 0.785 E 5.59 7.11 0.220 0.280 e 2.54 BSC 0.100 BSC ea 7.37 7.87 0.290 0.310 H 0.63 1.78 0.025 0.070 L 3.18 5.08 0.125 0.200 α 15 15 Q 0.51 1.02 0.020 0.040 Dimensions do not include protrusions; these shall not exceed 0.155mm (.006 ) on any side. Lead dimension shall not include solder coverage. Figure 31 J 16Pin Ceramic Dual Inline Package Dimensions E3 D A A1 3 L2 8 E L Dim MILLIMEERS INCHES MIN MAX MIN MAX D/E 8.64 9.14 0.340 0.360 E3 8.128 0.320 e 1.270 BSC 0.050 BSC B1 0.635 YP 0.025 YP L 1.02 1.52 0.040 0.060 A 1.626 2.286 0.064 0.090 h 1.016 YP 0.040 YP A1 1.372 1.68 0.054 0.066 A2 1.168 0.046 L2 1.91 2.41 0.075 0.95 B3 0.203R 0.008R 1 13 Note: All exposed metalized area shall be gold plated 60 microinch minimum thickness over nickel plated unless otherwise specified in purchase order. A2 h 18 B1 e B3 Figure 32 L 20Pin Ceramic Leadless Chip Carrier (LCC) Package utline Dimensions 13
Current Mode PWM Controller PACKAGE ULINE DIMENSINS Controlling dimensions are in inches, metric equivalents are shown for general information. Dim MILLIMEERS INCHES MIN MAX MIN MAX B e A Q L 69 7 8 9 10 16 L E E1 85 4 3 2 1 1 C L S1 D A 1.65 1.91 0.057 0.067 b 0.38 0.48 0.010 0.019 c 0.102 0.152 0.004 0.006 D 11.18 0.290 E 6.22 6.74 0.238 0.252 E1 7.62 0.272 e 1.27 BSC 0.050 BSC L 6.35 9.40 0.250 0.370 Q 0.51 1.02 0.020 0.040 S1 0.20 0.008 Note: 1. Lead No. 1 is identified by tab on lead or dot on cover. 2. Leads are within 0.13mm (.0005 ) radius of the true position (P) at maximum material condition. 3. Dimension e determines a zone within which all body and lead irregularities lie. Figure 33 F 16Pin Ceramic Flatpack Package Dimensions 14
Microsemi Corporate Headquarters ne Enterprise, Aliso Viejo CA 92656 USA Within the USA: 1(949) 3806100 Sales: 1 (949) 3806136 Fax: 1 (949) 2154996 Microsemi Corporation (NASDAQ: MSCC) offers a comprehensive portfolio of semiconductor solutions for: aerospace, defense and security; enterprise and communications; and industrial and alternative energy markets. Products include highperformance, highreliability analog and RF devices, mixed signal and RF integrated circuits, customizable SoCs, FPGAs, and complete subsystems. Microsemi is headquartered in Aliso Viejo, Calif. Learn more at www.microsemi.com. 2013 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners..0/1.1