Revision. 007 PGA26E19BA. Product Standards PGA26E19BA. Established: Revised: Page 1 of 11

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Transcription:

Revision. 7 Product Standards Established: 24-9-25 Revised: 27--24 Page of

Revision. 7 Type Application Structure GaN-Tr For power switching N-channel enhancement mode FET Equivalent Circuit Figure Out Line DFN 8X8 Marking PGA26E9 A. ABSOLUTE MAXIMUM RATINGS ( Tj = 25 O C, unless otherwise specified ) Values No. Item Symbol Min. Typ. Max. Unit Note Drain-source voltage ( DC ) * VDSS - - 6 V 2 Drain-source voltage ( pulse ) *2 VDSP - - 75 V 3 Gate-source voltage ( DC ) * VGSS - - - V *VGSS+ is given by IG ratings *See application note 4 Gate current ( DC ) * IG - - 9 ma *See application note 5 Gate current ( pulse ) *3,4 IGP - -.6 A *See application note 6 Electric gate charge ( pulse ) QGP - - 2 nc 7 Drain current ( DC ) ( Tc = 25 O C ) * *f=2khz ID - - 3 A Figure 4 *See application note 8 9 Drain reverse current ( DC ) ( Tc = 25 O C ) * Drain current ( pulse )*5 ( Tc = 25 O C )* Drain reverse current ( pulse )*5 ( Tc = 25 O C )* IDR - - 3 A ID pulse - - 23 A Figure 4 IDR pulse - - 23 A Power dissipation ( Tc = 25 O C ) PD - - 66 W Figure 2 2 Junction temperature Tj - - 5 O C 3 Storage temperature Tstg -55-5 O C 4 Drain-source voltage slope dv/dt - - 2 V/ns [Special instructions] * : Please use this product to meet a condition of Tj within 5 O C. *2 : Spike duty cycle D <., spike duration < us, total spike time < hour. *3 : IGP is defined as (Vcc - Vplateau) / Rgon, as shown in Figure A. Vplateau is the voltage between Gate and Source. *4 : Please use this product to meet both a maximum gate current and a maximum gate pulse charge of IGP(.6A) and Q(2nC) respectively, as shown in Figure H. *5 : Pulse width limited by Tjmax. Established: 24-9-25 Revised: 27--24 Page 2 of

Revision. 7 B. ELECTRICAL CHARACTERISTICS ( Tj = 25 O C, unless otherwise specified ) No. Item Symbol Measurement Condition Min. Typ. Max. Unit Drain cut-off current IDSS VDS=6 V, VGS= V, Tj=25 o C - - 39 μa VDS=6 V, VGS= V, Tj=5 o C - 39 - μa 2 Gate-source leakage current IGSS 3 Gate forward voltage VGSF 4 Gate threshold voltage VTH VGS=-3 V VDS= V IGS= ma open drain VDS= V IDS= ma - - - μa 2.8 3.5 4.2 V.9.2.6 V 5 Drain-source on-state resistance RDS(on) IGS= ma, IDS=5 A, Tj=25 o C - 4 9 mω IGS= ma, IDS=5 A, Tj=5 o C - 29 - mω 6 Gate resistance RG 7 Transfer conductance gfs f=mhz open drain VDS=8 V IDS=5 A -.8 - Ω - 5 - S 8 Input capacitance Ciss - 6 - pf 9 Output capacitance Coss VDS=4 V VGS= V - 28 - pf f= MHz Reverse transfer capacitance Crss -.2 - pf Turn-on delay time td(on) - 3.4 - ns 2 Rise time tr VDD=4 V IDS=5 A (Figure A, Figure B) - 5.2 - ns 3 Turn-off delay time td(off) Vcc=2 V Rgon=5 Ω, Rgoff=4.7 Ω, - 3.4 - ns Rig=5 Ω, Cs=68 pf 4 Fall time tf - 2.4 - ns 5 6 Effective output capacitance ( energy related ) Effective output capacitance ( time related ) Co(er) - 33 - pf VDS=-48 V Co(tr) - 37 - pf Established: 24-9-25 Revised: 27--24 Page 3 of

Revision. 7 C. GATE CHARGE CHARACTERISTICS ( Tj = 25 O C, unless otherwise specified ) No. Item Symbol Measurement Condition Min. Typ. Max. Unit Gate charge Qg - 2. - nc 2 Gate-source charge Qgs VDD=4 V IDS=5 A (Figure C, Figure D) -.3 - nc 3 Gate-drain charge Qgd -. - nc 4 Gate plateau voltage V plateau VDD=4 V IDS=5 A -.8 - V D. REVERSE CONDUCTING CHARACTERISTICS ( Tj = 25 O C, unless otherwise specified ) No. Item Symbol Measurement Condition Min. Typ. Max. Unit Source-drain forward voltage VSD VGS= V ISD=5 A - 2.6 - V 2 Reverse recovery charge Qrr - - nc 3 Reverse recovery time trr VDS=4 V - - ns 4 Peak reverse recovery current Irrm ISD=5 A - - A 5 Output charge Qoss - 7 - nc E. THERMAL RESISTANCE CHARACTERISTICS No. Item Symbol Measurement Condition Min. Typ. Max. Unit 2 Thermal resistance ( junction to case ) Thermal resistance ( junction to ambient ) * Rth(j-c) - -.9 Rth(j-a) - - 46 o C/W o C/W 3 Reflow soldering temperature Tsold reflow MSL3 - - 26 o C [Notes] * : Device mounted on four layers epoxy PCB (6.45 cm 2 copper area and 7 m thickness). Established: 24-9-25 Revised: 27--24 Page 4 of

Drain-source current IDS [A] Power [W] Rth(j-c) [ o C/W] Revision. 7 Equivalent circuit / Electrical characteristics 2 3 4 Drain 9 Gate Top View 8 7 6 5 Bottom View Source Source2,2.3,4 :Drain 5,6,9 :Source2 7 8 :Source :Gate Notice: Please connect Source pin to gate driver. Figure : Pin layout / Equivalent circuit 8 D = 5% 6 D = 2% D = % 4. D = 2% 2 Single pulse 5 5. -6-5 -4-3 -2 - Temperature Tc [ o C] Figure 2: Max. power dissipation Time [s] Figure Figure 3: Transient 3 : Transient thermal thermal impedance impedance ID MAX(pulse). ID MAX(DC) μs* us* ms* DC * Single pulse.. Figure 4: Safe operating area Tc = 25 O C Established: 24-9-25 Revised: 27--24 Page 5 of

Drain-source on-state resistance RDSon[Ω] Gate-source current IGS [ma] Drain-source on-state resistance RDSon [Ω] Gate-source current IGS [A] Drain-source current IDS [A] Drain-source current IDS [A] Revision. 7 4 4 3 Vg=4V 3 2 Vg=3V 2 Vg=4V Vg=2V Vg=3V Vg=2V 2 3 4 5 6 7 8 Vg=V 2 3 4 5 6 7 8 Vg=V Figure.5:Output characteristics Tc=25 O C Figure.6:Output characteristics Tc=25 O C.5. Igs=mA, Ids = 5A open drain.4.8.3.6 Tj = 25 o C.2.4 Tj = 25 o C..2. 5 5 2 Temperature Tj [ o C] Figure 7:Drain-source on-state resistance(rds(on)-tj).6 Ids = 5A.5.4.3 Tj = 25 o C.2. Tj = 25 o C..... Gate-source current IGS [A] Figure 9:Drain-source on-state resistance(rds(on)-igs) 2 3 4 5 Gate-source voltage VGS [V] Figure 8:Gate characteristics Gate-source voltage VGS [V] -5 - -5 -. open drain -.2 -.3 -.4 Tj = 25 o C -.5 -.6 -.7 Tj = 25 o C -.8 -.9 - Figure.:Gate characteristics Established: 24-9-25 Revised: 27--24 Page 6 of

Gate-source voltage VGS [V] Capacitance [pf] Drain-source current IDS [A] Drain-source current IDS [A] Drain-source on-state resistance RDSon[Ω] Drain-sourc current IDS [A] Revision. 7.6 4.5.4 Ids = 5A 3 Vds = 8V.3 Tj = 25 o C 2 Tc = 25 o C.2. Tj = 25 o C Tc = 25 o C. 2 3 4 5 Gate-source voltage VGS [V] Figure.:Drain-source on-state resistance(rds(on)-vgs) 2 3 4 Gate-source voltage VGS [V] Figure 2:Transfer characteristics -5-5 - -5-2 -25-3 Vgs V -V -2V -3V -4V -5V - -5-2 -25-3 Vgs V -V -2V -3V -4V -5V -35-35 -4 - -8-6 -4-2 -4 - -8-6 -4-2 Figure.3:Reverse channel characteristics (Tc=25 ) Figure.4:Reverse channel characteristics (Tc=25 ) 5 4 3 Qg Qgs Qgd Vgs = V f = MHz Ciss Coss 2 Crss 2 3 4 Input gate charge [nc] Figure 5:Gate charge characteristics. 2 3 4 5 Figure 6:Capacitance characteristics Established: 24-9-25 Revised: 27--24 Page 7 of

Threshold voltage VTH [V] Drain-source current IDS [ma] Eoss [μj] Qoss [nc] Revision. 7 8 3 6 25 2 4 5 2 5 2 3 4 5 2 3 4 5 Figure 7:Output capacitance stored energy Figure 8:Output charge 2.5 Ids=mA 8 Vgs = V 6 4.5 2 5 5 2 Temperature Tj [ o C] 2 4 6 8 2 Figure.9:Threshold voltage (VTH-Tj) Figure.2:Drain-Source leakage current (Tc=25 ) Established: 24-9-25 Revised: 27--24 Page 8 of

Revision. 7 Vcc VGS % 9% Rig L VDS 9% 9% Rgon Rgoff Cs DUT VDD td (on) tr ton % % td (off) toff tf Figure A : Switching time measurement IDS IDS VGS L VGS IG(const.) Rig RL Figure B : Switching wave form VDS VG, VD VDS VGS Qgs Qgd VG DUT DUT VDD VDD Vplateau VD Charge Figure C :: Gate charge measurement Figure D : Gate charge wave form VGS IDS VDS Ipeak = VDD / L x ton VDS Rig L DUT VDD Clamp circuit VDD Figure E : Reverse bias safe operating area dv/dt measurement circuit Figure F : Reverse bias safe operating area dv/dt wave form IG DUT ISD L ISD IGP trr Irrm % Rig VDD Electrical charge Q Qrr Figure G : di/dt measurement circuit Irrm Figure H : IGP di/dtwave form Time Established: 24-9-25 Revised: 27--24 Page 9 of

Revision. 7 [Precautions for Use] ) The product has risks for break-down or burst or giving off smoke in following conditions. Avoid the following use. Fuse should be added at the input side or connect zener diode between Gate pin and GND, etc as a countermeasure to pass regulatory Safety Standard. Concrete countermeasure could be provided individually. However, customer should make the final judgment. () Reverse the Drain pin and gate pin connection to the power supply board. (2) Drain pin short to Source pin and Source2 pin. (3) Drain pin short to Gate pin. (4) Gate pin open. 2) This product is under development and is subject to change without notice standards. Established: 24-9-25 Revised: 27--24 Page of

A A2 L E3 E2 E E Revision. 7 Outline D Unit: mm D 5 6 7 8 A 9 4 3 2 D2 b e SYMBOL DIMENSION MIN NOM MAX A.5.25.35 A..2.5 A2.4.5.6 b.9.. D 7.9 8. 8. D 6.84 6.94 7.4 D2.4.5.6 E 7.9 8. 8. E.9.. E2 3. 3.2 3.3 E3 2.7 2.8 2.9 e 2. B.S.C. L.4.5.6 *Please note that technical specifications are subject to change without notice. Established: 24-9-25 Revised: 27--24 Page of

Request for your special attention and precautions in using the technical information and semiconductors described in this book () If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information de-scribed in this book. (3) The products described in this book are intended to be used for general applications (such as office equipment, communications equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book. Please consult with our sales staff in advance for information on the following applications, moreover please exchange documents separately on terms of use etc.: Special applications (such as for in-vehicle equipment, airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment, medical equipment and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. Unless exchanging documents on terms of use etc. in advance, it is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the products described in this book for any special application. (4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most upto-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. We do not guarantee quality for disassembled products or the product re-mounted after removing from the mounting board. When using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) When reselling products described in this book to other companies without our permission and receiving any claim of request from the resale destination, please understand that customers will bear the burden. (8) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. No.68