TL317 3-TERMINAL ADJUSTABLE REGULATOR

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Voltage Range Adjustable From 1.2 V to 32 V When Used With an External Resistor Divider Current Capability of 100 ma Input Regulation Typically 0.01% Per Input-Voltage Change Regulation Typically 0.5% Ripple Rejection Typically 80 db description The is an adjustable three-terminal positive-voltage regulator capable of supplying 100 ma over an output-voltage range of 1.2 V to 32 V. It is exceptionally easy to use and requires only two external resistors to set the output voltage. SLVS004D APRIL 1979 RESED JANUARY 2002 In addition to higher performance than fixed regulators, this regulator offers full overload protection available only in integrated circuits. Included on the chip are current-limiting and thermal-overload protection. All overload-protection circuitry remains fully functional, even when ADJUSTMENT is disconnected. Normally, no capacitors are needed unless the device is situated far from the input filter capacitors, in which case an input bypass is needed. An optional output capacitor can be added to improve transient response. ADJUSTMENT can be bypassed to achieve very high ripple rejection, which is difficult to achieve with standard three-terminal regulators. In addition to replacing fixed regulators, the regulator is useful in a wide variety of other applications. Since the regulator is floating and sees only the input-to-output differential voltage, supplies of several hundred volts can be regulated as long as the maximum input-to-output differential is not exceeded. Its primary application is that of a programmable output regulator, but by connecting a fixed resistor between ADJUSTMENT and, this device can be used as a precision current regulator. Supplies with electronic shutdown can be achieved by clamping ADJUSTMENT to ground, programming the output to 1.2 V, where most loads draw little current. The C is characterized for operation over the virtual junction temperature range of 0 C to 125 C. TJ AVAILABLE OPTIONS SMALL OUTLINE (D) PACKAGED DECES PLASTIC (LP) INPUT ADJUSTMENT PLASTIC THIN SHRINK SMALL OUTLINE (PW) 0 C to 125 C CD CLP CPW The D and LP packages are available taped and reeled. Add the suffix R to device type (e.g., CDR). The PW package is only available taped and reeled. D OR PW PACKAGE (TOP EW) 1 2 3 4 8 7 6 5 NC NC NC No internal connection terminals are all internally connected. LP PACKAGE (TOP EW) INPUT ADJUSTMENT Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2002, Texas Instruments Incorporated POST OFFICE BOX 655303 DALLAS, TEXAS 75265 1

SLVS004D APRIL 1979 RESED JANUARY 2002 schematic INPUT 310 Ω 310 Ω 190 Ω 251 Ω 5.6 kω 2.1 kω 360 Ω 200 kω 124 Ω 11.5 kω 1.4 Ω 30 pf 2.12 kω 30 195 Ω 5.3 kω 5.7 kω 70 Ω 5.1 kω pf 10.8 kω 670 Ω NOTE A: All component values shown are nominal. 40 Ω ADJUSTMENT absolute maximum ratings over operating temperature range (unless otherwise noted) Input-to-output differential voltage, V l V O.................................................... 35 V Package thermal impedance, θ JA (see Notes 1 and 2): D package............................ 97 C/W LP package.......................... 156 C/W PW package......................... 149 C/W Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds............................... 260 C Storage temperature range, T stg................................................... 65 C to 150 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. Maximum power dissipation is a function of TJ(max), θ JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) TA)/θ JA. Operating at the absolute maximum TJ of 150 C can affect reliability. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions MIN MAX UNIT Input-to-output voltage differential 35 V IO current 2.5 100 ma TJ Operating virtual-junction temperature C 0 125 C 2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

SLVS004D APRIL 1979 RESED JANUARY 2002 electrical characteristics over recommended operating virtual-junction temperature range (unless otherwise noted) PARAMETER Input voltage regulation (see Note 3) = 5 V to 35 V TEST CONDITIONS C MIN TYP MAX TJ = 25 C 0.01 0.02 IO = 2.5 ma to 100 ma 0.02 0.05 = 10 V, f = 120 Hz 65 Ripple regulation = 10 V, 10-µF capacitor between ADJUSTMENT and ground voltage regulation 66 80 UNIT %V = 5 V to 35 V, 5 V 25 mv IO = 2.5 ma to 100 ma, TJ = 25 C 5 V 5 mv/v = 5 V to 35 V, 5 V 50 mv IO = 2.5 ma to 100 ma 5 V 10 mv/v voltage change with temperature TJ = 0 C to 125 C 10 mv/v voltage long-term drift After 1000 hours at TJ = 125 C and = 35 V 3 10 mv/v noise voltage f = 10 Hz to 10 khz, TJ = 25 C 30 µv/v Minimum output current to maintain regulation = 35 V 1.5 2.5 ma Peak output current 35 V 100 200 ma ADJUSTMENT current 50 100 µa Change in ADJUSTMENT current = 2.5 V to 35 V, IO = 2.5 ma to 100 ma 0.2 5 µa Reference voltage (output to ADJUSTMENT) = 5 V to 35 V, P rated dissipation IO = 2.5 ma to 100 ma, db 1.2 1.25 1.3 V Unless otherwise noted, these specifications apply for the following test conditions: = 5 V and IO = 40 ma. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. All characteristics are measured with a 0.1-µF capacitor across the input and a 1-µF capacitor across the output. NOTE 3: Input voltage regulation is expressed here as the percentage change in output voltage per 1-V change at the input. POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3

SLVS004D APRIL 1979 RESED JANUARY 2002 APPLICATION INFORMATION C1 = 0.1 µf (see Note A) Input 470 Ω (see Note B) C2 = 1 µf (see Note C) 35 V Input (see Note A) = 120 Ω R2 C1 = 0.1 µf 10 V R3 = 820 Ω R2 = 3 kω NOTES: A. Use of an input bypass capacitor is recommended if regulator is far from the filter capacitors. B. voltage is calculated from the equation: V O V ref.1 R2. where: Vref equals the difference between and ADJUSTMENT voltages ( 1.25 V). C. Use of an output capacitor improves transient response but is optional. Figure 1. Adjustable Voltage Regulator 1N4002 NOTE A: voltage is calculated from the equation: V O V ref.1 R2 R3. 10 V where: Vref equals the difference between and ADJUSTMENT voltages ( 1.25 V). Figure 2. 0-V to 30-V Regulator Circuit C1 = 0.1 µf Input R2 = 10 kω = 470 Ω + C2 = 10 µf D1 1N4002 (see Note A) + C3 = 1 µf D1 discharges C2 if output is shorted to ground. NOTE A: Use of an output capacitor improves transient response but is optional. Figure 3. Regulator Circuit With Improved Ripple Rejection Input I limit 1.25 Figure 4. Precision Current-Limiter Circuit 4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

APPLICATION INFORMATION SLVS004D APRIL 1979 RESED JANUARY 2002 R2 = 1.5 kω Input C1 = 0.1 µf C2 = 1 µf = 470 Ω Input Adjust R3 = 240 Ω R4 = 2 kω Input R2 = 5.1 kω = 470 Ω 2N2905 R3 = 50 kω = 15 V 1N4002 C1 = 25 µf Figure 5. Tracking Preregulator Circuit Figure 6. Slow Turnon 15-V Regulator Circuit Input 240 Ω Input 24 Ω 1.1 kω ICHG Figure 7. 50-mA Constant-Current Battery-Charger Circuit V VBE R V BE I CHG Figure 8. Current-Limited 6-V Charger POST OFFICE BOX 655303 DALLAS, TEXAS 75265 5

SLVS004D APRIL 1979 RESED JANUARY 2002 APPLICATION INFORMATION TIP73 2N2905 500 Ω 22 Ω 5 kω Input 120 Ω 1N4002 10 µf 5 kω 10 µf RL 47 µf Minimum load current is 30 ma. Optional capacitor improves ripple rejection. Figure 9. High-Current Adjustable Regulator 6 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2001, Texas Instruments Incorporated

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