TQP7M W High Linearity Amplifier. Applications. Product Features. Functional Block Diagram. Pin Configuration. General Description

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TQP7M9 Applications Repeaters BTS Transceivers BTS High Power Amplifiers CDMA / WCDMA / LTE General Purpose Wireless 24 Pin 4x4 mm QFN Package Product Features Functional Block Diagram MHz +33 dbm PdB at 94 MHz + dbm Output IP3 at 94 MHz 2.8 db Gain at 94 MHz +V Single Supply, 4 ma Current Patented internal RF overdrive protection Patented internal DC overvoltage protection On chip ESD protection Shut-down capability Capable of handling : VSWR at Vcc=+ V,.9 GHz, 33 dbm CW Pout or 23. dbm WCDMA Pout Vbias 2 3 4 7 24 8 23 9 22 2 2 2 9 8 Iref 7 RFout/Vcc RFout/Vcc 4 RFout/Vcc 3 General Description The TQP7M9 is a high linearity, high gain 2W driver amplifier in industry standard, RoHS compliant, QFN surface mount package. This InGaP/GaAs HBT delivers high performance across. to. GHz range of frequencies while achieving 2.8 db gain, + dbm OIP3 and +33 dbm PdB at 94MHz while only consuming 4 ma quiescent current. All devices are % RF and DC tested. The TQP7M9 incorporates patented on-chip circuit techniques that differentiate it from other products in the market. The amplifier integrates an on-chip DC over-voltage and RF over-drive protection. This protects the amplifier from electrical DC voltage surges and high input RF input power levels that may occur in a system. The TQP7M9 is targeted for use as a driver amplifier in wireless infrastructure where high linearity, medium power, and high efficiency are required. The device is an excellent candidate for transceiver line cards and high power amplifiers in current and next generation multi-carrier 3G / 4G base stations. Pin Configuration Pin No. Symbol Vbias 4, 4,, RFout/Vcc 8 Iref 2, 3, -3, 7, 9-24 Ordering Information Part No. TQP7M9 Description 2 W High Linearity Amplifier TQP7M9-PCB9 92 9 MHz Evaluation Board Standard T/R size = 2 pieces on a 3 reel. Datasheet: Rev D -24-3 - of 8 - Disclaimer: Subject to change without notice

TQP7M9 Absolute Maximum Ratings Parameter Rating Storage Temperature - to C RF Input Power, CW, Ω, T=2 C Device Voltage (V CC ) +3 dbm +8 V Operation of this device outside the parameter ranges given above may cause permanent damage. Recommended Operating Conditions Parameter Min Typ Max Units Device Voltage (V CC ) 4.7..2 V Case Temperature -4 +8 C Tj for > hours MTTF +7 C Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. Electrical Specifications Test conditions unless otherwise noted: V CC =+ V, Temp= +2 C, tuned application circuit Parameter Conditions Min Typ Max Units Operational Frequency Range MHz Test Frequency 94 MHz Gain 9 2.8 22 db Input Return Loss 9.2 db Output Return Loss 2.7 db Output PdB 32 +33. dbm Output IP3 Pout = +7 dbm/tone, f = MHz +4 +.3 dbm WCDMA Channel Power ACLR=- dbc () +23. dbm Noise Figure 4.8 db Quiescent Current (I CQ ) 3 4 ma Reference Current (I ref ) 8.9 ma Thermal Resistance, θ jc Junction to case 7.2 C/W. ACLR Test set-up: 3GPP WCDMA, TM+4 DPCH, + MHz offset, PAR = 9.7 db at.% Prob. Datasheet: Rev D -24-3 - 2 of 8 - Disclaimer: Subject to change without notice

Gain (db) TQP7M9 Device Characterization Data 3 Gain & Max Stable Gain Input reflection coefficients Output reflection coefficients 2 2 Gain Gmax.8..4.8..4.2 - -.7 -. -.2.2..7 -.2.2 - -.7 -. -.2.2..7 -.2 -.4 -. -.4 -... 2 2. 3 3. 4 Frequency (GHz) -.8 - -.8 - Note: The gain for the unmatched device in ohm system is shown as the trace in black color, [gain (S(2)]. For a tuned circuit for a particular frequency, it is expected that actual gain will be higher, up to the maximum stable gain. The maximum stable gain is shown as the blue trace [Gmax]. The impedance plots are shown from. 4 GHz. S-Parameters Test Conditions: V CC=+ V, I CQ=4 ma, T=+2 C, unmatched ohm system, calibrated to device leads Freq (GHz) S (db) S (ang) S2 (db) S2 (ang) S2 (db) S2 (ang) S22 (db) S22 (ang). -.44-4.2 9.78 44.9-42. 39. -.98-9.88. -.2-4.9. 38.73-43.22 2.4 -.7-7..2 -. -4.2 3.87 32.3-4.7.7 -. -7.3.4 -.4-7.8.3 2.3-4.83 3. -. -77.8. -.3 78.7 9. 2.3-4.24.84 -. -7.22.8 -. 7.24 8.4 4.9-4.3.88 -.3-7.2. -.2 7.9.8 98.3-39.99 3.2 -.3-73.42.2 -.72 7..3 9.72-39.9 4.2 -. -72.3.4 -.89 2.2.7 8.9-39.7.3 -.9-7.7. -.8.9.9 79.97-37.92 -.4 -.79-9.8.8 -.27.93.48 72.2-37.7-7.78 -.9-8.2 2. -.38 4.4.28 3.3-3.4-2.2-2.2-7.9 2.2 -.48 39.99 4.89 3. -3.3-23.44-2.7-9.42 2.4 -.2 34.72 4.8 4.77-3.84-33. -2.83-73.7 2. -.9 29.34.2 3.7-34.8-43.3-3. -78.9 2.8-2.39 24.3 4.93 2. -34. -48. -2.94 74.9 3. -3.38 2.3.32 4.7-33.2-2.8-2.7 7.99 3.2 -.4 2.8.7-3.37-32.23-83.93-2.38 3.9 3.4-8.79 4.9.7-2.8-3.82 -.34 -.88 9.2 3. -7.3-78.9.3-2.42-32.4-38.2 -.3.8 3.8-3.9-7.72.7-7.3-3.73-72.4 -.47.8 4. -2.78-8.72 -.74-8. -37. 7.73 -. 2.4 Datasheet: Rev D -24-3 - 3 of 8 - Disclaimer: Subject to change without notice

7 8 9 TQP7M9-PCB9 Evaluation Board (92-9 MHz) TQP7M9 Vcc +V R R8 C3 C7 C C7 R 28 D3 SMTG C3 R7 24 C7 uf 32 C7 C R2 C L C9 C8 L4 R3 C4 U L3 R L B C C2 C3 J2 RF Input C R3 L4 C4 pf Vbias 2 R2 3 C9 4 C 2.4 pf L 22 pf 8.2 nh C8.8 pf 24 23 22 2 2 U R. uf 8 nh 3 L3 Iref 8 7 RFout RFout RFout 4 3 9 B L 8 nh 8 C2 8.2 pf pf C pf C pf C3 pf J3 RF Output. Components shown on the silkscreen but not on the schematic are not used. 2. Ω resistor can be replaced with copper trace in the target application layout. 3. To power down the device, voltage can be applied to V ref to control I ref by placing resistor R8 and removing R7. 4. The recommended component values are dependent upon the frequency of operation.. All components are of 3 size unless stated on the schematic.. R is critical for device linearity performance. 7. Critical component placement locations: Distance between center of C8 and TQP7M9 (U) device package is 243 mil (.7º at 94MHz) Distance between center of L and TQP7M9 (U) device package is 42 mil (2.8º at 94MHz) Distance between center of C9 and TQP7M9 (U) device package is 27 mil (3.3º at 94MHz) Distance between center of C2 and TQP7M9 (U) device package is 3 mil (7.2º at 94MHz) 2 Bill of Material TQP7M9-PCB9 Reference Des. Value Description Manuf. Part Number U n/a 2W High Linearity Amplifier TriQuint TQP7M9 n/a n/a Printed Circuit Board TriQuint D3 n/a Zener, dual, SOT-23 various B, L3, L4, R3, C Ω Resistor, Chip, 3, %, /W various R2 Ω Resistor, Chip, 3, %, /W various R 28 Ω Resistor, Chip, 3, %, /W various R7 24 Ω Resistor, Chip, 3, %, /W various C2 8.2 pf Capacitor, Chip, 3, ±.pf, V, Accu-P AVX 3J8R2ABSTR C7 uf Capacitor, Tantalum, 32, 3V, % various C8.8pF Capacitor, Chip, 3, ±.pf, V, Accu-P AVX 3JR8ABSTR C9 2.4 pf Capacitor, Chip, 3, ±.pf, V, Accu-P AVX 3J2R4ABSTR C 22 pf Capacitor, Chip, 3, %, V, NPO/COG various C, C3, C4, C pf Capacitor, Chip, 3, %, V, NPO/COG various C3. uf Capacitor, Chip, 3, V, XR, % various C7 pf Capacitor, Chip, 3, %, V, NPO/COG various L 8 nh Inductor, 8, %, Coilcraft CS Series Coilcraft 8CS-8XJLB L 8.2 nh Inductor, 3, % Toko LL8-FSL8N2 R 8 nh Inductor, 3, % Toko LL8-FSL8N R4, C2, C4 n/a Do Not Place Datasheet: Rev D -24-3 - 4 of 8 - Disclaimer: Subject to change without notice

OIP3 (dbm) PdB (dbm) Icc (ma) ACLR (dbm) ACLR (dbm) OIP3 (dbm) Gain (db) Return Loss (db) Return Loss (db) TQP7M9 Typical Performance TQP7M9-PCB9 Test conditions unless otherwise noted: V CC=+ V, Temp=+2 C Parameter Conditions Typical Value Units Frequency 92 94 9 MHz Gain 2. 2.8 2 db Input Return Loss 8. 9.2 9.4 db Output Return Loss.3 2.7 4.9 db Output PdB +32.9 +33. +33.2 dbm Output IP3 Pout= +7 dbm/tone, Δf= MHz +49.8 +.3 +. dbm WCDMA Channel Power ACLR=- dbc () +23.3 +23. +23. dbm Noise Figure 4.8 4.8 4.8 db Quiescent Collector Current, I CQ 4 ma. ACLR Test set-up: 3GPP WCDMA, TM+4 DPCH, + MHz offset, PAR = 9.7 db at.% Prob. Performance Plots TQP7M9-PCB9 Test conditions unless otherwise noted: V CC=+ V, Temp=+2 C Gain vs. Frequency Input Return Loss vs. Frequency 22 Output Return Loss vs. Frequency 2 2 - - 4 C +2 C +8 C - - 4 C +2 C +8 C 9 8-4 C +2 C +8 C - - - - 7.92.93.94.9.9 Frequency (GHz) -2.92.93.94.9.9 Frequency (GHz) -2.92.93.94.9.9 Frequency (GHz) -4 - - ACLR vs. Output Power at 94MHz W-CDMA 3GPP Test Model +4 DPCH PAR = 9.7dB @.% Probability 3.84 MHz BW Frequency : 94 MHz -4 - - ACLR vs. Output Power vs. Frequency W-CDMA 3GPP Test Model +4 DPCH PAR = 9.7dB @.% Probability 3.84 MHz BW 92 MHz 94 MHz 9 MHz Temp.=+2 o C 4 OIP3 vs. Output Power at 94MHz MHz Tone Spacing - - 4 C +2 C +8 C - 4-4 C +2 C +8 C - 7 9 2 23 2 Output Power (dbm) - 7 9 2 23 2 Output Power (dbm) 3 3 7 9 2 23 Output Power / Tone(dBm) OIP3 vs. Output Power vs. Frequency Temp.=+2 o C MHz Tone Spacing 3 34 33 PdB vs. Frequency 9 8 Frequency : 94 MHz Temp.=+2 o C Icc vs. Output Power 4 4 92 MHz 94 MHz 9 MHz 32 3 +8 C +2 C 4 C 7 3 3 7 9 2 23 Output Power / Tone(dBm) 3 92 93 94 9 9 Frequency (MHz) 4 9 23 27 3 3 Output Power (dbm) Datasheet: Rev D -24-3 - of 8 - Disclaimer: Subject to change without notice

TQP7M9 Pin Configuration and Description Vbias 2 3 4 8 Iref 7 RFout/Vcc RFout/Vcc 4 RFout/Vcc 3 7 8 9 2 24 23 22 2 2 9 Pin No. Symbol Description Vbias Voltage supply for active bias for the amp. Connect to same supply voltage as Vcc. 4, RF IN RF Input. Requires external match for optimal performance. External DC Block required. 4,, RFout / V cc RF Output. Requires external match for optimal performance. External DC Block and supply voltage is required. Reference current into internal active bias current mirror. Current into I 8 I ref ref sets device quiescent current. Also, can be used as on/off control. 2, 3, -3, 7, 9-24 GND RF/DC Ground Connection Backside Paddle RF/DC GND RF/DC ground. Use recommended via pattern to minimize inductance and thermal resistance. See PCB Mounting Pattern for suggested footprint. Evaluation Board PCB Information TriQuint PCB 78282 Material and Stack-up.4".2 ±. Finished Board Thickness.4" Nelco N-4-3 Nelco N-4-3 ε r =3.7 typ. Nelco N-4-3 oz. Cu top layer oz. Cu inner layer oz. Cu inner layer oz. Cu bottom layer ohm line dimensions: width =.3 spacing =.3" Datasheet: Rev D -24-3 - of 8 - Disclaimer: Subject to change without notice

TQP7M9 Package Marking and Dimensions Marking: Part Number 7M9 Date Code YYMM Lot code AaXXXX TERMINAL # IDENTIFIER 4. 24X. Pitch 24X.2±. Pin # IDENTIFIER CHAMFER.3 x 4 24X.4±. 4 7M9 YYMM AaXXXX 4. 2.7±. Exp. DAP R.7 2. Ref. 24X. C.8 C...23 Ref..8±. C SEATING PLANE 2.7±. Exp. DAP GND/THERMAL PAD. All dimensions are in millimeters. Angles are in degrees. 2. Except where noted, this part outline conforms to JEDEC standard MO-22, Issue E (Variation VGGC) for thermally enhanced plastic very thin fine pitch quad flat no lead package (QFN). 3. Dimension and tolerance formats conform to ASME Y4.4M-994. 4. The terminal # identifier and terminal numbering conform to JESD 9- SPP-2.. Co-planarity applies to the exposed ground/thermal pad as well as the contact pins.. Package body length/width does not include plastic flash protrusion across mold parting line. PCB Mounting Pattern 3 X PACKAGE OUTLINE 24X.7.4 24X.38. PITCH R.9.9 2.7 (SOLDER MASK) MINIMUM BACKSIDE THERMAL CONTACT AREA 2.7.4 2.7 COMPONENT SIDE BACK SIDE. All dimensions are in millimeters. Angles are in degrees. 2. Use oz. copper minimum for top and bottom layer metal. 3. Vias are required under the backside paddle of this device for proper RF/DC grounding and thermal dissipation. We recommend a.3mm (#8/.3") diameter bit for drilling via holes and a final plated thru diameter of.2mm (. ). 4. Ensure good package backside paddle solder attach for reliable operation and best electrical performance.. Place mounting screws near the part to fasten a back side heat sink.. Do not apply solder mask to the back side of the PC board in the heat sink contact region. 7. Ensure that the backside via region makes good physical contact with the heat sink. Datasheet: Rev D -24-3 - 7 of 8 - Disclaimer: Subject to change without notice

TQP7M9 Product Compliance Information ESD Sensitivity Ratings Caution! ESD-Sensitive Device ESD Rating: Class C Value: V and < 2 V Test: Human Body Model (HBM) Standard: JEDEC Standard JESD22-A4 ESD Rating: Class IV Value: Passes V Test: Charged Device Model (CDM) Standard: JEDEC Standard JESD22-C MSL Rating MSL Rating: Level Test: 2 C convection reflow Standard: JEDEC Standard IPC/JEDEC J-STD-2 Solderability Compatible with both lead-free (2 C maximum reflow temperature) and tin/lead (24 C maximum reflow temperature) soldering processes. Contact plating: Annealed matte tin over copper. RoHs Compliance This part is compliant with EU 22/9/EC RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment). This product also has the following attributes: Lead Free Halogen Free (Chlorine, Bromine) Antimony Free TBBP-A (C H 2 Br 4 2 ) Free PFOS Free SVHC Free Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Tel: +.3..9 Email: info-sales@tqs.com Fax: +.3..892 For technical questions and application information: Email: sjcapplications.engineering@tqs.com Important Notice The information contained herein is believed to be reliable. TriQuint makes no warranties regarding the information contained herein. TriQuint assumes no responsibility or liability whatsoever for any of the information contained herein. TriQuint assumes no responsibility or liability whatsoever for the use of the information contained herein. The information contained herein is provided "AS IS, WHERE IS" and with all faults, and the entire risk associated with such information is entirely with the user. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for TriQuint products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. TriQuint products are not warranted or authorized for use as critical components in medical, life-saving, or lifesustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. Datasheet: Rev D -24-3 - 8 of 8 - Disclaimer: Subject to change without notice