SIGMA-DELTA CONVERTER

Similar documents
This tutorial describes the principles of 24-bit recording systems and clarifies some common mis-conceptions regarding these systems.

Chapter 2: Digitization of Sound

Advantages of Analog Representation. Varies continuously, like the property being measured. Represents continuous values. See Figure 12.

Chapter 7. Introduction. Analog Signal and Discrete Time Series. Sampling, Digital Devices, and Data Acquisition

SAMPLING AND RECONSTRUCTING SIGNALS

II Year (04 Semester) EE6403 Discrete Time Systems and Signal Processing

DIGITAL FILTERING OF MULTIPLE ANALOG CHANNELS

Choosing the Best ADC Architecture for Your Application Part 3:

System on a Chip. Prof. Dr. Michael Kraft

Fundamentals of Data Converters. DAVID KRESS Director of Technical Marketing

Music 270a: Fundamentals of Digital Audio and Discrete-Time Signals

Appendix B. Design Implementation Description For The Digital Frequency Demodulator

Multirate DSP, part 3: ADC oversampling

Telecommunication Electronics

Design IV. E232 Spring 07

Analog and Telecommunication Electronics

Based with permission on lectures by John Getty Laboratory Electronics II (PHSX262) Spring 2011 Lecture 9 Page 1

The Case for Oversampling

UNIT III Data Acquisition & Microcontroller System. Mr. Manoj Rajale

ANALOGUE AND DIGITAL COMMUNICATION

Summary Last Lecture

Electronics A/D and D/A converters

10. Chapter: A/D and D/A converter principles

Lecture 3 Review of Signals and Systems: Part 2. EE4900/EE6720 Digital Communications

FYS3240 PC-based instrumentation and microcontrollers. Signal sampling. Spring 2017 Lecture #5

CHAPTER. delta-sigma modulators 1.0

The Fundamentals of Mixed Signal Testing

Lecture 9, ANIK. Data converters 1

Digital Signal Processing. VO Embedded Systems Engineering Armin Wasicek WS 2009/10

Advanced Digital Signal Processing Part 2: Digital Processing of Continuous-Time Signals

Lecture Schedule: Week Date Lecture Title

PYKC 27 Feb 2017 EA2.3 Electronics 2 Lecture PYKC 27 Feb 2017 EA2.3 Electronics 2 Lecture 11-2

The need for Data Converters

Chapter 2 Analog-to-Digital Conversion...

CMPT 318: Lecture 4 Fundamentals of Digital Audio, Discrete-Time Signals

Continuous vs. Discrete signals. Sampling. Analog to Digital Conversion. CMPT 368: Lecture 4 Fundamentals of Digital Audio, Discrete-Time Signals

FYS3240 PC-based instrumentation and microcontrollers. Signal sampling. Spring 2015 Lecture #5

ANALOG-TO-DIGITAL CONVERTERS

Analog to Digital Converters

Lab.3. Tutorial : (draft) Introduction to CODECs

Excuse Me Sir, Will That Be One Millisecond Or Two??

The University of Texas at Austin Dept. of Electrical and Computer Engineering Final Exam

APPLICATION NOTE. Atmel AVR127: Understanding ADC Parameters. Atmel 8-bit Microcontroller. Features. Introduction

Theoretical 1 Bit A/D Converter

In this lecture. System Model Power Penalty Analog transmission Digital transmission

EE247 Lecture 22. Figures of merit (FOM) and trends for ADCs How to use/not use FOM. EECS 247 Lecture 22: Data Converters 2004 H. K.

AD9772A - Functional Block Diagram

Data acquisition and instrumentation. Data acquisition

Sampling and Reconstruction of Analog Signals

How to turn an ADC into a DAC: A 110dB THD, 18mW DAC using sampling of the output and feedback to reduce distortion

Lecture 7 Frequency Modulation

Analogue Interfacing. What is a signal? Continuous vs. Discrete Time. Continuous time signals

Analog I/O. ECE 153B Sensor & Peripheral Interface Design Winter 2016

APPLICATION BULLETIN PRINCIPLES OF DATA ACQUISITION AND CONVERSION. Reconstructed Wave Form

MODELING AND IMPLEMENTATION OF THIRD ORDER SIGMA-DELTA MODULATOR

ECE 556 BASICS OF DIGITAL SPEECH PROCESSING. Assıst.Prof.Dr. Selma ÖZAYDIN Spring Term-2017 Lecture 2

Design And Simulation Of First Order Sigma Delta ADC In 0.13um CMOS Technology Jaydip H. Chaudhari PG Student L. C. Institute of Technology, Bhandu

Experiment 8: Sampling

Module 5. DC to AC Converters. Version 2 EE IIT, Kharagpur 1

On-Chip Implementation of Cascaded Integrated Comb filters (CIC) for DSP applications

Cyber-Physical Systems ADC / DAC

Chapter 3 Data and Signals

Islamic University of Gaza. Faculty of Engineering Electrical Engineering Department Spring-2011

INTRODUCTION DIGITAL SIGNAL PROCESSING

ELEC-C5230 Digitaalisen signaalinkäsittelyn perusteet

Analog-to-Digital Converters

Understanding Data Converters SLAA013 July 1995

6 Sampling. Sampling. The principles of sampling, especially the benefits of coherent sampling

National Instruments Flex II ADC Technology The Flexible Resolution Technology inside the NI PXI-5922 Digitizer

Signal Processing for Digitizers

LAB Week 7: Data Acquisition

ELG3336 Design of Mechatronics System

For the system to have the high accuracy needed for many measurements,

Working with ADCs, OAs and the MSP430

Discrete-Time Signal Processing (DTSP) v14

About the Tutorial. Audience. Prerequisites. Copyright & Disclaimer. Linear Integrated Circuits Applications

Sampling, interpolation and decimation issues

PHYS225 Lecture 22. Electronic Circuits

Analog to Digital Conversion

2. ADC Architectures and CMOS Circuits

BandPass Sigma-Delta Modulator for wideband IF signals

The University of Texas at Austin Dept. of Electrical and Computer Engineering Midterm #1

Cascaded Noise-Shaping Modulators for Oversampled Data Conversion

Implementation of CIC filter for DUC/DDC

LM13600 Dual Operational Transconductance Amplifiers with Linearizing Diodes and Buffers

A Low Power Small Area Multi-bit Quantizer with A Capacitor String in Sigma-Delta Modulator

Lecture 6. Angle Modulation and Demodulation

Chapter-2 SAMPLING PROCESS

Summary Last Lecture

Second-Order Sigma-Delta Modulator in Standard CMOS Technology

Operational Amplifiers

10 bit Delta Sigma D/A Converter with Increased S/N ratio Using Compact Adder Circuits

Computerized Data Acquisition Systems. Chapter 4

Sigma-Delta ADC Tutorial and Latest Development in 90 nm CMOS for SoC

Electrical & Computer Engineering Technology

Chapter 2 Signal Conditioning, Propagation, and Conversion

LIMITATIONS IN MAKING AUDIO BANDWIDTH MEASUREMENTS IN THE PRESENCE OF SIGNIFICANT OUT-OF-BAND NOISE

Sampling and Signal Processing

EECS 452 Midterm Exam (solns) Fall 2012

INF4420 Switched capacitor circuits Outline

Transcription:

SIGMA-DELTA CONVERTER (1995: Pacífico R. Concetti Western A. Geophysical-Argentina) The Sigma-Delta A/D Converter is not new in electronic engineering since it has been previously used as part of many electronic circuits. The new scale in integration and technology makes its application in Seismic Instruments commercially possible today. Sigma-Delta technology in 24 bits A/D Converters is applied in Recording Systems such as: Vision, Input/Output System II, Sercel 388, etc. There are many reasons to adopt the 24 bits Sigma-Delta Converter: It eliminates the use of the I.F.P. Amplifier It eliminates analog filtering (Lo-Cut, Hi-Cut, Anti-alias and Notch Filter). It attenuates A/D conversion noise The I.F.P. Amplifier The Instantaneous Floating Point Amplifier (I.F.P.) allowed for good management of the A/D Converter Dynamic Range, based on the main principle of all electric measuring: the most accurate measurement is obtained when the value measured is closer to the maximum of the measurement scale. The I.F.P. allowed to increase the analog input voltage, reaching voltages close the maximum that the A/D Converter is able to convert to digital. Of course, the amplification was limited (72 db in the I/O System I, 90 db in MDS-16/18). The progressive amplification achieved using various I.F.P. stages involved several electronic circuits, generally complex, that occupied almost 30% of the total volume of a Remote Telemetric Unit of the type mentioned. Another significant problem of the I.F.P. is that it was not able to discriminate Signal/Noise. Let us suppose that a 14-bit conventional A/D Converter plus Sign (84 db Dynamic Range) with a maximum conversion voltage of +/- 10 Volts is connected to an I.F.P. Amplifier of 90dB Maximum Gain (6dB per gain pass). Analog Signal +Vcc= 10V Amplified Analog Signal Sampled I.F.P. 0-90dB A/D Converter 14 bits 13 2 MSB = 5V 0 2 LSB = 0.6mV Figure 1: Conventional A/D Conversion - Vcc = 10V

The most significant bit of this A/D Converter (MSB) represents an analog voltage of +/- 5 Volts. MSB = +/- 5 Volts The less significant bit of this A/D Converter (LSB) represents an analog voltage of : 84 db = 20 Log(10V / LSB)= LSB = +/- 10 V / antilog (84/20) = +/- 0.6 mv The analog voltage 0.6 mv is the minimum analog voltage that may be converted to a digital number, since a lower voltage value present at the A/D input cannot be represented even with the less significant bit: LSB. If a 10-microVolt (noise-free) signal is applied at the I.F.P. input, the amplifier will automatically adjust its floating gain up to the maximum gain: 90 db (about 32,000 times). Therefore, at the I.F.P. output (and A/D input) the analog value will be: 10 microv x 32000 = 320 mili-volts >> 1 LSB As we can see, the input signal exceeds the minimum voltage value (1LSB) and is digitally represented by eleven (11) bits. Now, if at the same point in time, 1 Volt noise is added to the described signal, the I.F.P. will apply a gain of 18 db (8 times), and therefore, the output will be: Signal: 10 microv x 8 = 0.00008 Volts = 0.08 mv < 0.6 mv + Noise: 1 Volt x 8 = 8 Volts Sum result 8.00008 Volts As it may be seen, the signal above cannot be digitally represented now, because its amplitude is lower than the minimum required to occupy one LSB. This phenomenon of seismic signal masking in the presence of noise caused by the action of I.F.P. may be prevented by the following actions: Avoiding the use of an I.F.P. A fixed amplifier could be used, but considering the wide dynamic range of the seismic signal (signals could be reduced or amplified to the point of being digitally lost.) If we do not use amplifiers at all, we could increase the converter s dynamic range to preserve the total dynamic range. With 24 bits the A/D theoretical dynamic range would be: 138 db (about 8 million times). The instrument internal noise could occupy a great proportion of the A/D less significant bits. We should decrease the internal noise of the stage previous to the A/D (and the new A/D) so that the seismic signal can occupy the greater dynamic range possible (By using the Sigma-Delta Converter the effective dynamic range obtained is of 120 db).

Below we will see how the 24 bits Sigma Delta Converter meets almost all the needs mentioned. Anti-Alias Filter vs. Sample Rate We have all heard about the Sampling Theorem and the famous Nyquist Frequency. They represent the elementary law in the information theory that telecommunications engineers know quite well. It states: The sampling frequency of a signal must be at least twice the signal frequency in order to recover the sampled signal. The same theorem is applied to the spatial sampling produced by the physical arrangement of seismic receptors (Geophone Array). Figure 2 shows a sine signal of 10 milliseconds of period (f = 100 Hz). According to the sampling theorem, only two samples per period are enough to meet the theorem s specifications (sampling time: each 5 milliseconds). Figure 2; Sinusoidal signal (Ts = 10 msec.) Sampling every 2 milliseconds However, as only one sampling rate is applied (by the way) to the entire seismic spectrum received, we should adopt a rate that satisfies the shortest acquisition period. Sampling at a rate of 2 msec., the shortest period would be: T = 4 msec Then: As: 1 / T = Frequency Nyquist Frequency = 1 / 4 msec. = 250 Hz.

Another useful way to interpret this law is the following: Let us suppose we have a seismic signal spectrum included within the following band: Minimum Frequency fi and certain maximum frequency: ff. When sampling the signals contained within this frequencies band with a Fm frequency, Lateral Bands are generated at both Fs sides, due to the nonlinear process generated in sampling. The extreme frequencies of these bands will be: Fm - Ff: Lower Lateral Band extreme Fm + Ff: Upper Lateral Band extreme Figure 3: Sampled Signal Spectrum at a fm frequency In Figure 3 we observe how a spectrum (Fi-Ft) is transferred around the Fm sampling frequency. If the spectrum is maintained within certain limits, it does not produce aliasing with the lateral bands. The no-aliasing limit is reached when: Ff = Fm Ff Where: Ff = Fm / 2 = Nyquist Frequency To avoid aliasing between the original spectrum and the lower lateral band, the maximum frequency to be sampled should not exceed the Nyquist Frequency (Fn) (It should not exceed half the Sampling Frequency). For a sampling of: T= 2msec. The sampling frequency is: Fm = 1 / T = 500 Hz.

Therefore, the maximum frequency admitted will be: Fnyquist = Fm / 2 = 250Hz. With this interpretation we reach the same results as those obtained with the Sampling Theorem. But we cannot practically adopt the Nyquist frequency as Cutoff Frequency. In order to separate the original spectrum of the lower lateral band from the probable filter, we should have a Hi-Cut Filter of infinite slope. As we can see in Figure 3, in order to separate overlapping figures (in red), we should vertically cut from fmax=fm-fmax (i.e.,: Infinite Filter Slope = X db / 0 Octaves). No filter, and much less the analog ones, approximate this ideal filter, so we have to take an additional margin to avoid reaching the Nyquist frequency in our seismic spectrum. With the analog filters it is necessary to increase the separation band by one octave in order to avoid introducing aliasing frequencies, considering the filter s physical features. For an analog filter: Maximum Allowable Frequency = Fnyquist / 2 For T = 2msec: Maximum Allowable Frequency = 250 Hz. / 2 = 125 Hz. Therefore, in a conventional system sampling at 2 milliseconds with a conventional A/D Converter we should apply a 125 Hz. Anti-Alias Filter before the sampling stage. The Sigma-Delta Converter includes a first stage where it shows the information at a Fm=256 KHz frequency and, therefore, the maximum frequency allowed is: Maximum Allowable Frequency = 64 KHz. It is evident that in this case we are far from the seismic frequencies expected and, therefore, by using a simple RC active filter we can reject frequencies over 1 KHz, thus simplifying the quantity of circuits and avoiding electrical noise stages. The digital filtering of the seismic signal (Lo-Cut, Hi-Cut and Notch Filters) takes place in a second stage of the A/D Sigma-Delta where the digital slopes are higher and, therefore, we may admit frequencies closer to Nyquist (the I/O II System admits up to ¾ Nyquist F). System Noise A/D Conversion Noise We will now discuss the treatment of noises not generated by the seismic source. These are electrical noises generated in the acquisition system (System Noise). One of the main advantages of the Sigma-Delta Converter is that it makes the conversion noise almost insignificant. An analog signal is sampled and each sample is converted into a number (digit means finger or number). In order to convert an analog sample to digital it is necessary to compare it with discrete values of analog voltages, depending on the quantity of bits in the A/D converter. This process is called Quantization.

Figure 4: Conventional 15 bits A/D Conversion Basic Diagram Amplitude quantification contributes to the generation of white noise in the system. As quantification values are discrete, there is an uncertainty zone between two adjacent levels of comparison. An analog sample will be contained between two comparison voltage values, and the difference in voltages between such values is an LSB (LSB: less significant bit). We may say that the uncertainty zone is extended between -1/2 LSB and + 1/2 LSB and any analog voltage within this bandwidth will be represented by a unique conversion value (which will be one, the center). As a result, the converted value will have a Quantization Error. Probable Density 1 LSB - 1/2 LSB 0 +1/2 LSB Voltage Figure 5: Uncertainty Zone in the conversion process In the frequency domain, this error is considered white noise, i.e., an infinite spectrum noise of equivalent amplitude generated during the A/D conversion. The spectrum amplitude is directly proportional to the quantity of bits applied in quantization and inversely proportional to the sampling frequency.

Amplitude [Volts] K LSB / Fm -Fm/2 +Fm /2 Figure 6: Quantization Spectral Content Figure 6 shows that the white noise spectrum amplitude is higher as the quantity of K bits applied increases, and is lower as the Fm sampling frequency increases. For a conventional A/D Converter (15 bits; LSB = 0.6 mv) that receives samples at 2 msec., the amplitude will be: Spectrum amplitude: 15 x 0.6 mv = 18 micro-volts 500 Hz On the other hand, the Sigma-Delta Converter uses only one bit for initial quantization and its initial sampling frequency is very high (256 KHz). Therefore: Spectrum amplitude: 1 x 2.5 microv = 10 pico-volts 256,000 Hz In order to have a graphical idea of the above, let s suppose that we have a fixed frequency signal Fo sampled at a frequency Fm. The converter adds the white noise amplitude to the signal spectrum Fo as shown in Figure 7. Amplitude [db] Amplitude [db] Fo Fm/2 Frequency [Hz.] Fo Fm/2 Figure 7a: A/D Converter Input Spectrum Figure 7b: A/D Converter Output Spectrum

If after using the A/D converter we apply a High Cut Digital Filter of cutoff frequency Fb (Fb < Fm/2), we would eliminate the white noise frequencies and the Fm/2 sampling frequency that are beyond the Fb. Figure 8 show that the bandwidth continues having a noise of constant amplitude. Amplitude [db] Fo Fb Frequency [Hz.] Figura 8: Bandwidth after Cut-off Frequency Fb Hi-Cut Filter Later we will see that quantization noise decreases in the Sigma-Delta Converter within the seismic bandwidth due to a process called Shaping Filter. The shaping action of the filter allows displacing the noise energy out of the area of our seismic spectrum, although the average noise energy is similar to that of traditional converters. Therefore, the noise will be practically disappeared in our band of interest. Sigma-Delta Converter Operation The Sigma-Delta Converter converts the analog signal to a digital low resolution signal (1 bit) at a very high sampling frequency (256 KHz). Using oversampling techniques (subsequent successive sampling) and digital filtering, the final sampling is reduced (1 KHz, 500 Hz, etc.) and resolution increased (24 bits). We may identify two different stages in the conversion process using the Sigma-Delta Converter: a) Sigma-Delta Modulator b) Digital Filtering (Decimation Filters) SIGMA - DIGITAL Input Signal DELTA Modulator Output Filters Output MODULATOR ( 0 1 KHz.) ( 1 bit; 256 KHz.) FILTER (24 bits; 1 KHz.) Figure 9: Sigma-Delta Converter Block Diagram

a) Sigma-Delta Modulator The modulator performs the noise shaping function mentioned. Figure 10 shows the Modulator Block Diagram. Figure 11 illustrates the different signals produced in the different modulator stages for a given analog input signal. [A]: Analog Input Signal [B]: Summing Junction Output Signal, addition of the Analog Signal and the Reference Signals [C]: Signal at the Comparator s Inverter Input [D]: Signal at the Modulator Output (output bit) B C D Input Signal SUMMING JUNCTION R D A C 256 KHz. CK Output Q +Vref -Vref Figure 10: Modulator Block Diagram The next figures describe the basic operation of the modulator: An analog signal A is present at the modulator s input with three different voltage levels (+5, 0 and 7.5 volts, respectively). The A signal is added in the First Stage of the Modulator to one (of two) Reference Voltages (+/-Vref = +/- 10 Volts). The signal B = A + Vref. Signal B, modifies the charge of the Integrator made up by Resistance R and Condenser C Signal C corresponds to Voltage on the integrator Capacitor C. Signal C is applied to the negative input of a Comparator Circuit. Such comparator compares C Voltage to Zero Volts. The Comparator Input/Output relationship will be: Comparator Input Comparator Output Signal C > 0 Volts 0 Volts Signal C < 0 Volts 5 Volts

The Comparator output (that now represents digital voltages) is applied to a D- Flip/Flop input that is clocked by a 256 HKz clock. Output -Q is the inverted copy of Input D at the time of reception of a Positive Pulse on the clock input CK in the D-Flip/Flop. A +Vref. +5V 0 Volts -Vref. -7.5V B +15V 10V 10V C -5V 5V 2.5V - 12.5-15 D 256 KHz. Figure 11: Example of Modulator Operation Signal D is the only initial bit that represents the analog signal proposed. Note that such is the -Q Flip/Flop output. Also, signal D is used as modulator feedback to exit to a D/A Converter that will operate as switch between the two Reference Voltages (+/- Vref.). Figure 12 shows the Modulator Output for a Sinusoidal type input signal. The density of bits in logic state 1 (+5 Volts) is higher in the sinusoid positive peaks. On the other hand, the density of bits in logic state 0 (-5 Volts) is higher in the sinusoid negative peaks. The minimum bit density (both logic states) is obtained in the zero crossing of the sine wave. In summary: The Analog Signal has been converted to Digital through a density variation in the logic states 0 and 1 (bits stream).

+ 5 Volts o o o o o o o o o o oooooo o o o o o o o o o o o o o - 5 Volts o o o o o o o o o o o o o o ooo o o o o o o o o o o o o Figure 12: Modulator output for a sinusoidal type signal The Modulator s Noise Shaping Function As previously discussed, the modulator is also responsible for the noise shaping function. In order to make the corresponding analysis we will pass on to the frequency domain, where the white noise is represented by an amplitude level that is constant for all frequencies. Thus, instead of applying differential equations that would delay the conclusion desired, we will use elementary algebraic formulas. To that aim, the Sigma- Delta Modulator block diagram (see Figure 10) will be replaced in the frequency domain with a linearized model. X + (x y) H (f) (x y).(1 / f) (x y). (g / f) Analog g Filter - q Y Figure 13: Modulator Linearized Model Figure 13 shows that the Output Y(f) signal is subtracted from the Input X(f) signal. The integrator (or low pass filter) transfer function is inversely proportional to the (1 / f) frequency. Although the advantage of the Sigma-Delta Modulator performance is the design of the integrator, we will simplify its transfer function as follows: 1 / f. The Modulator Quantizer is represented by the Gain Stage g, followed by the addition of the Quantization Noise q. For further simplification, let s suppose that gain is g=1. The equation would be: Y = (x y). (g / f) + q

y = (x y) + q = x - y + q f f f y. (1 + 1 / f) = x / f + q y = x / f + q = (1 + 1/f) (1 + 1/f) y = x + q. f (f + 1) (f + 1) 1. If frequency f 0 then : y x For f=0 output Y is equal to input X, thus disappearing Noise q. 2. If frequency f infinite, then: y q In very high frequencies, the Output y will contain only Noise. From the above it may be derived that the modulator appears to be a low pass filter for the input signal X and a high pass filter for Noise q. The reason for this is that signal X is introduced at the modulator input, but noise q is introduced just before the feedback loop. In summary, the modulator s analog filter behaves as a Noise Shaping Filter, where the noise is attenuated in the seismic signal bandwidth and pushed out to the higher frequencies. Amplitude Seismic Band Of Interest 2 nd. Order Filter 1 st. Order Filter Fo Fb Fs/2 Figure 14: Noise shaping action (Shaping Filter) Figure 14 shows the noise shaping action in relation to the complexity of the filter used. The Sigma-Delta Converter applies fourth order filters to obtain a greater noise shaping in a way that the low pass digital filter of cut-off frequency Fb may cancel the greatest quantity of noise components.

b) Digital Filtering (Second Stage of the Converter) As shown in Figures 11 and 12, the modulator Y output is practically unintelligible. Therefore, in order to clarify it we will: Obtain 1 bit sampling averages so as to produce higher resolution data (Averaging). Filter the quantization and noise shaping frequencies. As sampling will be afterwards reduced to reach conventional values (1, 2 or 4 milliseconds) we should apply an anti-alias filter (low pass = high-cut) of Fb cut-off frequency (Figure 12). As filtering is now digital, Fb can come closer to the Nyquist frequency ( up to ¾ Fnyq). Also generally we can choose the antialias filter characteristic: it may be of Minimum Phase or of Linear Phase. (Filtering with Quantization Noise Removal) Reduction of the sampling frequency (Decimation). Figure 15 is a block diagram of the Sigma-Delta Converter second stage (Digital Filtering). As shown, each stage corresponds to each of the described requirements (Averaging, Filtering and Decimation). STAGE 1 STAGE 2 STAGE 3 1 Bit 12 Bits 24 Bits 24 Bits AVERAGING FILTERING DECIMATION 256 KHz. 32 KHz. Serial (1, 2 ó 4ms) Data Figura 15, Sigma-Delta Converter Second Stage Etapa 1:Averaging In the I/O System II this stage is physically included within the same chip that contains the modulator. Each telemetry box includes one modulator for each seismic channel. The stage consists of arranging 12 bits of the bit stream that enter in series at a rate of 256 KHZ and then exit in parallel at a rate of 32 KHz. Stages 2 and 3: Filtering & Decimation: These stages take place in the I/O system II by means of two DSPs (Digital Signal Processors) arranged to combine filtering and decimation functions. These stages are common for all channels in a telemetry box. Figure 16 shows the decimation corresponding to a discrete signal, where the output signal y(n) has a sampling rate eight times lower than the x(n) input. This situation may be represented by the following equation: s(n): decimation rate y(n) = x(n). s(n)

The decimation and filtering functions may be combined. To understand this, Figure 17 illustrates the spectral result of the process, where: X(w): Input signal spectrum to the decimation filter (modulator output) H(w): Transfer function spectrum Y(w): Output signal spectrum As mentioned, the sampling reduction also requires bandwidth restrictions in order to limit the maximum frequency to 1/2 or ¾ of Nyquist values. X(n): Input Signal S(n) Decimation Rate Y(n) Output Signal Figure 16, Data Rate Reduction (Decimation) The transfer function H(w) determines the digital filter coefficients. Such coefficients may be selected to design any type of filters. The design will be governed by the following general equation: N-1 M y(n) = a(j). x(n-j) - b(k). y(n-k) j=0 k=1 Feedback

Terms a(j) and b(k) are the coefficients that determine the Transfer Function H(w). If, in the equation above, the term corresponding to feedback is zero, the filter is called Finite Impulsive Response Filter (FIR). If the term expressing feedback is other than zero, the filter is an Infinite Impulsive Response Filter (IIR). In the filtering stage of the Sigma-Delta A/D Converter (DSP #2), the I/O System II seismograph applies one FIR filter and three IIR filters. The infinite response filters (IIR) have a better performance with less mathematical calculations due to their feedback features. Such filters also allow a efficient generation of synthesized functions. However, they are technically more difficult to implement, to operate in a stable manner and with an accurate response control. X(w) Input Signal Spectrum H(w) Transfer Function New Sampling Rate ws/2 ws (Original Sample Rate) Y(w) Output Signal Spectrum ws/16 ws/8 ws ws/16 ws Figure 17, Decimation Filter Spectral Interpretation The topics examined thus far to understand the operation of Sigma-Delta A/D Converters may be applied to Sigma-Delta D/A Converters just reversing the sequential order of the stages. Information Sources: The Digital Signal Processing Applications Newsletter Analog Devices, 1990. Vision system Capacitating Course Halliburton Houston Texas USA, 1994. I/O System II Training Course Input Output Stafford Texas USA, 1994.