AN58 Application note VIPer0-E standby application demonstration board Introduction This general flyback circuit can be used to produce any output voltage in primary or secondary mode regulation and is suitable for a multiple output power supply. This application is for a low input power standby power supply and uses the VIPer0DIP-E. The VIPer0-E technology contains a state-of-the-art PWM circuit and a vertical power MOSFET, which is avalanche rugged, on the same silicon chip. It is suitable for off-line wide range input voltage flyback power supplies of up to 0 W (0 W for high input voltage range) in discontinuous mode. This solution has the advantage of using few external components compared to a discrete solution, can be used for primary or secondary regulation, has a burst mode in standby for Blue Angel operation, an external pin is used to set the operating frequency up to 00 khz, an external pin is provided for compensation, has current mode control, a built in current limit and contains thermal protection. April 008 Rev 3 / www.st.com
Contents AN58 Contents General description.......................................... 3 Circuit schematic........................................... 6 3 Waveforms................................................. 7 4 Board legend............................................... 8 5 General circuit description.................................... 9 6 Thermal considerations...................................... 9 7 Transformer considerations................................... 9 8 Performance considerations.................................. 9 9 Cost considerations........................................ 0 0 Revision history........................................... /
AN58 General description General description The following description is for a standby application with a 5 V output voltage, an input power of W and a wide range input voltage (see Figure ). TheVIPer0-E used is an eight pin dip rated for 60 V maximum with a maximum peak drain current of 0.5 A. In the circuit at maximum load, the device has a maximum voltage of 50 V at 64 V AC and a maximum peak current of 0.7 A at 70 V AC. This circuit operates at 4 khz and is set up for primary regulation or secondary regulation with an optoisolator. The circuit contains an input fuse (F), an inrush thermistor (R), EMI filtering (C, L, C8), and a snubber circuit (C3, R). C6, C7 and R5 are used for compensation. D can be used to limit the maximum output power. C and R8 provide extra immunity for lightning strikes. The output transformer (TR) is built by Cramer Coil & Transformer Co., Inc. (CVP 0-00). The component values shown in Table can be used with the schematic for 5 V at 0.0 A minimum, to a maximum output current (I O maximum in Table ) with an input voltage range of 70 to 64 V AC. The 5 V load current, I O, is listed for an input power of W measured at 5 V AC. Case () values, provided in Table, are shown in Figure. Table. Cases observed Case L or U3 R3 R7 D4 ± % Vo Vo ± 5% I O at Pin= W I O max U3 0 k 5. V 6. ±5% 5 V 0.09 A 0. U3 - - 7.3 ±0% 5 V 0.07 A 0. 3 L 80 4.3 V 5. ±5% 5. V 0. A 0.7 For case, the 5 V output is produced with secondary regulation, using a low drop threeterminal regulator, U3, and a pre-regulated input voltage at Vo (see Figure ). In case, the 5 V output is produced with primary regulation and a three terminal regulator U3. The value of R3 is changed and components L, R6, U, R7 and D4 in Figure are not used. In case 3 the 5 V can be produced directly with secondary regulation. A0 µh inductor, L, is used instead of U3 and the values of R3, R7 and D4 are changed in Figure respectively. For wide range temperature applications, the output voltage tolerance may exceed ±5%. The output transformer, TR, is optimized for case but can also be designed for case 3, and for primary mode regulation in case with a standard three terminal regulator. Table. Operating conditions Parameter Limits Input voltage range 70 to 64 V AC Input frequency range 50/60 Hz Temperature range 0 to 55 C Output voltage 5 V (see Table ) Output power (discontinuous) (see Table ) Output power (peak).5 W Line regulation U3 spec. Load regulation U3 spec. 3/
General description AN58 Table. Operating conditions (continued) Parameter Limits Efficiency (see Figure 6) Output ripple voltage <0 mv typical Table 3. Components listing Reference Value Part number Manufacturer BR 600 V, A C 0. µf, 50 V C 0 µf, 400 V C3 47 pf, kv C4 µf, 5 V C5 4.7 nf, 50 V C6 nf, 50 V C7 330 nf, 50 V C8. nf, Y, 0 V C9 470 µf, 6 V C0 0 µf, 6 V C 0.0 µf, 50 V D N4448 STMicroelectronics D 3.3 V, 0.5 W D3 BYW00-00 STMicroelectronics D4 5. V, 0.5 W F 0.5 A, 5x0 mm J 5 mm CON Phoenix J 5 mm CON Phoenix L x3 mh RN0-/0 Schaffner L 0 µh R0 0 Ω R CL0 NTC R 50 Ω, 0.5 W, 5% R3 0 Ω, 0.5 W, 5% R4 0 KΩ, 0.5 W, 5% R5 3.3 KΩ, 0.5 W, 5% R6 39 Ω, 0.5 W, 5% R7 KΩ, 0.5 W, 5% R8 39 Ω, 0.5 W, 5% 4/
AN58 General description Table 3. Components listing (continued) Reference Value Part number Manufacturer TR CVP 0-00 Cramer Coil U VIPer0DIP-E STMicroelectronics U HA87A U3 L493CZ50 STMicroelectronics 5/
Circuit schematic AN58 Circuit schematic Figure. Standby application circuit C L N C4 uf C6 nf Vo Vo 0uF C R CL0 U HA87A R4 0k U OSC VDD 5 DRAIN 3 SOURCE 4 COMP VIPer0-E 4 3 C5 4.7nF R6 39 D4 5.V, 0.5W J CON R3 0 U3 L493CZ50 Vo 3 Vin Rtn. R 47pF 50 R0 zero R5 3.3k C7 330nF C0 0uF D 3.3V, 0.5W C9 470uF J CON BR 4 3 600V,A 4 3 L X 3mH R7 k C3 D N4448 R8 39 C.0uF TR C8.nF D3 BYW00-00.uF F 0.5A 4 8 4 8 6 6 5 5 6/
AN58 Waveforms 3 Waveforms Figure and Figure 3 show typical wave forms of the drain source voltage and the drain current for an input voltage of 5 V AC and maximum load current. Figure. Drain source voltage and drain current Figure 3. Drain source voltage and drain current 7/
Board legend AN58 4 Board legend The components for the major loop (the bulk capacitor C, the primary on the output transformer TR and the VIPer0-E U) are placed in close proximity so that the current loop area is as small as possible. Also, components on the secondary (output rectifier D3, capacitors C9, C0, and transformer output winding TR) are placed in a way that reduces the current loop area. Figure 4 and Figure 5 show the VIPer0-E demonstration board PCB layout. Note that the width of the current loop area used is as small as possible and still meet the voltage spacing requirements. Figure 4. PC board top legend Figure 5. PC board bottom foil 8/
AN58 General circuit description 5 General circuit description The VIPer0-E demonstration board is designed as a discontinuous flyback regulator where the energy is stored in the transformer TR, with primary winding -4, when the VIPer (U) is on and delivered to the output, 6-5, and auxiliary winding, -8, when the VIPer is off. The auxiliary winding provides the bias voltage for the VIPer at the V dd pin. The frequency of operation is determined externally by R4 and C5 at oscillator pin. The output voltage, V O, is regulated with the three terminal regulator U3. The U3 input voltage, Vo, is pre-regulated via the optoisolator, U, with R6, R7, and D4 in order to reduce the input power. The components R5, C6 and C7 are used for compensation. 6 Thermal considerations The demonstration board is single-sided and utilizes one ounce copper for all of the traces. A wide area of copper is used for a pad on the demonstration board to act as a heat sink for the VIPer0DIP-E which will reach a peak Ids current of 0.5 A before a thermal limit. The components which have a thermal limitation for a higher output power applications are the three terminal regulator, U3 (50 ma I O max), and the output transformer, TR (300 ma). 7 Transformer considerations The output transformer has a primary inductance of 5 mh, a ferrite core EE6 with an AL of 50 and is primary - secondary hi-pot tested to 4000 V AC for second. It is wound with a split primary - half on the bottom and half on the top with the auxiliary and output windings in the middle. 8 Performance considerations A three terminal regulator may be used for the lowest output noise and ripple. A 5 V output produced directly can be used for the lowest input power but the output voltage regulation is worse with temperature. A low frequency of operation will reduce the input power and a higher frequency will reduce the size of the transformer. A lower leakage inductance transformer will allow a lower power snubber circuit to reduce the input power. A larger bulk capacitor or full bridge will reduce the input ripple voltage and allow operation at a lower input line or higher load. 9/
Cost considerations AN58 9 Cost considerations A single rectifier can be used instead of an input bridge. Note that the input ripple voltage will be two times as much compared to the full bridge. Primary mode regulation can be used without a three terminal regulator for a greater than 5% regulation requirement. Primary mode regulation can be used with a standard three terminal regulator for 5% regulation. If good coupling and better regulation can be achieved, the input power can be reduced with a lower transformer output voltage for the three terminal regulator input voltage Vo. The efficiency, in Figure 6, is for the VIPer0-E demonstration board for various input voltages at an input power of one watt. Also, the efficiency divided by 00 is the output power for an input power of W. Figure 6. Efficiency vs. V IN at pin = W 0/
AN58 Revision history 0 Revision history Table 4. Document revision history Date Revision Changes -Jun-004 Minor text changes -Apr-007 3 Document reformatted. Minor text changes VIPer0 replaced by VIPer0-E Moved Figure.: Standby application circuit to Section : Circuit schematic Title changed from "VIPer0 DEMOBOARD STAND-BY APPLICATION" to "VIPer0-E standby application demonstration board". /
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