Spce ector Pule Width Modultion Scheme for wo-level oltge Source Inverter P.ripur 1, Y.S.Kihore Bu, Y.R.gore 1 ignn Nirul Intitute of echnology & Science for Women,EEE Dept.,Guntur,A.P.,INDIA Emil: tripur.pidikiti@gmil.com ignn Univerity, dlmudi, School of Electricl Engineering, A.P, INDIA Emil: yku@gmil.com,yrtgore@yhoo.com Atrct Spce ector Pule Width Modultion (SPWM) method i n dvnced, computtion intenive PWM method nd poily the et mong ll the PWM technique for vrile frequency drive ppliction. he SPWM i n lterntive method for the determintion of witching pule width nd their poition. he mjor dvntge of SPWM tem from the fct tht, there i degree of freedom of pce vector plcement in witching cycle. hi feture improve the hrmonic performnce of thi method. hi method h een finding widepred ppliction in recent yer ecue of the eier digitl reliztion nd etter dc u utiliztion. In thi pper, three SPWM cheme, clled 7-egment pce vector modultion (SM), 7-egment SM with even-order hrmonic elimintion nd 5-egment (dicontinuou) SM re tudied in detil. he theoreticl nlyi, deign, witching equence nd SIMULINK implementtion of thee three SM cheme i preented in tep-y-tep mnner. Index erm SPWM, 7-Segment SM, 5-Segment SM, wo -Level Inverter, SIMULINK DOI: 01.IJCSI.0.03.517 I. INRODUCION In recent yer, Spce ector Pule Width Modultion (SPWM) technology grdully otin widepred ppliction in the power electronic nd the electricl drive. It reduce motor xi pultion nd current wveform ditortion, moreover, it DC voltge utiliztion rtio h een enhnced very much which i 70.7% of the DC link voltge (compred to the conventionl Sine-Pule width Modultion 61.%), in the liner modultion rnge nd it i lo eier to relize digitlly [3]. here re three different lgorithm for uing SPWM to modulte the inverter. Mny SPWM cheme hve een invetigted extenively in the literture [5-7]. he gol in ech modultion trtegy i to lower the witching loe, mximize the u utiliztion, reduce hrmonic content nd till chieve precie control. So, the performnce of SPWM cheme i uully judged ed on the following criteri: totl hrmonic ditortion (HD) of the output voltge, witching loe of the inverter nd the mximum output voltge. In thi pper three Spce ector Modultion (SM) cheme clled 7-egment pce vector modultion (SM), 7-egment SM with even-order hrmonic elimintion nd 5- egment (dicontinuou) SM re tudied in detil nd SIMULINK implementtion of thee three SM technique i preented. II. PRINCIPLES OF SPWM SPWM i ed on the fct tht there re only two independent vrile in three-phe voltge ytem. We cn ue orthogonl coordinte to repreent the 3-phe voltge in the phor digrm. A three-phe voltge vector my e repreented 3 1 0 1 3 1 3 A0 B0 C0 In the SPWM cheme, the three phe output voltge i repreented y erence vector, which, rotte t n ngulr peed of =f. he tk of SM i to ue the comintion of witching tte to pproximte the locu of, the eight poile witching tte of the inverter re repreented two null vector vector nd ix ctive vector lited in the le 1. ABLE I. SWICHING SAES OF HE WO LEEL INERER hee vector ( 1 ~ 6 ) cn e ued to frme the vector plne, which i illutrted in Fig: 1. he rotting erence vector cn e pproximted in ech witching cycle y witching etween the djcent ctive vector nd the zero vector. In order to mintin the effective witching frequency t miniml vlue, the equence of the toggling etween thee vector i orgnized in uch wy tht only one leg i ffected in every tep. For given mgnitude nd poition, cn e yntheized y three nery ttionry vector, ed on which, the witching tte of the inverter cn e elected nd gte ignl for the ctive witche cn e generted. When, pe through ector one y one, different et 34 (1)
of witche will e turned on nd off.a reult, when, rotte one revolution in pce, the inverter output voltge vrie one cycle over time. vector determine the SM cheme. here re few option: the null vector 0 only, the null vector 7 only, or comintion of the null vector. A populr SM technique i to lternte the null vector in ech cycle nd to revere the equence fter ech null vector. hi will e erred to the ymmetric 7-egment technique. Fig. 3 how conventionl 7-egment witching equence of ector I. It i hown tht the equence 0-1 - - 0 i ued in the firt /, nd the equence 0 - - - 0 i ued in the econd /. he equence re ymmetricl. he witching frequency i the me mpling frequency of the inverter. Fig.1. Switching vector hexgon hree ttionry vector cn yntheize the erence. he dwell time for the ttionry vector eentilly repreent the duty-cycle time (on-tte or off-tte time) of the choen witche during mpling period of the modultion cheme. he dwell time clcultion i ed on volt-econd lncing principle, tht i, the product of the erence voltge nd mpling period equl the um of the voltge multiplied y the time intervl of choen pce vector. For exmple, when fll into ector I hown in Fig:, it cn e yntheized y 1, nd 0.he volt econd lnce eqution i S 1 0 00 c Fig.. yntheized y 1, nd 0 For liner modultion rnge, the dwell time cn e clculted : 0 3 d 3 d in 3 in( ),0 3 () (3) Fig.3. 7-Segment Switching Sequence for in ector I he SIMULINK Implementtion of the ytem h een crried out in the following equence: Clcultion of 3 phe voltge (MALAB F cn i ued) Clcultion of lph nd het (3 phe to phe trnformtion lock i ued) Clcultion nd lph (Polr to Rectngle lock i ued. he input to thi lock re lph nd het nd output of thi lock re nd lph.) Clcultion of (Su-ytem i hown in Fig.9) Clcultion of ector vlue Clcultion cumultive um of (Su-ytem i hown in Fig. 10) Clcultion of n (Su-ytem i hown in Fig. 11) Determintion of witching tte (look-up tle i ued Reliztion of witching tte (multi-port witch i ued) Derivtion of 6 individul gte pule to two level inverter I. 7 SEGMEN SM WIH EEN ORDER HARMONIC ELIMINAION From the reult of 7 egment SM, it i cler tht, the line-to-line voltge wveform contin even order hrmonic. Since, mot IEEE tndrd hve more tringent requirement on even-order hrmonic thn odd-order hrmonic; thi ection preent modified SM cheme with even-order hrmonic elimintion. o invetigte the mechnim of even order hrmonic elimintion two witching equence for the fll into ector I re hown in Fig: 4. & Fig: 5. Spce vector digrm i hown in Fig: 6. II. 7 SEGMEN SPACE ECRO MODULAION he ector judgment nd ppliction time of ctive vector for ll SM trtegie re the me. he choice of the null DOI: 01.IJCSI.0.03. 517 35
Reliztion of witching tte (me in the 7 egment Derivtion of 6 individul gte pule to two level inverter. FIE SEGMEN SM Fig.4. ype A Switching Sequence for in ector I [trt nd end with (0,0,0)] he witching equence deign i not unique for given et of ttionry vector nd dwell time. Fig: 7 how two five-egment witching equence nd generted inverter terminl voltge for in ector I. For type-a equence, the zero witching te [OOO] i igned for 0 while type- B equence utilize [PPP] for 0. In the five-egment equence, one of the three inverter output terminl i clmped to either the poitive or negtive dc u without ny witching during the mpling period. Furthermore, the witching equence cn e rrnged uch tht the witching in n inverter leg i continuouly uppreed for period of *pi/3 per cycle of the fundmentl frequency. Fig.5. ype B Switching Sequence for in ector I [trt nd end with (P,P,P)] o mke the three-phe line-to-line voltge hlf-wve ymmetricl, ype-a nd ype-b witching equence cn e lterntively ued. In ddition, ech ector in the pce vector digrm i divided into two region hown in Fig. 6. ype-a equence i ued in the non-hded region, while type-b equence i employed in the hded region. Fig.6. Spce vector digrm for even order hrmonic elimintion he SIMULINK Implementtion of the ytem h een crried out in the following equence: Clcultion of 3 phe voltge (me in the 7 egment Clcultion of lph nd het (me in the 7 egment Clcultion nd lph (me in the 7 egment Clcultion of (me in the 7 egment Clcultion of ector vlue (hi tep i different from previou model. Here 1 ector re clculted ech with 30 o ) Clcultion cumultive um of (me in the 7 egment Clcultion of n (me in the 7 egment Determintion of witching tte (look-up tle i ued) Fig.7. Five Segment witching equence he SIMULINK Implementtion of the ytem h een crried out in the following equence Clcultion of 3 phe voltge (me in the 7 egment Clcultion of lph nd het (me in the 7 egment Clcultion nd lph (me in the 7 egment Clcultion of (me in the 7 egment Clcultion of ector vlue (me in the 7 egment Clcultion cumultive um of (Su-ytem i hown in Fig.14) Clcultion of n (Su-ytem i hown in Fig.15) Determintion of witching tte (look-up tle i ued) Reliztion of witching tte (different from 7 egment Derivtion of 6 individul gte pule to two level inverter I. MALAB/SIMULINK MODELS OF HREE SM SCHEMES hi ection detil the tep-y-tep development of MALAB/SIMULINK model of the three SM cheme. DOI: 01.IJCSI.0.03.517 36
A. Simulink model of 7-Segment SM B. Simulink model of 7-Segment SM with even order hrmonic elimintion Fig.8. SIMULINK model of 7-Segment SM Fig.1. SIMULINK model of 7-Segment SM with even order hrmonic elimintion C. Simulink model of 5-Segment SM Fig.13. SIMULINK model of 5-Segment SM Fig.9. SIMULINK model of clcultor Fig.10. SIMULINK model of cumultive ome clcultor Fig.14. SIMULINK model of Cumultive um clcultor for 5- Segment SM Fig.15. SIMULINK model of n lock for 5-Segment SM Fig.11. SIMULINK model of n lock DOI: 01.IJCSI.0.03. 517 37
II. SIMULAION RESULS Simulink model for the three SM cheme were uilt repectively nd the model were run ccording to the following dt: DC Link oltge d =5883, output line voltge line voltge frequency=60hz, R=16.4, L=14. mh. he imultion reult were preented nd =1/70 ec. for ll the three cheme. III. CONCLUSIONS SM i populr choice in the inverter control. hree SM cheme re preented nd nlyzed through imultion. he comprion tudy how tht ll the three SM cheme cn otin the me output voltge in liner modultion region. It w oerved from the hrmonic pectrum of three cheme, the 7-egment SM cheme perform etter in term of HD of the output line voltge. It i lo oerved tht the HD of the 5-egment SM lie etween the HD of 7-egment SM nd &7-egment SM with even order hrmonic elimintion. REFERENCES Fig. 16. Wveform nd FF nlyi of nd =1/70 ec 7-egment vm Fig. 17. Wveform nd FF nlyi of nd =1/70 ec 7-egment SM with even order hrmonic elimintion [1] Bin Wu, High-Power Converter nd AC Drive. IEEE Pre, 006. [] M.Rhid, Power Electronic Peron Prentice Hll,3/e 007. [3] B. K. Boe, Power Electronic nd AC Drive. Peron Prentice Hll, 006. [4] Ned Mohn, Undelnd nd Roin, Power Electronic. Wileyedition, 007. [5] Atif Iql, Adoum Lmine, Imtiz Ahrf nd Mohiullh, MALAB/SIMULINK model of pce vector pwm for threephe voltge ource inverter, in Proc UPEC, 006, p. 1096-1100. [6] Wei-Feng Zhng nd Yue-HuiYu, Comprion of hree SPWM Scheme, in Proc of Journl of Electronic Science nd echnology fo Chin, ol.5, No.3 Septemer 007 p.83-87 [7] Xing Shong nd Hho Ke-You, Reerch on Novel SPWM Algorithm, in Proc. of 007 Second IEEE Conference on Indutril Electronic nd Appliction p.1869-187. [8] Bohu Lng, Mio mio, Weiguo Liu nd Gungzho Luo Simultion nd Experiment Study of Spce ector Pule Width Modultion, in Proc of he Ninth Interntionl Conference onelectronic Meurement & Intrument-ICEMI 009 pg.1-408- 1-41. [9] H. W. vn der Broeck, H.-C. Skudelny, nd G.. Stnke, Anlyi nd reliztion of pule width modultor ed on voltge pce vector, IEEE rn. Indutry Appliction, vol. 4, no. 1, pp. 14-150, 1988. [10] C. Attinee,. Nrdi, nd G. omo, A novel SM trtegy for SI ded-time-effect reduction, IEEE rn. Indutry Appliction, vol. 41, no. 6, pp. 1667-1674, 005. [11] A. M. rzyndlowki, R. L. Kirlin, nd S. F. Legowki, Spce vector PWM technique with minimum witching loe nd vrile pule rte [for SI], IEEE rn. Indutril Electronic, vol. 44, no., pp. 173-181, 1997. [1] B. Hrirm nd N. S. Mrimuthu, Spce vector witching pttern for different ppliction comprtive nlyi, in Proc. IEEE Interntionl Conference on Indutril echnology, Hong Kong, 005, pp. 1444-1449. Fig. 18. Wveform nd FF nlyi of nd =1/70 ec 5-egment SM DOI: 01.IJCSI.0.03.517 38