NSS3MDR2G Dual Matched V, 6. A, Low V CE(sat) NPN Transistor These transistors are part of the ON Semiconductor e 2 PowerEdge family of Low V CE(sat) transistors. They are assembled to create a pair of devices highly matched in all parameters, including ultra low saturation voltage V CE(sat), high current gain and Base/Emitter turn on voltage. Typical applications are current mirrors, differential amplifiers, DCDC converters and power management in portable and battery powered products such as cellular and cordless phones, PDAs, computers, printers, digital cameras and MP3 players. Other applications are low voltage motor controls in mass storage products such as disc drives and tape drives. In the automotive industry they can be used in air bag deployment and in the instrument cluster. The high current gain allows e 2 PowerEdge devices to be driven directly from PMU s control outputs, and the Linear Gain (Beta) makes them ideal components in analog amplifiers. Features Current Gain Matching to % Base Emitter Voltage Matched to 2 mv This is a PbFree Device MAXIMUM RATINGS () Rating Symbol Max Unit Collector-Emitter Voltage V CEO Vdc Collector-Base Voltage V CBO Vdc Emitter-Base Voltage V EBO 6. Vdc Collector Current Continuous I C 3. A Collector Current Peak I CM 6. A Electrostatic Discharge ESD HBM Class 3B MM Class C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. VOLTS 6. AMPS NPN LOW V CE(sat) TRANSISTOR EQUIVALENT R DS(on) m 2 BASE COLLECTOR 7,8 EMITTER BASE SOIC8 CASE 75 STYLE 6 DEVICE MARKING 8 8 N3 AYWW COLLECTOR 5,6 3 EMITTER N3 = Specific Device Code A = Assembly Location Y = Year WW = Work Week = PbFree Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package Shipping NSS3MDR2G SOIC8 (PbFree) 25 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8/D. Semiconductor Components Industries, LLC, 28 May, 28 Rev. Publication Order Number: NSS3MD/D
NSS3MDR2G THERMAL CHARACTERISTICS SINGLE HEATED Total Device Dissipation (Note ) Characteristic Symbol Max Unit P D 576.6 / C Thermal Resistance, JunctiontoAmbient (Note ) R JA 27 C/W Total Device Dissipation (Note 2) P D 676 5. / C Thermal Resistance, JunctiontoAmbient (Note 2) R JA 85 C/W DUAL HEATED (Note 3) Total Device Dissipation (Note ) P D 653 5.2 / C Thermal Resistance, JunctiontoAmbient (Note ) R JA 9 C/W Total Device Dissipation (Note 2) P D 783 6.3 / C Thermal Resistance, JunctiontoAmbient (Note 2) R JA 6 C/W Junction and Storage Temperature Range T J, T stg 55 to +5 C. FR @ mm 2, oz. copper traces, still air. 2. FR @ mm 2, oz. copper traces, still air. 3. Dual heated values assume total power is the sum of two equally powered devices. 2
NSS3MDR2G ELECTRICAL CHARACTERISTICS ( unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS CollectorEmitter Breakdown Voltage (I C = madc, I B = ) V (BR)CEO Vdc CollectorBase Breakdown Voltage (I C =. madc, I E = ) EmitterBase Breakdown Voltage (I E =. madc, I C = ) Collector Cutoff Current (V CB = Vdc, I E = ) Emitter Cutoff Current (V EB = 6. Vdc) ON CHARACTERISTICS DC Current Gain (Note ) (I C = ma, V CE = 2. V) (I C = 5 ma, V CE = 2. V) (I C =. A, V CE = 2. V) (I C = 2. A, V CE = 2. V) (I C = 2. A, V CE = 2. V) (Note 5) CollectorEmitter Saturation Voltage (Note ) (I C =. A, I B =. A) (I C =. A, I B =. A) (I C =. A, I B =. A) (I C = 2. A, I B =.2 A) BaseEmitter Saturation Voltage (Note ) (I C =. A, I B =. A) BaseEmitter Turnon Voltage (Note ) (I C =. A, V CE = 2. V) (I C =. A, V CE = 2. V) (Note 6) Cutoff Frequency (I C = ma, V CE = 5. V, f = MHz) V (BR)CBO V (BR)EBO 6. I CBO. I EBO. h FE h FE()/ h FE(2) V CE(sat) 2 2 8 8.9 35 3 32.99.8..8.82..6.5.5 V BE(sat).78.9 V BE(on) V BE() V BE(2).65.3.75 2. f T Vdc Vdc Adc Adc V V V mv MHz Input Capacitance (V EB =.5 V, f =. MHz) Cibo 32 5 pf Output Capacitance (V CB = 3. V, f =. MHz) Cobo 5 pf SWITCHING CHARACTERISTICS Delay (V CC = 3 V, I C = 75 ma, I B = 5 ma) t d ns Rise (V CC = 3 V, I C = 75 ma, I B = 5 ma) t r ns Storage (V CC = 3 V, I C = 75 ma, I B = 5 ma) t s 78 ns Fall (V CC = 3 V, I C = 75 ma, I B = 5 ma) t f ns. Pulsed Condition: Pulse Width = 3 sec, Duty Cycle 2%. 5. h FE() /h FE(2) is the ratio of one transistor compared to the other transistor within the same package. The smaller h FE is used as numerator. 6. V BE() V BE(2) is the absolute difference of one transistor compared to the other transistor within the same package. 3
NSS3MDR2G TYPICAL CHARACTERISTICS V CE(sat), COLLECTOREMITTER SATURATION VOLTAGE (V).6..2..8.6..2. I C /I B = 5 C.. Figure. Collector Emitter Saturation Voltage vs. Collector Current 55 C V CE(sat), COLLECTOREMITTER SATURATION VOLTAGE (V).3.25.2.5..5. I C /I B =.. 5 C Figure 2. Collector Emitter Saturation Voltage vs. Collector Current 55 C h FE, DC CURRENT GAIN 7 6 5 3 2. 5 C (2. V) (5. V) (2. V) 55 C (5. V) 55 C (2. V).. 5 C (5. V) Figure 3. DC Current Gain vs. Collector Current V BE(sat), BASEEMITTER SATURATION VOLTAGE (V)..9 I C /I B =.8.7.6.5..3.2.. 55 C 5 C. Figure. Base Emitter Saturation Voltage vs. Collector Current V BE(on), BASEEMITTER TURNON VOLTAGE (V)..9.8.7.6.5..3.2. V CE = +2. V. 55 C 5 C. Figure 5. Base Emitter TurnOn Voltage vs. Collector Current V CE(sat), COLLECTOREMITTER VOLTAGE (V)..9.8.7.6.5..3.2.. ma A 2 A 3 A.. I b, BASE CURRENT (A) Figure 6. Saturation Region.
NSS3MDR2G TYPICAL CHARACTERISTICS 8 C ibo, INPUT CAPACITANCE (pf) 375 35 325 3 275 25 225 2 75 5 C ibo (pf) 2 3 5 6 C obo, OUTPUT CAPACITANCE (pf) 7 6 5 3 2 C obo (pf) 5 5 2 25 3 35 V EB, EMITTERBASE VOLTAGE (V) V cb, COLLECTORBASE VOLTAGE (V) Figure 7. Input Capacitance Figure 8. Output Capacitance s ms ms. ms I C (A).. Thermal Limit. Single Pulse Test at... V CE (V dc ) Figure 9. Safe Operating Area 5
NSS3MDR2G PACKAGE DIMENSIONS X B Y 8 A 5 S.25 (.) M Y M SOIC8 NB CASE 757 ISSUE AJ K NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.5M, 982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.. MAXIMUM MOLD PROTRUSION.5 (.6) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.27 (.5) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 75 THRU 756 ARE OBSOLETE. NEW STANDARD IS 757. Z H G D C.25 (.) M Z Y S X S SEATING PLANE. (.) N X 5 M J MILLIMETERS INCHES DIM MIN MAX MIN MAX A.8 5..89.97 B 3.8..5.57 C.35.75.53.69 D.33.5.3.2 G.27 BSC.5 BSC H..25.. J.9.25.7. K..27.6.5 M 8 8 N.25.5..2 S 5.8 6.2.228.2 SOLDERING FOOTPRINT*.52.6 STYLE 6: PIN. EMITTER, DIE # 2. BASE, DIE # 3. EMITTER, DIE #2. BASE, DIE #2 5. COLLECTOR, DIE #2 6. COLLECTOR, DIE #2 7. COLLECTOR, DIE # 8. COLLECTOR, DIE # 7..275..55.6.2.27.5 SCALE 6: mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 827 USA Phone: 33675275 or 83386 Toll Free USA/Canada Fax: 33675276 or 833867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 82829855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 2 33 79 29 Japan Customer Focus Center Phone: 835773385 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NSS3MD/D