MOSFET OptiMOS TM PowerTransistor,6V Features OptimizedforhighperformanceSMPS,e.g.sync.rec. 175 Crated 1%avalanchetested Superiorthermalresistance Nchannel QualifiedaccordingtoJEDEC 1) fortargetapplications Pbfreeleadplating;RoHScompliant HalogenfreeaccordingtoIEC61249221 Highersolderjointreliabilityduetoenlargedsourceinterconnection TDSON8FL(enlargedsourceinterconnection) 8 7 6 5 1 5 2 6 3 7 4 8 4 3 2 1 Table1KeyPerformanceParameters Parameter Value Unit VDS 6 V RDS(on),max 1.45 mω ID 1 A QOSS 1 nc QG(V..1V) 89 nc S 1 S 2 S 3 G 4 8 D 7 D 6 D 5 D Type/OrderingCode Package Marking RelatedLinks TDSON8 FL 14N6NT 1) JSTD2 and JESD22 1 Rev.2.,21731
OptiMOS TM PowerTransistor,6V TableofContents Description............................................................................. 1 Maximum ratings........................................................................ 3 Thermal characteristics.................................................................... 3 Electrical characteristics................................................................... 4 Electrical characteristics diagrams........................................................... 6 Package Outlines....................................................................... 1 Revision History........................................................................ 13 Trademarks........................................................................... 13 Disclaimer............................................................................ 13 2 Rev.2.,21731
OptiMOS TM PowerTransistor,6V 1Maximumratings attj=25 C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Values Min. Typ. Max. Unit Note/TestCondition Continuous drain current ID Pulsed drain current 2) ID,pulse 4 A TC=25 C 1 1 31 A VGS=1V,TC=25 C VGS=1V,TC=1 C VGS=1V,TC=25 C,RthJA=5K/W 1) Avalanche energy, single pulse 3) EAS 58 mj ID=5A,RGS=25Ω Gate source voltage VGS 2 2 V Power dissipation Ptot Operating and storage temperature Tj,Tstg 55 175 C 188 3. W TC=25 C TA=25 C,RthJA=5K/W 1) 2Thermalcharacteristics Table3Thermalcharacteristics Values Parameter Symbol Unit Note/TestCondition Min. Typ. Max. Thermal resistance, junction case, bottom Thermal resistance, junction case, top RthJC.5.8 K/W RthJC 2 K/W Device on PCB, 6 cm 2 cooling area 1) RthJA 5 K/W 1) Device on 4 mm x 4 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 7 µm thick) copper area for drain connection. PCB is vertical in still air. 2) See Diagram 3 for more detailed information 3) See Diagram 13 for more detailed information 3 Rev.2.,21731
OptiMOS TM PowerTransistor,6V 3Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Values Min. Typ. Max. Unit Note/TestCondition Drainsource breakdown voltage V(BR)DSS 6 V VGS=V,ID=1mA Gate threshold voltage VGS(th) 2.1 2.8 3.3 V VDS=VGS,ID=12µA Zero gate voltage drain current IDSS.5 1 1 1 µa VDS=6V,VGS=V,Tj=25 C VDS=6V,VGS=V,Tj=125 C Gatesource leakage current IGSS 1 1 na VGS=2V,VDS=V Drainsource onstate resistance RDS(on) 1.2 1.6 1.45 2.2 Gate resistance 1) RG 2 3 Ω mω VGS=1V,ID=5A VGS=6V,ID=12.5A Transconductance gfs 75 15 S VDS >2 ID RDS(on)max,ID=5A Table5Dynamiccharacteristics 1) Values Parameter Symbol Unit Note/TestCondition Min. Typ. Max. Input capacitance Ciss 65 8125 pf VGS=V,VDS=3V,f=1MHz Output capacitance Coss 15 1875 pf VGS=V,VDS=3V,f=1MHz Reverse transfer capacitance Crss 59 118 pf VGS=V,VDS=3V,f=1MHz Turnon delay time td(on) 23 ns Rise time tr 1 ns Turnoff delay time td(off) 43 ns Fall time tf 11 ns VDD=3V,VGS=1V,ID=3A, RG,ext=2Ω VDD=3V,VGS=1V,ID=3A, RG,ext=2Ω VDD=3V,VGS=1V,ID=3A, RG,ext=2Ω VDD=3V,VGS=1V,ID=3A, RG,ext=2Ω Table6Gatechargecharacteristics 2) Parameter Symbol Values Min. Typ. Max. Unit Note/TestCondition Gate to source charge Qgs 28 nc VDD=3V,ID=5A,VGS=to1V Gate charge at threshold Qg(th) 18 nc VDD=3V,ID=5A,VGS=to1V Gate to drain charge 1) Qgd 16 21 nc VDD=3V,ID=5A,VGS=to1V Switching charge Qsw 26 nc VDD=3V,ID=5A,VGS=to1V Gate charge total 1) Qg 89 14 nc VDD=3V,ID=5A,VGS=to1V Gate plateau voltage Vplateau 4.3 V VDD=3V,ID=5A,VGS=to1V Gate charge total, sync. FET Qg(sync) 78 nc VDS=.1V,VGS=to1V Output charge 1) Qoss 1 125 nc VDD=3V,VGS=V 1) Defined by design. Not subject to production test 2) See Gate charge waveforms for parameter definition 4 Rev.2.,21731
OptiMOS TM PowerTransistor,6V Table7Reversediode Parameter Symbol Values Min. Typ. Max. Unit Note/TestCondition Diode continuous forward current IS 1 A TC=25 C Diode pulse current IS,pulse 4 A TC=25 C Diode forward voltage VSD.84 1.2 V VGS=V,IF=5A,Tj=25 C Reverse recovery time 1) trr 52 83 ns VR=3V,IF=5A,diF/dt=1A/µs Reverse recovery charge Qrr 139 nc VR=3V,IF=5A,diF/dt=1A/µs 1) Defined by design. Not subject to production test 5 Rev.2.,21731
OptiMOS TM PowerTransistor,6V 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation 2 Diagram2:Draincurrent 12 18 16 1 14 8 12 Ptot[W] 1 ID[A] 6 8 6 4 4 2 2 25 5 75 1 125 15 175 2 TC[ C] Ptot=f(TC) 25 5 75 1 125 15 175 2 TC[ C] ID=f(TC);VGS 1V Diagram3:Safeoperatingarea 1 3 Diagram4:Max.transientthermalimpedance 1 1 µs 1 µs.5 1 2.2 ID[A] 1 1 1 µs 1 ms 1 ms DC ZthJC[K/W] 1 1.1.5.2.1 1 1 2 single pulse 1 1 1 1 1 1 1 1 2 VDS[V] ID=f(VDS);TC=25 C;D=;parameter:tp 1 3 1 6 1 5 1 4 1 3 1 2 1 1 1 tp[s] ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.,21731
OptiMOS TM PowerTransistor,6V Diagram5:Typ.outputcharacteristics Diagram6:Typ.drainsourceonresistance 4 36 1 V 7 V 6 V 4 5 V 5.5 V 32 28 5.5 V 3 ID[A] 24 2 16 5 V RDS(on)[mΩ] 2 6 V 7 V 12 8 1 1 V 4..5 1. 1.5 2. VDS[V] ID=f(VDS);Tj=25 C;parameter:VGS 5 1 15 2 25 3 35 4 ID[A] RDS(on)=f(ID);Tj=25 C;parameter:VGS Diagram7:Typ.transfercharacteristics 4 Diagram8:Typ.forwardtransconductance 25 36 32 2 28 24 15 ID[A] 2 gfs[s] 16 1 12 8 5 4 175 C 25 C 2 4 6 VGS[V] ID=f(VGS); VDS >2 ID RDS(on)max;parameter:Tj 2 4 6 8 1 ID[A] gfs=f(id);tj=25 C 7 Rev.2.,21731
OptiMOS TM PowerTransistor,6V Diagram9:Drainsourceonstateresistance 3. Diagram1:Typ.gatethresholdvoltage 5 2.5 4 2. RDS(on)[mΩ] 1.5 max typ VGS(th)[V] 3 2 12 µa 12 µa 1..5 1. 6 2 2 6 1 14 18 Tj[ C] RDS(on)=f(Tj);ID=5A;VGS=1V 6 2 2 6 1 14 18 Tj[ C] VGS(th)=f(Tj);VGS=VDS Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 1 4 Ciss 1 3 25 C 175 C 1 3 Coss 1 2 C[pF] IF[A] 1 2 1 1 Crss 1 1 2 4 6 VDS[V] C=f(VDS);VGS=V;f=1MHz 1..5 1. 1.5 VSD[V] IF=f(VSD);parameter:Tj 8 Rev.2.,21731
OptiMOS TM PowerTransistor,6V Diagram13:Avalanchecharacteristics 1 2 Diagram14:Typ.gatecharge 12 25 C 1 3 V 12 V 48 V 1 C 8 IAV[A] 1 1 15 C VGS[V] 6 4 2 1 1 1 1 1 2 1 3 tav[µs] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) 2 4 6 8 1 Qgate[nC] VGS=f(Qgate);ID=5Apulsed;parameter:VDD Diagram15:Drainsourcebreakdownvoltage 7 Gate charge waveforms 66 62 VBR(DSS)[V] 58 54 5 6 2 2 6 1 14 18 Tj[ C] VBR(DSS)=f(Tj);ID=1mA 9 Rev.2.,21731
OptiMOSTM PowerTransistor, 6 V 5 Package Outlines Figure 1 Outline TDSON8 FL, dimensions in mm/inches 1 Rev. 2., 21731
OptiMOSTM PowerTransistor, 6 V Figure 2 Outline Footprint (TDSON8 FL) 11 Rev. 2., 21731
OptiMOSTM PowerTransistor, 6 V Figure 3 Outline Tape (TDSON8 FL ) 12 Rev. 2., 21731
OptiMOSTM PowerTransistor, 6 V Revision History Revision: 21731, Rev. 2. Previous Revision Revision Date Subjects (major changes since last revision) 2. 21731 Release of final version Trademarks of Infineon Technologies AG AURIX, C166, CanPAK, CIPOS, CoolGaN, CoolMOS, CoolSET, CoolSiC, CORECONTROL, CROSSAVE, DAVE, DIPOL, DrBlade, EasyPIM, EconoBRIDGE, EconoDUAL, EconoPACK, EconoPIM, EiceDRIVER, eupec, FCOS, HITFET, HybridPACK, Infineon, ISOFACE, IsoPACK, iwafer, MIPAQ, ModSTACK, myd, NovalithIC, OmniTune, OPTIGA, OptiMOS, ORIGA, POWERCODE, PRIMARION, PrimePACK, PrimeSTACK, PROFET, PROSIL, RASIC, REAL3, ReverSave, SatRIC, SIEGET, SIPMOS, SmartLEWIS, SOLID FLASH, SPOC, TEMPFET, thinq, TRENCHSTOP, TriCore. Trademarks updated August 215 Other Trademarks All referenced product or service names and trademarks are the property of their respective owners. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: erratum@infineon.com Published by Infineon Technologies AG 81726 München, Germany 217 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ( Beschaffenheitsgarantie ). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of noninfringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s products and any use of the product of Infineon Technologies in customer s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. The Infineon Technologies component described in this Data Sheet may be used in lifesupport devices or systems and/or automotive, aviation and aerospace applications or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that lifesupport, automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. 13 Rev. 2., 21731