RT mA, Low Dropout, Low Noise Ultra-Fast With Soft Start CMOS LDO Regulator. General Description. Features. Applications

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RT92 5mA, Low Dropout, Low Noise Ultra-Fast With Soft Start CMOS LDO Regulator General Description The RT92 is a high-performance, 5mA LDO regulator, offering extremely high PSRR and ultra-low dropout, ideal for portable RF and wireless applications with demanding performance and space requirements. The RT92 quiescent current is as low as 25μA, further prolonging the battery life. The RT92 also works with low-esr ceramic capacitors, reducing the amount of board space necessary for power applications, critical in handheld wireless devices. The RT92 consumes typical.7μa in shutdown mode and has fast turn-on time less than 7μs (without C SS ). The other features include ultra-low dropout voltage, high output accuracy, current limiting protection, and high ripple rejection ratio. Tiny packages SOT-23-5 and SC-7-5 are available. Ordering Information - RT92 Note : Richtek products are : Package Type B : SOT-23-5 U5 : SC-7-5 Lead Plating System P : Pb Free G : Green (Halogen Free and Pb Free) Fixed Output Voltage 12 : 1.2V 15 : 1.5V 16 : 1.6V : 32 : 3.2V 33 : 3.3V 1B : 1.25V 1H : 1.85V 2H : 2.85V RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-2. Suitable for use in SnPb or Pb-free soldering processes. Features Wide Operating Voltage Ranges : 2.2V to 5.5V Low Dropout : 25mV at 5mA 5mA Discharge Current of when IC Shutdown Ultra-Low-Noise for DSC Application Ultra-Fast Response in Line/Load Transient Current Limiting Protection Thermal Shutdown Protection High Power Supply Rejection Ratio Output Only 1μF Capacitor Required for Stability TTL-Logic-Controlled Shutdown Input RoHS Compliant and 1% Lead (Pb)-Free Moisture Sensitivity Level : Level 3 Applications Digital Still Camera CDMA/GSM Cellular Handsets Portable Information Appliances Laptop, Palmtops, Notebook Computers Mini PCI & PCI-Express Cards PCMCIA & New Cards Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area. Pin Configuration TOP VIEW VOUT SS 5 4 2 3 VIN GND EN SOT-23-5 / SC-7-5 1

Typical Application Circuit V IN C IN 1uF/ X7R VIN RT92 VOUT C OUT 1uF/ X7R Chip Enable EN GND SS C SS.5nF Functional Pin Description Pin Number Pin Name Pin Function 1 VIN Supply input. 2 GND Common ground. 3 EN 4 SS Soft start. 5 VOUT Regulator output. Enable input logic, active high. When the EN goes to a logic low, the device will be shutdown. Functional Block Diagram SS EN 1µA POR OTP V REF - + Current Limit MOS Driver VIN VOUT GND 2

Absolute Maximum Ratings (Note 1) Supply Input Voltage ------------------------------------------------------------------------------------------------------ 6V EN Input Voltage ----------------------------------------------------------------------------------------------------------- 6V Power Dissipation, P D @ T A = 25 C SOT-23-5 --------------------------------------------------------------------------------------------------------------------.4W SC-7-5 ----------------------------------------------------------------------------------------------------------------------.3W RT92 Package Thermal Resistance (Note 2) SOT-23-5, θ JA --------------------------------------------------------------------------------------------------------------- 25 C/W SC-7-5, θ JA ---------------------------------------------------------------------------------------------------------------- 333 C/W Lead Temperature (Soldering, 1 sec.) ------------------------------------------------------------------------------- 26 C Junction Temperature ----------------------------------------------------------------------------------------------------- 15 C Storage Temperature Range -------------------------------------------------------------------------------------------- 65 C to 15 C ESD Susceptibility (Note 3) HBM (Human Body Model) ---------------------------------------------------------------------------------------------- 2kV MM (Machine Model) ----------------------------------------------------------------------------------------------------- 2V Recommended Operating Conditions (Note 4) Supply Input Voltage ------------------------------------------------------------------------------------------------------ 2.2V to 5.5V Junction Temperature Range -------------------------------------------------------------------------------------------- Ambient Temperature Range -------------------------------------------------------------------------------------------- Electrical Characteristics (VIN = VOUT +.5V, VEN = VIN, CIN = COUT = 1μF (Ceramic), TA = 25 C unless otherwise specified) 4 C to 125 C 4 C to 85 C Parameter Symbol Test Conditions Min Typ Max Unit Input Voltage Range VIN 2.2 -- 5.5 V Output Noise Voltage Output Voltage Accuracy (Fixed Output Voltage) VON VOUT = 1.5V, COUT = 1 F, IOUT = ma, CSS = 1nF -- 4 -- VRMS VOUT IOUT = 1mA 2 +2 % Quiescent Current (Note 5) IQ VEN = 5V, IOUT = ma -- 25 5 A Standby Current ISTBY VEN = V --.7 1.5 A Current Limit ILIM Dropout Voltage (Note 6) VDROP Load Regulation (Note 7) (Fixed Output Voltage) VLOAD RLOAD =, 2.2V VIN < 2.6V.4.7 1.5 RLOAD =, 2.7V VIN 5.5V.5.8 1.5 IOUT = 4mA, 2.2V VIN < 2.7V -- 16 32 IOUT = 5mA, 2.7V VIN 5.5V -- 25 4 1mA < IOUT < 4mA 2.2V VIN < 2.7V 1mA < IOUT < 5mA 2.7V VIN 5.5V -- --.6 -- -- 1 Soft Start Time VOUT = 2.5V, CSS = 1nF --.7 1 ms A mv % 3

Parameter Symbol Test Conditions Min Typ Max Unit EN Threshold Logic-Low Voltage VIL --.6 Logic-High Voltage VIH 1.6 -- 5.5 V Enable Pin Current IEN.1 1 5 A Power Supply Rejection Rate f = 1kHz PSRR IOUT = 1mA -- 55 -- db Line Regulation VLINE VIN = (VOUT+.5) to 5.5V, IOUT = 1mA --.1.2 %/V Thermal Shutdown Temperature TSD -- 17 -- Thermal Shutdown Hysteresis TSD -- 3 -- C Note 1. Stresses beyond those listed Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θ JA is measured at T A = 25 C on a low effective thermal conductivity single-layer test board per JEDEC 51-3. Note 3. Devices are ESD sensitive. Handling precaution recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Quiescent, or ground current, is the difference between input and output currents. It is defined by I Q = I IN - I OUT under no load condition (I OUT = ma). The total current drawn from the supply is the sum of the load current plus the ground pin current. Note 6. The dropout voltage is defined as V IN -, which is measured when is (NORMAL) - 1mV. Note 7. Regulation is measured at constant junction temperature by using a 2ms current pulse. Devices are tested for load regulation in the load range from 1mA to 5mA. 4

Typical Operating Characteristics (C IN = C OUT = 1uF/X7R, C SS = 1nF, unless otherwise specified) 3.4 Output Voltage vs. Temperature VIN = 5.V 3 Dropout Voltage vs. Load Current VOUT = 3.3V 3.35 25 TJ = 125 C Output Voltage (V) 3.3 3.25 3.2 3.15 Dropout Voltage (mv) 2 15 1 5 TJ = 25 C TJ = -4 C 3.1-5 -25 25 5 75 1 125 Temperature ( C) 1 2 3 4 5 Load Current (ma) 5 Quiescent Current vs. Temperature VIN = 4.5V, VOUT = 3.3V 1 VIN = 5.V, VOUT = 3.3V Soft Start Time Quiescent Current (ua) 4 3 2 1 Soft Start Time (us) (ms) 8 8 6 6 4 4 2 2-5 -25 25 5 75 1 125 Temperature ( C) 1 2 3 4 5 6 7 8 9 1 Css (nf) Start Up VIN = 4.5V, VOUT = 3.1V, CSS = 22nF, No Load EN Pin Shutdown Response VIN = 4.5V, VOUT = 3.3V, No Load V EN (5V/Div) V EN (5V/Div) VOUT (1V/Div) I IN (5mA/Div) (2V/Div) I IN (5mA/Div) Time (1ms/Div) Time (5ms/Div) 5

Load Transient Response VIN = 4.5V, VOUT = 3.1V, ILOAD = 1mA to 3mA Load Transient Response VIN = 4.5V, VOUT = 3.1V, ILOAD = 5mA to 25mA I LOAD (2mA/Div) I LOAD (2mA/Div) (1mV/Div) (1mV/Div) Time (25μs/Div) Time (1μs/Div) Line Transient Response VIN = 4V to 5V, VOUT = 3.1V, ILOAD = 1mA Line Transient Response VIN = 4V to 5V, VOUT = 3.1V, ILOAD = 1mA 5 5 VIN (V) 4 VIN (V) 4 (1mV/Div) (1mV/Div) Time (1μs/Div) Time (1μs/Div) 2 1 VIN = 4.5V, VOUT = 3.3V VIN,AC = 1m VP-P PSRR 3 Noise VIN = 4.5V (By battery), VOUT = 3.3V, No Load ILOAD = 1mA 2 PSRR(dB) -1-2 -3-4 Noise (μv/div) 1-1 -5-2 -6 ILOAD = 1mA -3-7.1 1 1.1 1 1 1 1 1 Frequency (khz) (Hz) Time (1ms/Div) 6

Applications Information Like any low-dropout regulator, the external capacitors used with the RT92 must be carefully selected for regulator stability and performance. The recommended input and output capacitors should be 1μF or greater X7R/X5R ceramic.the input capacitor must be located a distance not more than.5 inch from the input pin of the IC and returned to a clean analog ground. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDOs application. The RT92 is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 1μF with ESR > 2mΩ on the RT92 output ensures stability. The RT92 still works well with output capacitor of other types due to the wide stable ESR range. Figure 1. shows the curves of allowable ESR range as a function of load current for various output capacitor values. Output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output capacitor should be located not more than.5 inch from the VOUT pin of the RT92 and returned to a clean analog ground. Region of Stable COUT ESR (Ω) 1 Region of Stable C OUT ESR vs. Load Current 1 1.1 Figure 1 Unstable Range Stable Range.1 Unstable Range by Simulation RT92-33PB, VIN = 5V CIN = COUT = 1μF/X7R.1 1 2 3 4 5 Load Current (ma) Enable The RT92 goes into shutdown mode when the EN pin is in a logic low condition. During this condition, the RT92 has an EN pin to turn on or turn off regulator, When the EN pin is logic high, the regulator will be turned on. The supply current in shutdown mode is as low as.7μa typically. The EN pin may be directly tied to V IN to keep the part on. PSRR The power supply rejection ratio (PSRR) is defined as the gain from the input to output divided by the gain from the supply to the output. The PSRR is found to be PSRR 2 log Gain Error Supply Note that when heavy load measuring, Δsupply will cause Δtemperature. And Δtemperature will cause Δoutput voltage change. So the heavy load PSRR measuring includes temperature effect. Current limit The RT92 contains an independent current limiter, which monitors and controls the pass transistor's gate voltage, limiting the output current to.7a (typ.). The output can be shorted to ground indefinitely without damaging the part. Thermal Considerations Thermal protection limits power dissipation in RT92. When the operation junction temperature exceeds 17 C, the OTP circuit starts the thermal shutdown function and turns the pass element off. The pass element turn on again after the junction temperature cools by 3 C. For continuous operation, do not exceed absolute maximum operation junction temperature 125 C. The power dissipation definition in device is : P D = (V IN ) x I OUT + V IN x I Q The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can 7

be calculated by following formula : P D(MAX) = ( T J(MAX) T A ) /θ JA Where T J(MAX) is the maximum operation junction temperature, T A is the ambient temperature and the θ JA is the junction to ambient thermal resistance. For recommended operating conditions specification, where T J(MAX) is the maximum junction temperature of the die (125 C) and T A is the operated ambient temperature. The junction to ambient thermal resistance θ JA (θ JA is layout dependent) for SOT-23-5 package is 25 C/W and SC-7-5 package is 333 C/W on the standard JEDEC 51-3 single-layer thermal test board. The maximum power dissipation at T A = 25 C can be calculated by following formula : P D(MAX) = (125 C 25 C) / 25 =.4W for SOT-23-5 packages P D(MAX) = (125 C 25 C) / 333 =.3W for SC-7-5 packages The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θ JA. The Figure 2 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed..7 Single Layer PCB Power Dissipation (W).6.5.4.3.2.1 SOT-23-5 SC-7-5 12.5 25 37.5 5 62.5 75 87.5 1 113 125 Ambient Temperature ( C) Figure 2. Derating Curve of Maximum Power Dissipation 8

Outline Dimension D H L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A.889 1.295.35.51 A1..152..6 B 1.397 1.83.55.71 b.356.559.14.22 C 2.591 2.997.12.118 D 2.692 3.99.16.122 e.838 1.41.33.41 H.8.254.3.1 L.3.61.12.24 SOT-23-5 Surface Mount Package 9

D H L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A.8 1.1.31.44 A1..1..4 B 1.15 1.35.45.54 b.15.4.6.16 C 1.8 2.45.71.96 D 1.8 2.25.71.89 e.65.26 H.8.26.3.1 L.21.46.8.18 SC-7-5 Surface Mount Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1 st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. 1