MMBZxxxALT1G Series, SZMMBZxxxALT1G Series. 24 and 40 Watt Peak Power Zener Transient Voltage Suppressors

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MMBZxxxALTG Series, SZMMBZxxxALTG Series 24 and 4 Watt Peak Power Zener Transient Voltage Suppressors Dual Common Anode Zeners for ESD Protection These dual monolithic silicon Zener diodes are designed for applications requiring transient overvoltage protection capability. They are intended for use in voltage and ESD sensitive equipment such as computers, printers, business machines, communication systems, medical equipment and other applications. Their dual junction common anode design protects two separate lines using only one package. These devices are ideal for situations where board space is at a premium. Features Package Allows Either Two Separate Unidirectional Configurations or a Single Bidirectional Configuration Working Peak Reverse Voltage Range 3 V to 26 V Standard Zener Breakdown Voltage Range 5.6 V to 33 V Peak Power 24 or 4 W @. ms (Unidirectional), per Figure 6 Waveform ESD Rating: Class 3B (> 6 kv) per the Human Body Model Class C (> 4 V) per the Machine Model Maximum Clamping Voltage @ Peak Pulse Current Low Leakage < 5. A Flammability Rating UL 94 V AEC Q Qualified and PPAP Capable SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements Pb Free Packages are Available* Mechanical Characteristics CASE: Void-free, transfer-molded, thermosetting plastic case FINISH: Corrosion resistant finish, easily solderable MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES: 26 C for Seconds Package designed for optimal automated board assembly Small package size for high density applications Available in 8 mm Tape and Reel Use the Device Number to order the 7 inch/3, unit reel. Replace the T with T3 in the Device Number to order the 3 inch/, unit reel. CATHODE CATHODE 2 CASE 38 STYLE 2 MARKING DIAGRAM xxxm ORDERING INFORMATION 3 ANODE xxx = Specific Device Code M = Date Code = Pb Free Package (Note: Microdot may be in either location) See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. DEVICE MARKING INFORMATION See specific marking information in the device marking column of the table on page 3 of this data sheet. *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 22 January, 22 Rev. 3 Publication Order Number: MMBZ5V6ALT/D

MAXIMUM RATINGS Peak Power Dissipation @. ms (Note ) @ T L 25 C Rating Symbol Value Unit MMBZ5V6ALTG thru MMBZ9VALTG MMBZ2VALTG thru MMBZ33VALTG P pk 24 4 W Total Power Dissipation on FR 5 Board (Note 2) @ T A = 25 C Derate above 25 C P D 225.8 mw mw/ C Thermal Resistance Junction to Ambient R JA 556 C/W Total Power Dissipation on Alumina Substrate (Note 3) @ T A = 25 C Derate above 25 C P D 3 2.4 mw mw/ C Thermal Resistance Junction to Ambient R JA 47 C/W Junction and Storage Temperature Range T J, T stg 55 to +5 C Lead Solder Temperature Maximum ( Second Duration) T L 26 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Non repetitive current pulse per Figure 6 and derate above T A = 25 C per Figure 7. 2. FR 5 =. x.75 x.62 in. 3. Alumina =.4 x.3 x.24 in, 99.5% alumina. *Other voltages may be available upon request. ORDERING INFORMATION MMBZ5V6ALTG SZMMBZ5V6ALTG MMBZ5V6ALT3G MMBZ6VxALTG SZMMBZ6VxALTG MMBZ6VxALT3G MMBZ9VALTG MMBZ9VALT3G MMBZxxVALTG SZMMBZxxVALTG MMBZxxVALT3G SZMMBZxxVALT3G Device Package Shipping, / Tape & Reel, / Tape & Reel, / Tape & Reel, / Tape & Reel, / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D. 2

ELECTRICAL CHARACTERISTICS (T A = 25 C unless otherwise noted) UNIDIRECTIONAL (Circuit tied to Pins and 3 or 2 and 3) Symbol I PP Parameter Maximum Reverse Peak Pulse Current I V C V RWM I R Clamping Voltage @ I PP Working Peak Reverse Voltage Maximum Reverse Leakage Current @ V RWM I F V BR I T V BR Breakdown Voltage @ I T Test Current Maximum Temperature Coefficient of V BR V RWM V C V BR I R I T V F V I F Forward Current V F Forward Voltage @ I F Z ZT Maximum Zener Impedance @ I ZT I PP I ZK Reverse Current Z ZK Maximum Zener Impedance @ I ZK Uni Directional TVS ELECTRICAL CHARACTERISTICS (T A = 25 C unless otherwise noted) UNIDIRECTIONAL (Circuit tied to Pins and 3 or Pins 2 and 3) (V F =.9 V Max @ I F = ma) 24 WATTS Device* Device Marking Breakdown Voltage Max Zener Impedance (Note 5) V C @ I PP (Note 6) V RWM I R @ V RWM V BR (Note 4) (V) @ I T Z ZT @ I ZT Z ZK @ I ZK V C I PP V BR Volts A Min Nom Max ma ma V A mv/ C MMBZ5V6ALTG/T3G 5A6 3. 5. 5.32 5.6 5.88 2 6.25 8. 3..26 MMBZ6V2ALTG 6A2 3..5 5.89 6.2 6.5. 8.7 2.76 2.8 MMBZ6V8ALTG 6A8 4.5.5 6.46 6.8 7.4. 9.6 2.5 3.4 MMBZ9VALTG 9A 6..3 8.65 9. 9.56. 4.7 7.5 (V F =.9 V Max @ I F = ma) 4 WATTS Device* Device Marking Breakdown Voltage V I R @ C @ I PP (Note 6) V RWM V RWM V BR (Note 4) (V) @ I T V C I PP V BR Volts na Min Nom Max ma V A mv/ C MMBZ2VALTG 2A 8.5 2.4 2 2.6. 7 2.35 7.5 MMBZ5VALTG 5A 2 5 4.25 5 5.75. 2.9 2.3 MMBZ8VALTG 8A 4.5 5 7. 8 8.9. 25.6 5.3 MMBZ2VALTG 2A 7 5 9. 2 2.. 28.4 7.2 MMBZ27VALTG/T3G 27A 22 5 25.65 27 28.35. 4. 24.3 MMBZ33VALTG 33A 26 5 3.35 33 34.65. 46.87 3.4 4. V BR measured at pulse test current I T at an ambient temperature of 25 C. 5. Z ZT and Z ZK are measured by dividing the AC voltage drop across the device by the AC current applied. The specified limits are for I Z(AC) =. I Z(DC), with the AC frequency =. khz. 6. Surge current waveform per Figure 6 and derate per Figure 7 * Include SZ-prefix devices where applicable. 3

TYPICAL CHARACTERISTICS BREAKDOWN VOLTAGE (VOLTS) (V BR @ I T ) 8 5 2 9 6 3 4 +5 + +5 TEMPERATURE ( C) Figure. Typical Breakdown Voltage versus Temperature (Upper curve for each voltage is bidirectional mode, lower curve is unidirectional mode) I R (na).. 4 +25 +85 +25 TEMPERATURE ( C) Figure 2. Typical Leakage Current versus Temperature 32 6 C, CAPACITANCE (pf) 28 24 2 6 2 8 4 5.6 V 5 V C, CAPACITANCE (pf) 5 4 3 2 33 V 27 V 2 3 BIAS (V) Figure 3. Typical Capacitance versus Bias Voltage (Upper curve for each voltage is unidirectional mode, lower curve is bidirectional mode) 2 3 BIAS (V) Figure 4. Typical Capacitance versus Bias Voltage (Upper curve for each voltage is unidirectional mode, lower curve is bidirectional mode) P D, POWER DISSIPATION (mw) 3 25 2 5 5 FR 5 BOARD ALUMINA SUBSTRATE 25 5 75 25 5 75 TEMPERATURE ( C) Figure 5. Steady State Power Derating Curve 4

TYPICAL CHARACTERISTICS VALUE (%) 5 t r s PEAK VALUE I PP t P PULSE WIDTH (t P ) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAYS TO 5% OF I PP. HALF VALUE I PP 2 2 3 4 PEAK PULSE DERATING IN % OF PEAK POWER OR CURRENT @ T A = 25 C 9 8 7 6 5 4 3 2 25 5 75 25 5 75 2 t, TIME (ms) Figure 6. Pulse Waveform T A, AMBIENT TEMPERATURE ( C) Figure 7. Pulse Derating Curve P pk, PEAK SURGE POWER (W) UNIDIRECTIONAL RECTANGULAR WAVEFORM, T A = 25 C BIDIRECTIONAL P pk, PEAK SURGE POWER (W) UNIDIRECTIONAL BIDIRECTIONAL RECTANGULAR WAVEFORM, T A = 25 C. PW, PULSE WIDTH (ms) Figure 8. Maximum Non repetitive Surge Power, P pk versus PW Power is defined as V RSM x I Z (pk) where V RSM is the clamping voltage at I Z (pk).. PW, PULSE WIDTH (ms) Figure 9. Maximum Non repetitive Surge Power, P pk (NOM) versus PW Power is defined as V Z (NOM) x I Z (pk) where V Z (NOM) is the nominal Zener voltage measured at the low test current used for voltage classification. 5

TYPICAL COMMON ANODE APPLICATIONS A quad junction common anode design in a package protects four separate lines using only one package. This adds flexibility and creativity to PCB design especially when board space is at a premium. Two simplified examples of TVS applications are illustrated below. Computer Interface Protection A KEYBOARD TERMINAL PRINTER ETC. I/O B C D FUNCTIONAL DECODER GND MMBZ5V6ALTG THRU MMBZ33VALTG Microprocessor Protection V DD ADDRESS BUS V GG RAM ROM I/O DATA BUS CPU CLOCK MMBZ5V6ALTG THRU MMBZ33VALTG CONTROL BUS GND MMBZ5V6ALTG THRU MMBZ33VALTG 6

PACKAGE DIMENSIONS (TO 236) CASE 38 8 ISSUE AP A E A D 3 2 e b HE SEE VIEW C L L VIEW C c.25 NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, 982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A.89...35.4.44 A..6...2.4 b.37.44.5.5.8.2 c.9.3.8.3.5.7 D 2.8 2.9 3.4..4.2 E.2.3.4.47.5.55 e.78.9 2.4.7.75.8 L..2.3.4.8.2 L.35.54.69.4.2.29 H E 2. 2.4 2.64.83.94.4 STYLE 2: PIN. CATHODE 2. CATHODE 3. ANODE.95.37 SOLDERING FOOTPRINT.95.37.9.35.8.3 SCALE : 2..79 mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 827 USA Phone: 33 675 275 or 8 344 386 Toll Free USA/Canada Fax: 33 675 276 or 8 344 3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 8 282 9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 42 33 79 29 Japan Customer Focus Center Phone: 8 3 587 5 7 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MMBZ5V6ALT/D