Am79R100/101 Vs Am79R79 Device Comparison Brief

Am79R100/101 Vs Am79R79 Device Comparison Brief This article is a component of the Legerity RSLIC device documentation family; it discusses the unique features of the Am79R100/101 devices, the similarities between the Am79R100/101 device features and the Am79R79 device features, as well as the differences between each device. TABLE OF CONTENTS Table of Contents... 1 What s new?... 2 Sinusoidal Ringing Waveform... 2 1. Sinusoidal Ringing Without DC offset... 3 2. Sinusoidal Ringing with DC Offset on the Vring Pin or the Rref Pin... 3 3. Sinusoidal Ringing with DC Offset Between the Rref Pin and the Vring Pin... 3 4. Zarlink SLAC Device Interface... 4 DC Feed... 6 Anti-Saturation Region... 6 Ring Trip... 8 UL... 8 Protection Circuit... 8 Pinout Difference... 8 Power Dissipation... 9 Pub. # 080458 Rev: C Amendment: /0 Issue Date: June 2001

WHAT S NEW? Some applications in Europe require sinusoidal ringing. All the companies in Korea require sinusoidal ringing of 70-90 volts, regardless of the application. We have found that some phones will not ring with the Am79R79 device because they require a higher ringing voltage or DC offset ringing, which are not required in TR57/TR909. In order to address broader markets and meet these challenging applications, Zarlink has introduced the Am79R100 device and the Am79R101 device. Each has balanced trapezoidal and sine wave ringing, and provides DC offset operation at up to a 100 V battery. These new products raise the Zarlink Ringing SLIC device family to a new level. The Am79R79 device, which provides balanced trapezoidal ringing, is sufficient for 5 REN in a short loop (TR909) application. Its 70 Vpk provides 50 Vrms (with a crest factor of 1.25 to a load of 1400 Ω with 2 x Rf = 100 Ω and Rline = 70 Ω, for a total = 1570 Ω). The Am79R100 device has a higher ringing voltage. Its 90 Vpk provides 64 Vrms (with a crest factor of 1.25 to a load of 1400 Ω with 2 x Rf = 100 Ω and Rline = 70 Ω, for a total = 1570 Ω). Note that the Am79R101 device has less driving ability than the Am79R100 device due to its sine wave and 1.4 crest factor. The unique features of the Am79R100/101 devices will ring those hard-to-ring phones or push the loop length even further with the same ringer load. Sinusoidal Ringing Waveform The sinusoidal ringing waveform generated through the Am79R101 device has an advantageously low distortion, and satisfies the traditional ringing waveform requirements of small PBX, WLL, and Pairgain applications. It also has less crosstalk than trapezoidal ringing for large PBX applications in multi-pair cable transmission. The Am79R101 device also offers offset ringing, which is created by applying a DC bias voltage on the Rref or Vring pins, and satisfies most phones that require an offset from ring to tip during the ringing. However, it should be noted that trapezoidal ringing is usually more than adequate for most applications, and can provide a good alternative for less power consumption compared to both the sinusoidal and offset ringing options. Figure 1 How to Generate DC Offset for Ringing (Vring and Rref Interface) Ringing Waveform 0 DC Offset VBat1 Balanced Sinusoidal Ringing with Offset The Am79R100 device is no different than the Am79R79 device in its trapezoidal waveform generation. Rslew and Cslew can be calculated by using the same formulas given previously (refer to the Am79R79 device Ringing SLIC Device Technical Review). For sinusoidal ringing with or without DC offset, there are a variety of ways to apply the ringing signal to the device. These ways are explained in the following sections. 2 Am79R100/101 Vs Am79R79 Device Comparison Brief

1. Sinusoidal Ringing Without DC offset Connect the Rref pin to the digital ground and feed the (desired frequency) sine wave signal to Vring pin. No AC coupling capacitor is needed, but the amplitude has to be lower than 2 Vpk-pk to avoid clipping. The sine wave is present at Vab, measured around (Vbat1)/2 V DC. Figure 2 Balance Ringing Without DC Offset Am79R101 Device Vring<2Vpk-pk VRING RREF 2. Sinusoidal Ringing with DC Offset on the Vring Pin or the Rref Pin Connect the Rref pin to the digital ground and use the voltage divider (shown in Figure 3) to connect the Vring pin. The bias voltage range at the Vring pin should stay within a maximum of Vcc/2. A DC blocking cap is needed to prevent upsetting the ring source. There is internal impedance around 10K in series with the pin, so more voltage tolerance can be expected at Vab. With a similar approach, the Rref pin can be biased with resistive dividers. Figure 3 Ringing with DC Offset on Vring Pin VCC RR1 Am79R101 Device Vring<2Vpk-pk RR2 VRING RREF 3. Sinusoidal Ringing with DC Offset Between the Rref Pin and the Vring Pin Use two resistors to build a voltage divider between the Vcc and DGND. Connect the junction of the resistors to the Rref pin. The voltage range at the Rref pin should stay within 0 V to Vcc/2. Apply bias on Vring with higher (or lower) than the DC reference voltage on Rref, and observe the offset ringing waveform at Vab. If Vring < Vrref, the tip is negatively biased. If Vring > Vrref, the tip is positively biased. A bigger offset may create clipping on one side of the ringing waveform if the amplitude is too high. There is a trade off between the amplitude and the DC offset. When both Rref and Vring are biased, the DC difference between inputs, times 100, is then equal to the offset voltage at Vab (shown in Figure 4). Am79R100/101 Vs Am79R79 Device Comparison Brief 3

Vout_offset = (Vring Vrref) x 100 For example, if you need 20 V DC offset at Vab during the ringing, apply 200 mv DC difference between the Vring and the Rref pins. Because of the input impedance variation, the resistor value will contribute some tolerance to the offset output. One should measure the Voffset during ringing to decide upon a set of values. For the voltage divider bias circuit, a 0.1 uf cap may be needed between the bias point and ground to reduce the transient effect. Please note that the Rref and Vring inputs should not be treated as regular op-amp inputs. Figure 4 Ringing with Bias, Both VRING and RREF Pins Am79R101 Device VCC Vring < 2 Vpk-pk VRING Vbias RR1 RREF RR2 4. Zarlink SLAC Device Interface Traditionally the ringing signal is fed into the RSLIC device by separate external devices. Here we are introducing a ringing source generated from a digital source through the PCM highway, such as DSP. In order to pass a ringing frequency like 20hz, some filters in the QSLAC or ASLAC devices need to be adjusted. Within the SLAC device, the low-pass filter band limits the signal. The R digital filters (IIR and FIR), need to be programmed to pass the lower frequency, AISN, and the Z and B filters need to be turned off to stop the feedback between the Vout and Vin paths. Gain in the receive path needs to be adjusted to meet the ring output requirement. To minimize the changes, default settings were used where possible - only two commands need to be changed: the Command [60/61] Wrd/Rd Operating Function and the Command [82/83] Wrt/Rd GR filter Coeff. The level of the digital signal can also be adjusted to satisfy the ringing output requirement. QSLAC and ASLAC Device Settings for Ring Generation through the PCM Highway: 60 20 # Write Operating Functions: choose all the default settings except for EGR = 1, and for programmed GR filter = enabled. 82 0111 # Write GR Filter Coefficients: set Grain = 1. 0E # Activate With the above filter settings at 20hz, a 0.4dbm0 sine wave signal on the PCM highway for the QSLAC device, and a 1.8dbm0 sine wave signal on the PCM highway for the ASLAC device will 4 Am79R100/101 Vs Am79R79 Device Comparison Brief

generate around 1.96Vp-p on the Vout pin. This Vout is enough for the RSLIC device to reach the required ringing output. The data collected are based on the balance ringing configurations. Please remember, after generating the ring, the filters need to be reconfigured for normal transmission setup. Figure 5 The bias source can also be connected from a Zarlink SLAC device. Normally there is a Vref pin on the Zarlink QSLAC device (2.1V) or ASLAC device (2.1V) to provide the DC bias for the AC coupled signal at the SLAC device input and output, but the current driving ability is different between the SLAC devices. For the QSLAC device, additional circuitry may be needed to compensate for the driving problem. We use a positive buffer (OP27 from Analog Devices) connected to Vref output to service 4 channels as reference voltage on the QSLAC device evaluation board. Any low offset opamp will work depending on how heavy the load (please refer to the manufacturing data sheet for multi-channel applications, and pay close attention to the polarity). The ASLAC device has a 1mA driving ability, which should be enough for single channel applications. (Figures 5 and 6) DC Offset Ring Interface with the QSLAC Device PCM Highway QSLAC Device VOUT 5 V VRING RREF1 Am79R101 Device VREF - OP27 + RR1 RREF2 RR2 RREF3 RREF4 Am79R100/101 Vs Am79R79 Device Comparison Brief 5

Figure 6 DC Offset Ring Interface with the ASLAC Device Am79R101 Device PCM Highway ASLAC Device VOUT VRING RREF VREF RR1 RR2 DC Feed Anti-Saturation Region For the majority of short loop applications, the total loop resistance is less than 1 kω. The Am79R100 device increases the DC feed loop resistance with respect to the Am79R79 device Rldc = 750 Ω (loop plus phone) to Rldc = 1250 Ω (loop plus phone) to deliver the same minimum 20 ma current when Rsgl is connected to ground (Vbat2 = 35 V). The extra 500 Ω loop resistance is 6000 feet longer loop distance (26AWG). The constant current region on the Am79R100/101 devices is the same as the Am79R79 device. The data provided in this section, illustrates the DC driving capacity. Note that the maximum loop length may create a problem for reliable ring-trip detection. The Am79R100/101 devices default settings are different from the Am79R79 device. For the Am79R79 device the Rsgl = open and the Rsgh = open, but for the Am79R100/101 devices, the Rsgl = open and the Rsgh = ground. The DC feed curves are similar to each other, except that the Am79R100/101 devices have more headroom. In the OHT mode, the on-hook voltage was lowered from that of the Am79R79 device. Vab = 49 V to Vab = 45 V. With the Rsgl = ground, the knee of the low battery anti-sat entry can be raised to 25 V from the nominal 12.5 V with Vbat2 = 35 V. This increases the utilization of Vbat2, and is beneficial for caller ID applications. With the appropriate Rsgh connection, the on-hook voltage can be adjusted for MTU and fax machine application without violating the UL requirement. The anti-sat calculation formula also changed. The following equations show the Am79R100/101 devices DC feed calculations derived using Mathcad: 6 Am79R100/101 Vs Am79R79 Device Comparison Brief

Am79R100 Device DC Feed Curve with New Formula Rdc 100000 Vbat1 95 Vbat2 24 Il 0, 0.0001.. 0.06 Rl 600 (Rl = Rl + Rf, Rf = 0) Low bat operation: 2500 Vab. Rdc Rl Vasl 61.44(. 125000 Rsgl) 308000 4.92Rsgl. Rsgl 1000000000 Constant-current Rsgl = open (1G Ω), Vasl = 12.489 Vappl 4.17 Vasl Vappl with low battery, Vappl = 16.659 Ilim 0.025 Constant current 4.17 Vl( Il) Vappl. Ilim Il Calculation formula and curve Vabl( Il ) if( Il > Ilim, Ilim, Vl( Il )) Connect the curves High bat operation: Rsgh 0 Rsgh = ground default setting Vash Vasl 61.44.( 101000 Rsgh) 223000 4Rsgh. Vash=40.316 Vapph 4.17 Vash Vapph = 44.486 4.17 Vh( Il) Vapph. Ilim Il Calculation formula and curve Vab2( Il ) if( Il > Ilim, Ilim, Vh( Il ) ) Connect the curves VAB(Volt) Vabl ( Il ) Vab2 ( Il ) 60 50 40 30 20 10 0 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 Il(A) Am79R100/101 Vs Am79R79 Device Comparison Brief 7

Ring Trip UL Protection Circuit Pinout Difference Because a high battery extends the driving ability for both ringing and off hook, we observe that the loop length of the ring trip for the Am79R100/101 devices are increased compared to the Am79R79 device. For the Am79R100 device, the recommended setup where Rrt1 = 604K, Rrt2 = 12K, Crt = 1 uf, CF = 1.26, allows Rloop to be extended to a maximum value of 1.1 kω with clear ring trip. For the Am79R101 device, Rrt1 = 700K, Rrt2 = 12K, Crt = 1 uf, CF = 1.41 balance ringing, the Rloop can reach a maximum of 800 Ω. A small faulty pulse is allowed at the DET output because most applications will apply debounce capability of typically 13ms, with 20hz ringing. Debounce circuits will ignore the glitch at the DET output during the transition. There is a hysteresis applied in both Am79R100/101 devices ring trip circuits to eliminate the threshold uncertainty. The RC constant for Rrt2 and Crt is measured at less than 30 ms in the worse case (different phase angle), where it will affect the system level ring-trip requirement and should be kept as short as possible. If the time constant is too short, the DET will generate a lot of pulses around the threshold, and the value may need to be adjusted with a particular application. For DC offset ringing, the ring-trip current is smaller due to the limited swing. With the same value setup, the ring-trip loop length is expected to be less than the balanced ringing. With 10 V DC offset applied on the output during ringing, the Am79R101 device can easily ring the Nortel Venture multi-line feature phone and Casio Phonemate series devices such as the TI-330, 9300. To meet the fax machine and maintenance termination units (MTU) requirement, the SLIC device needs to provide a higher on-hook voltage minimum, 43 V. UL has specified that any DC voltage higher than 60 V is considered hazardous and needs more stringent isolation requirements. The Am79R100/101 devices apply a diode clamp technique so that the on-hook high battery should not exceed 54 V in Standby mode. Because the supply voltage has increased from a nominal value of 75 V to 95 V, the protection circuits we usually use have to move up for higher rating. There are two commonly used devices for level two protection circuits the diode bridge plus the thyristor surge protector and the battery tracking protection thyristor IC. If we use 70 V for the high battery, the maximum thyristor breakover voltage must be specified not to exceed 70 V, whereas the minimum must not be less than the maximum A-to-B line voltage (on hook). Therefore, the current is not sourced from the SLIC device under the normal line condition. For the battery tracking protection device, which can be externally programmed by the battery, the minimum breakover is still greater than Vbat, so no current will be drained during the normal operation. We suggest a Power Innovation programmable over a voltage protection device, part number TISP61089A (maximum 100 V limit), which is suitable for Am79R100/101 SLIC device application. Now, there is a TISP61089AS for small outline SMT that is compliant with UL1950 requirements. The proposed small outline pinout will be interchangeable with the LCP1521 from ST. The TECCOR BATTRAX P1001SC protector is another recommended device for this application. In the bridge rectifier and thyristor device combination application, the fast or ultra fast diodes are strongly recommended for lightning protection. For details, please refer to the application note, PID# 080270A: Generic SLIC Device Protection From Lightning Surges and AC Mains Power Cross. Even though the Am79R100/101 devices are pin compatible functional replacements for the Am79R79 device, there are some differences to note: Pin Function Am79R79 Device Am79R100 Device Am79R101 Device Pin 7 B2EN NC NC Pin 16 NC NC RREF 8 Am79R100/101 Vs Am79R79 Device Comparison Brief

Unlike the Am79R79 device, the Am79R100/101 devices incorporate B2EN into the state decoders, which eliminates an I/O control pin with auto battery selection. The following table illustrates battery selection by each state: C3 C2 C1 State E1 = 1 E1 = 0 Battery 0 0 0 Open Circuit Ring Trip Ring Trip Vbat2 0 0 1 Ringing Ring Trip Ring Trip Vbat1 0 1 0 Active Loop Det. Ground Key Vbat2 0 1 1 On Hook TX (OHT) Loop Det. Ground Key Vbat1 1 0 0 Tip Open Loop Det. Ground Key Vbat1 1 0 1 Standby Loop Det. Ground Key Vbat1 1 1 0 Active Pol. Rev. Loop Det. Ground Key Vbat2 1 1 1 OHT Pol. Rev. Loop Det. Ground Key Vbat1 Power Dissipation Additionally, the Am79R100/101 devices Vbat1 decoupling caps, Cax, Cbx, and Chp voltage ratings should have enough headroom compared to those of the Am79R79 device. For a condensed linecard design, the power dissipation requirement is even tighter than before. With a high supply battery, the unit can deliver more power to the load, but you do not want it to consume more power than it has to. The following table shows the difference in typical power consumption between devices. Generally speaking, The Am79R100/101 devices consume less power than the Am79R79 device in Ringing mode. Table 1 Power Dissipation Between the Am79R79/100/101 Devices, Using 75 V BAT1 and 24 V BAT2 State Am79R79 Device Am79R100/101 Devices Battery Open Circuit 48 mw 34 mw Vbat2 Standby 55 mw 43 mw Vbat1 OHT 200 mw 180 mw Vbat1 OHT 300 Ω 2 W 2.6 W Vbat1 Active 300 Ω 550 mw 540 mw Vbat2 Am79R100/101 Vs Am79R79 Device Comparison Brief 9

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