2.5 Drive Nch+SBD MOSFET Structure Silicon N-channel MOSFET / Schottky barrier diode Features ) Nch MOSFET and schottky barrier diode are put in TUMT6 package. 2) High-speed switching, Low On-resistance. 3) Low voltage drive (2.5 drive). 4) Built-in Low F schottky barrier diode. pplications Switching Package specifications Type Package Code Basic ordering unit (pieces) Taping TR 3 bsolute maximum ratings (Ta=) <MOSFET> Symbol Limits Drain-source voltage DSS 3 Gate-source voltage S ±2 Drain current Continuous ID ±.5 IDP ±6. Source current Continuous IS.6 (Body diode) ISP 6. Channel temperature Tch 5 PD 2.7 Pw µs, Duty cycle % 2 Mounted on a ceramic board <Di> Repetitive peak reverse voltage Reverse voltage Forward current Forward current surge peak Junction temperature 6Hz cycle 2 Mounted on ceramic board Symbol Limits C W / ELEMENT TUMT6 RM 25 R 2 IF.7 IFSM Tj 5 C PD 2.5 W / ELEMENT Dimensions ( : mm) Inner circuit (6) (5) () (2) ESD protection diode 2 Body diode bbreviated symbol : U37 2 (4) (3).2Max. ()Gate (2)Source (3)Cathode (4)node (5)node (6)Drain /4
<MOSFET and Di> Range of storage temperature Mounted on a ceramic board Symbol PD Tstg Limits. 55 to +5 W / TOTL C Electrical characteristics (Ta=) <MOSFET> Symbol Min. Typ. Max. Conditions Gate-source leakage IGSS ± µ =±2, DS= Drain-source breakdown voltage (BR) DSS 3 ID= m, = Zero gate voltage drain current IDSS µ DS= 3, = Gate threshold voltage (th).5.5 DS=, ID= m 7 24 mω ID=.5, = 4.5 Static drain-source on-state RDS (on) 8 25 mω ID=.5, = 4 resistance 24 34 mω ID=.5, = 2.5 Forward transfer admittance Yfs.5 S DS=, ID=.5 Input capacitance Ciss 8 pf DS= Output capacitance Coss 4 pf = Reverse transfer capacitance Crss 2 pf f=mhz Turn-on delay time td (on) 7 ns DD 5 Rise time tr 9 ns ID=.75 = 4.5 Turn-off delay time td (off) 5 ns RL 2Ω Fall time tf 6 ns RG=Ω Total gate charge Qg.6 2.2 nc DD 5, = 4.5 Gate-source charge Qgs.5 nc ID=.5 Gate-drain charge Qgd.3 nc RL Ω, RG= Ω <Body diode characteristics (Source-drain)> Symbol Min. Typ. Max. Conditions Forward voltage SD.2 IS=.6, = <Di> Forward voltage Reverse current Symbol Min. Typ. Max. Conditions F.49 IF=.7 IR 2 µ R= 2 2/4
Electrical characteristics curves CPCITNCE : C (pf) DRIN CURRENT : ID () Ta= f=mhz = Coss Ciss Crss.. DRIN-SOURCE OLTGE : DS ().. Fig. Typical Capacitance vs. Drain-Source oltage Ta= DS=...5..5 2. 2.5 GTE-SOURCE OLTGE : () STTIC DRIN-SOURCE ON-STTE RESISTNCE : RDS (on) (Ω) Fig.4 Typical Transfer Characteristics Ta= =4.5... DRIN CURRENT : ID () SWITCHING TIME : t (ns) STTIC DRIN-SOURCE ON-STTE RESISTNCE : RDS (on)(ω) STTIC DRIN-SOURCE ON-STTE RESISTNCE : RDS (on) (Ω)...9.8.7.6.5.3.2 td(off) td(on) tr tf Ta= DD=5 =4.5 RG=Ω. DRIN CURRENT : ID () Fig.2 Switching Characteristics.4 ID=.75 ID=.5 Ta=. 2 3 4 5 6 7 8 9 GTE-SOURCE OLTGE : () Fig.5 Static Drain-Source vs. Gate source oltage Ta= =4.... DRIN CURRENT : ID () GTE-SOURCE OLTGE : () SOURCE CURRENT : IS () STTIC DRIN-SOURCE ON-STTE RESISTNCE : RDS (on) (Ω) 6 5 4 3 2. Ta= DD=5 ID=.5 RG=Ω.5.5 2 TOTL GTE CHRGE : Qg (nc) Fig.3 Dynamic Input Characteristics Ta= =...5..5 SOURCE-DRIN OLTGE : SD () Fig.6 Source Current vs. Source-Drain oltage Ta= =2.5... DRIN CURRENT : ID () Fig.7 Static Drain-Source vs. Drain Current ( Ι ) Fig.8 Static Drain-Source vs. Drain Current ( ΙΙ ) Fig.9 Static Drain-Source vs. Drain Current ( ΙΙΙ ) 3/4
REERSE CURRENT : IR [u]. Measurement circuit RG D.U.T. Fig.2 Switching Time Test Circuit IG (Const.) RG Ta = 25 Ta = 75 Ta = 25 Ta= - 25. 5 5 2 25 REERSE OLTGE : R [] Fig. Reverse Current vs. Reverse ID D.U.T. RL DD DS DS Fig.4 Gate Charge Measurement Circuit ID FORWRD CURRENT : IF().....2.3.4.5.6 FORWRD OLTGE : F() RL DD DS td(on) 5% % ton Pulse Width 9% 5% % % 9% 9% tr td(off) toff Fig.3 Switching Time Waveforms G Qgs Qgd Qg Fig.5 Gate Charge Waveform tf Charge Notice. SBD has a large reverse leak current compared to other type of diode. Therefore; it would raise a junction temperature, and increase a reverse power loss. Further rise of inside temperature would cause a thermal runaway. This built-in SBD has low F characteristics and therefore, higher leak current. Please consider enough the surrounding temperature, generating heat of MOSFET and the reverse current. 2. This product might cause chip aging and breakdown under the large electrified environment. Please consider to design ESD protection circuit. pulsed Ta = 25 Ta = 75 Ta = 25 Ta= - 25 Fig. Forward Current vs. Forward oltage 4/4
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