42 CHAPER 3 MODELLING, SIMULAION AND ANALYSIS OF -SOURCE INERER FED GRID CONNECED P SYSEM 3.1 INRODUCION -Source Inverter is a single stage power converter; it consists of a coupled inductor and a capacitor in the impedance network to provide buck- boost capability by properly controlling the shoot through duty ratio of Pulse Width Modulation (PWM) scheme. o predict the performance of the SI, mathematical modelling and analysis are discussed in this chapter. Also the boost factor, voltage gain, voltage stress, inductor current ripple, and common mode voltage of SI are calculated for different shoot through control techniques and the same has been simulated using Matlab/Simulink. 3.2 MODELLING AND OPERAION OF -SOURCE INERER source inverter (SI) is a combination of fast recovery diode, shape impedance network, and bridge inverter as shown in Figure 3.1. It can buck, boost and buck-boost the input supply to the required level by using suitable Pulse Width Modulation (PWM) schemes. shape impedance network is formed with low leakage, high precision coupled inductor and capacitor. he function of input diode is to prevent the reverse power flow during the shoot through period. he shoot through period of the SI is
43 obtained by either turning ON the switches of the same phase leg or combination of two or three phase legs simultaneously. 3.2.1 Operating States of SI he DC voltage (from source) is fed as input to the impedance network of the SI which helps to achieve both voltage buck and boost. he voltage across the impedance network is applied to the bridge inverter. he voltage buck-boost capability in SI is facilitated by shoot through time period. oltage boost capability of SI is due to the energy transfer from capacitors to inductors, during the shoot through state. the discharging of capacitors through the source Strzelecki et al (29). Figure 3.1 Circuit diagram of -source inverter he SI can handle shoot through states, when both switches in the same phase leg or any two phase legs or three phases are turned on. In the SI, -network is used instead of the lattice impedance-network, for boosting the output voltage by inserting shoot through in the pulse width modulation (PWM) schemes. hree phase SI has nine acceptable switching states but three phase voltage source inverter (SI) has eight switching states out of which six are active states and two are zero states. he shoot through state gives the unique feature of buck-boost operation to the inverter. he operating states of SI are given in able 3.1.
44 able 3.1 hree Phase SI Switching able Switching State S 1 S 4 S 3 S 6 S 5 S 2 Active [1] 1 1 1 Active [11] 1 1 1 Active [1] 1 1 1 Active [11] 1 1 1 Active [1] 1 1 1 Active [11] 1 1 1 Null [] 1 1 1 Null [111] 1 1 1 Shoot through-1 1 1 S 3 3 S 5 5 Shoot through-2 S 1 1 1 1 S 5 5 Shoot through-3 S 1 1 S 3 3 1 1 Shoot through-4 1 1 1 1 S 5 5 Shoot through-5 1 1 S 3 3 1 1 Shoot through-6 S 1 1 1 1 1 1 Shoot through-7 1 1 1 1 1 1 he SI has two operating states such as non shoot through state and shoot through state. 3.2.2 Non Shoot through state Figure 3.2 illustrates the equivalent circuit of SI in non shoot through mode of operation. In this mode SI is in one of the six active states. At this time the capacitor is charged through a diode to the maximum value, thus acting as a current source when viewed from source DC link. During this mode active state current is flowing. he diode conducts and carries the voltage difference between the inductor voltage and input DC voltage. Both the inductors have an identical current because of coupled inductors.
45 Figure 3.2 Operation of SI during non shoot through mode 3.2.3 Shoot through state During this mode inverter is short circuited by any one phase leg or two phase leg or combined three phase leg. At this time diode is reverse biased and capacitor discharges and the inductor L 2 is charged and hence inductor current increases, separating the DC link from the AC line arrangement as shown in Figure.3.3. Figure 3.3 Operation of SI during shoot through Mode he switching sequence of single phase inverter is represented in able 3.2. he single phase SI has five switching state out of which two are active states [( 1), (1 )], two null state [( ), (1 1)] and one shoot through zero state.
46 able 3.2 Single phase SI switching table Switching State S 1 S 2 S 3 S 4 Active [ 1 ] 1 1 Active [ 1] 1 1 Null [ ] 1 1 Null [1 1] 1 1 Shoot through-1 1 1 1 Shoot through-2 1 1 1 Shoot through-3 1 1 1 Shoot through-4 1 1 1 Shoot through-5 1 1 1 1 Figure 3.4 Switching sequence of three phase source inverter he switch period () consists of active state, shoot through state and null state which is clearly shown in Figure 3.4. Where - Switching cycle N - Null state time period A - Active state time period - Shoot through time period Shoot through duty cycle D = A1+A2 Active state duty cycle D A =
47 Null state duty cycle N D N = From the switching able 3.2 it is evident that, each phase leg of the inverter is on and off once per switching cycle. Non shoot through state and shoot through states are alternatively occurring in the switching sequence to get the desired inverter output. During shoot through state the capacitor charges the inductor and the input voltage added with inductor voltage will appear across capacitor. During non-shoot through state the capacitor provides voltage across the output terminal. he output voltage is controlled by controlling the shoot through duty ratio using suitable PWM control technique. It is described in the forthcoming section. 3.3 CIRCUI ANALYSIS AND MAHEMAICAL MODELLING inverter. he following assumptions are made for modelling the -source Assumptions: oltage drop across diode is negligible. For symmetrical network L 1=L 2; L1= L2 = L, otal switching period ()= 1+ 1 -Non shoot through time period (active state) -Shoot through time period (zero state) Let us consider the inverter operated in one of the non-shoot through mode for the time period of 1 from Figure. 3.2. Input voltage applied to the inverter is given as = i dc
48 hen i= L1+ C he output voltage during active state out =C - (3.1) L After the time period 1 the inverter is operated in shoot through mode for period of.from Figure3.3, the capacitor voltage and output voltage during shoot through state are given as = C = C L2 L out = (3.2) At steady state the average voltage of the inductor for one switching period () is zero. From Equation (3.1) and (3.2) the voltage across inductor ( L ) and capcitor ( c ) is calculated by ( ) c o+ -c 1 dc L = c = 1 1 - dc 1 C= dc (3.3) 1 - expressed as he average dc-link voltage ( dc ) across source inverter bridge is = dc + (2c - dc ) 1
49 1 dc =dc (3.4) - 1 he peak dc link voltage across the inverter bridge can be written as in terms of input voltage and boost factor as c = 2 dc peak = - c - L dc dc peak = dc - 1 dc peak B dc Where, Boost factor B = -o 1 (3.5) For ac output voltage greater than input dc voltage the boost factor (B) is derived from Equation (3.5) 1 B = 1 1-2 o (3.6) Where ( / ) = D is shoot through duty ratio, Boost factor depends on shoot through duty ratio (D ). L 1 and L 2 in network, the boost factor (B) is same as Z source inverter as given in Equation (3.6). If the coupled inductor transfer ratio is n: 1 then the boost factor is defined as 1 B = 1-(n+1)
5 1 B 1 (n 1)D (3.7) Where n - turns ratio of coupled inductor Here boost factor depends on shoot through duty ratio (D ) and voltage is the equivalent dc-link voltage of inverter. he peak dc-link =M ac i dc link peak 2 Where M i - Modulation index Peak phase output voltage of inverter is =M B dc ac i (3.8) 2 he capacitor voltage can expressed as 1- c = 1-2 dc ransformer with transfer ratio 1:1 is used instated of inductor L 1 and L 2 in net work; the capacitor voltage ( c ) is same as Z source inverter. If the transformer transfer ratio is n: 1 then the capacitor voltage ( c ) is defined as 1- c = 1-2 dc
51 1-D c = 1-(1+n) D dc (3.9) From Equation (3.8) it is clear that the output voltage depends on boost factor (B) and modulation index (m i ). In grid connected P inverter normally grid voltage is used for reference and input voltage ( dc ) is varying with respect to irradiance and temperature changes. Certain value of ratio (n) the output voltage is controlled by the boost factor using a suitable shoot through duty ratio. Next section deals the choice of shoot through control methods for SI. 3.4 SHOO HROUGH CONROL SCHEMES FOR SI he various PWMschemes are used to control the output voltage of a SI by appropriate shoot through duty ratio. Simple boost control, maximum boost control, maximum constant boost control and modified space vector control are used for the analysis of SI based P systems. 3.4.1 Simple Boost Control It is a first PWM control technique proposed (Peng 23) for the Z-source converter. In this method the positive and negative value of DC signal and reference signals are compared with a carrier signal to produce the PWM pulse. he schematic of simple boost control is shown in Figure 3.5. In the traditional PWM method, positive and negative value of carrier signal when cross the reference signal the pulses are generated. Here, when carrier waveform is greater than the positive line, p or less than the negative line N, the inverter turns to shoot through state. Else it operates just as a traditional carrier based PWM.
52 Boost factor B = -o 1 1 B = 1-2Do written as Shoot through duty ratio (D ) in terms of modulation index (M i ) is D o = 1-M i Boost factor Boost factor 1 B= 2Mi 1 M Gain G= i 2Mi 1 Maximum Modulation Index M imax G = 2G 1 oltage stress () =B dc oltage stress (s) = (2G-1) dc Figure 3.5 Schematic of simple boost control
53 (a) 6 45 3 15-15 -3-45 -6 1 15 2 25 3 35 4 45 5 55 6 t(ms) 1.2.6 -.6-1.2 1 15 2 25 3 35 4 45 5 55 6 t(ms) (b) Figure 3.6 Simulation results of SI with simple boost control (a) DC side parameter dc, I L, c and p (b) output side parameter ph & I L
54 o analyze the behaviour of SI with simple boost control, the simulation is carried out with a P output voltage of 1 feed to the inverter, inductance of the impedance network is 5mH, capacitance is1µf, modulation index=.7, the shoot through duty cycle is set to.3 and switching frequency of 1kHz to produce the per phase output voltage of 23 and 5Hz to be connected to the grid. Figure 3.6 (a) shows the DC side of the inverter waveform like input voltage, capacitor voltage, inductor current and DC link voltage. Load side inverter output voltage and output current are represented in Figure 3.6 (b). 3.4.2 Maximum Boost Control Simple boost control causes more voltage stress across the switches due to improper utilization of zero state. o reduce the voltage stress under preferred voltage gain a maximum boost control technique is introduced by Peng et al (25). In the maximum boost control, all the traditional zero states are turned on to shoot through zero state. When the carrier signal is greater than or smaller than the minimum value of reference signal ( a, b & c ) the inverter is turned to shoot through state and is shown in Figure 3.7. Shoot through duty ratio is varied six times that of the output frequency. In this method, ripples in shoot through causes more ripples in inductor current and the capacitor voltage. Also it requires higher value of passive components at low frequency output.
55 Figure 3.7 Schematic of maximum boost control o analyze the theoretical concepts of SI with maximum boost control a simulation is carried out with P output voltage of 1 feed to the inverter, inductance of the impedance network is 5mH, capacitance is1µf, modulation index=.7 and shoot through duty cycle is set to.42, boost factor is 6.338 and switching frequency of 1kHz to produce the per phase output voltage of 23 and 5Hz to be connected to the grid. he simulation results are presented in Figure 3.8 (a) which shows the DC side of the inverter waveform like input voltage, capacitor voltage, inductor current and DC link voltage. Load side inverter output voltage and output current are represented in Figure 3.8 (b).
56 11 1 99 11 112 114 116 118 12 122 124 126 128 13 1-1 35 3 25 2 3 2 1 11 112 114 116 118 12 122 124 126 128 t(ms) (a) 3-3 1.5 -.5-1 1 15 2 25 3 35 4 45 5 55 6 t(ms) (b) Figure 3.8 Simulation results of SI with maximum boost control (a) DC side parameter (b) Output side parameter
57 3.4.3 Maximum Constant Boost Control o reduce the voltage stress, volume and cost of system, a maximum constant boost control technique is proposed by Miaosen Shen et al (26) for impedance source inverter. In this method the shoot through time period is maintained constant to obtain high voltage gain with reduced voltage stress. he schematic of this control scheme is shown in Figure 3.9. Figure 3.9 Schematic of maximum constant boost control
58 11 1 99 4 3 2 1-1 45 3 15 1.5 1.5 11 112 114 116 118 12 t(ms) (a) 3-3 1 15 2 25 3 35 4 45 5 55 6 t(ms) 1-1 1 15 2 25 3 35 4 45 5 55 6 t(ms) (b) Figure 3.1 Simulation results of SI with constant boost control (a) DC side (b) Inverter output voltage and current
59 o analyze the theoretical concepts of SI with maximum boost control a simulation is carried out with P output voltage of 1 feed to the inverter, inductance of the impedance network is 5mH, capacitance is1µf, modulation index is.7 and shoot through duty ratio is.397 to produce the per phase output voltage of 23 and 5Hz. he simulation results are presented in Figure 3.1 (a) which shows the DC side of the inverter waveform like input voltage, capacitor voltage, inductor current and DC link voltage. Load side inverter output voltage and output current are represented in Figure 3.1 (b). 3.4.4 Modified Space ector Pulse Width Modulation (MSPWM) Space vector PWMschemes are most widely used because it has low current harmonics and a high modulation index. In impedance source inverter space vector PWMis slightly modified by inserting shoot through vector in zero state to achieve the shoot through control and this control is called modified space vector PWM(MSPWM) proposed by Jin-Woo Jung & Ali Keyhani (27). It has additional shoot through time for boosting the DC link voltage of the inverter as well the time interval 1, 2 and Z. Within zero voltage periods ( Z ) the shoot through states are evenly distributed to each phase by / 6. he zero voltage periods should be diminished within shoot through time and active states 1 and 2 remain unaltered are presented by ran et al (27). he resultant voltage lies between two switching state k and k+1 and is shown in the Figure 3.11.
6 z/4-2 z/4-2 1/2 2/2 z/2 1/2 s/2 s/2 Sap Sbp Scp San Sbn Scn Figure 3.11 Shoot through distribution of modified space vector pulse width modulation o analyze the theoretical concepts of SI with maximum boost control a simulation is carried out with P output voltage feed to the inverter 1; inductance of the impedance network is 5mH, capacitance is1µf, modulation index=.7 and shoot through duty cycle is set to.315, boost factor is 2.72 and switching frequency of 1kHz to produce the per phase output voltage of 23 and 5Hz to connected to the grid. he simulation results are presented in Figure 3.12 (a) which shows the DC side of the inverter waveform like input voltage, capacitor voltage, inductor current and DC link voltage. Load side inverter output voltage and output current are represented in Figure 3.12(b).
61 11 1 99 45 3 15-15 45 3 15 3 2 1 11 112 114 116 118 12 122 124 126 128 13 t(ms) (a) 6 3-3 -6 3 2 1-1 -2-3 1 15 2 25 3 35 t(ms) (b) Figure 3.12 Simulation results of SI with constant boost control (a) DC side parameter (b) output side parameter
62 Figure 3.13 oltage Space ector with sector representation he reference voltage in the space vector is specified by, ref = k 1 + k+1 2 he modulation index used in the MSPWM method is found by, ref M i = (2/3) dc ime period of the active voltage vector is, 3 z ref 1 = Sin ( - dc 3 3 (3.1) and 2 = 3 z ref n-1 Sin( dc 3 ime period of the zero state vector is, =-1-2
63 Hence the shoot through period is given by, = sh 3 (3.11) Where, 6 - otal switching time period sh Shoot through time period 3.5 COMMON MODE ANALYSIS OF PHOOOLAIC GRID CONNECED SI In transformerless grid connected P system the stray capacitance between the P plant and ground is formed and estimated as 2nF/kWp. (Kerekes et al 29). It depends on various factors like P panel and frame structure, weather conditions, surface of the cell, distance between cells, module frame, humidity, and dust covering on the plant, etc. his stray capacitance causes significant amount of leakage current between the P terminal and ground. Leakage current is produced due to the galvanic connection between the P plant and grid which depends on the amplitude and frequency of fluctuating voltage applied between the terminal of P panels and parasitic capacitance have been dealt by Myrzik & Calais (23); Gonzalez et al (27). As per the German standard DIN DE126-1-1 there must be a Residual Current Monitoring (RCM) system placed in the transformerless grid connected P system. his RCM monitors the AC and DC current injection into the grid. If the leakage current in the system reaches 3mA the disconnection occurs within.3s or otherwise able 3.3 is followed.
64 able 3.3 Leakage current and disconnection time given in the standard DIN DE 126-1-1 Average leakage current (ma) Disconnection time (s) 3.3 6.15 1.4 his common-mode leakage current increases the system losses, reduces current quality, induces the severe conducted and radiated electromagnetic interference, and causes personal safety problems. he common model of P grid connected system is shown in Figure A 2.1 in order to investigate the leakage current in the proposed inverter the common mode model of the source inverter is developed in the following sections. specified as he common mode voltage ( CM ) of three phase inverter can be = CM + + 3 An Bn Cn terminal is he common mode voltage of inverter with reference to negative + + Nn = - 3 An Bn Cn (3.12) he common mode circuit of MSI is shown in Figure 3.14.
65 Rg Cpv Pn D1 Rf/3 Lf/3 Rg Cpv Nn D2 Lcg Ileak Figure 3.14 Common mode circuit of MSI Where C pv - L f - R f - R g - L cg - P plant stray capacitance Filter inductance Internal resistances Resistance between the ground connection of the P plant frame and the grid Inductance between the ground connection of the inverter and the grid he -source inverter can be operated in two modes namely shoot through zero mode and non shoot through mode (active mode) using MSPWM technique. So it is necessary to find the common mode voltage for the two modes. 3.5.1 Shoot through Mode he shoot through the mode of MSI occurs when any one of the shoot through zero state in seven of its total states, during which positive and negative group of switches of one or more phase legs are turned on and the equivalent circuit is shown in Figure 3.15. During shoot through period both diodes D get reverse biased and the inverter circuit is disconnected from the
66 source. Meanwhile the capacitor charges the inductor. he leakage voltage can be calculated using Equation (3.12) as the voltage across L 1 and L 2 are L2 = C L2 = L1 = L ; Diode voltage = D B-boost factor, D -shoot through duty ratio (3.12) is written as ( 2 L + D) Nn = - 3 = = B * L C f PN PN - 2L D= 2 1 Where B = 1-2 D Cpv + P D + - A/B/C Rg Rg P Array Cpv L1 - L2 + Cpv - N + c- C A/B/C Figure 3.15 SI in shoot through mode 3.5.2 Non Shoot through Mode (Active Mode) MSI can be operated in active mode during any one of its six active switching states for an interval of (1-D sh ). he equivalent circuit of the
67 MSI is shown in Figure 3.16. Using Equation (3.12) the leakage voltage Nn can be stated as L2 = - c; L1= L2= - c ( PN - 2 L+ 2 L+ 2 L) Nn = - 3 (2 L+ PN ) Nn =- 3 (3.13) he inductor voltage L = - = - B * =(1-B) * L PN C PN PN PN 1 Where B = 1-2 D From the above Equation leakage voltage for non shoot through mode Equation is written as 2 ( 1 - B) PN + Nn = - 3 PN Nn =- PN (3-2 B) 3 (3.14) Cpv + P D + - A Rg Rg P Array Cpv L1 - L2 + Cpv - + c- C B/C N Figure 3.16 Non-shoot through mode of SI
68 From the Equations (3.13) & (3.14) it is seen that the common mode voltage ( CM ) of the -source inverter depends on boost factor and the voltage between P plant and ground ( PN ). his PN is varying with respect to inverter topology and PWM schemes. he cm is controlled and leakage current is maintained below the required level specified in the standard DIN DE126-1-1 by controlling shoot through duty ratio and suitable inverter topologies. o analyze the performance of the source inverter the following parameters such as Shoot-through duty ratio (D o ), Boost Factor (B), oltage Gain (G), oltage Stress, Common Mode oltage ( CM ), Capacitor oltage ( c ) of different shoot through control techniques are calculated for different shoot through control methods and are listed in able 3.3. 3.6 COMPARISION OF SHOO HROUGH CONROL ECHNIQUES he simulation of various shoot through control methods are carried out to identify the suitable shoot through control method for the -source inverter using Matlab/Simulink. he simulation diagram is shown in Appendix Figure A.2.2. his P plant has two parasitic capacitors between positive and negative terminal to ground with value of 22nF, and ground like shoot through duty ratio, boost factor, voltage gain, voltage stress, common mode voltage and capacitor voltage for different shoot through control schemes (Ellabban et al 211).
69
7 3.6.1 Comparison of oltage gain Figure 3.17 illustrates the variation of voltage gain of different shoot through versus modulation index plot of source inverter with different shoot through control methods. Here the maximum boost control method is having a higher voltage gain compared to other three methods because the zero vector is completely utilized by shoot through state. Figure 3.17 Comparison of voltage gain with different shoot through control methods 3.6.2 Comparison of oltage Stress Figure 3.18 shows the voltage stress / input voltage versus voltage gain plots. It is observed that modified space vector PWMis having higher voltage stress across the switches because the unequal shoot through time in z zero state and - 2 should be greater than zero and positive. Whereas the 4
71 maximum boost control has lower switching voltage stress due to maximum utilisation and equal shoot through time over one cycle. Figure 3.18 Comparison of voltage stress with different shoot through control methods 3.6.3 Comparison of Inductor current ripple Figure 3.19 represents the inductor current ripple versus the modulation index, It shows that maximum boost control has higher inductor current ripple than the other three methods. he simple boost control has a very low ripple because of shoot through time per switching cycle is kept constant.
72 Figure 3.19 Comparison of inductor current through control methods with different shoot 3.6.4 Comparison of Common mode voltage Figure 3.2 exemplifies the common mode voltage versus modulation index. Here the maximum boost control method has high common mode voltage and modified space vector PWMhas lower common mode voltage under grid connected mode,because maximum boost control has high dc link voltage with variation of shoot through time per switching cycle.
73 Figure 3.2 Comparison of common mode voltage for different shoot through control methods From the comparison of various shoot through control methods with different parameters it is clear that the maximum boost control method has lower switching voltage stress, high voltage gain and modified space vector PWMscheme which provides low common mode voltage than other three methods. Owing to the above facts this thesis suggested the maximum boost with modified space vector PWMfor further analysis. 3.6.5 Maximum Boost Modified Space ector Pulse Width Modulation (MBMSPWM) In modified space vector PWMshoot through time interval is limited to (3 / 4) and is given in Figure 3.21. Because second zero vector z ( 7 ) is equal to - 2, it should be greater than zero and positive. In 4 Maximum Boost Modified Space ector (MBMSPWM) PWM technique distribution of a shoot through vector is split into Z / 6 and z / 3 (Ellabban et al 211) and it is illustrated in Figure 3.21. he able 3.5 shows the various
74 parameters of MBMSPWM scheme. In this method the zero state is maximum utilized and results in reduction in voltage stress are compared with MSPWM method. he DC side simulation results of the proposed method is presented in Figure 3.22. It comprise of input voltage, DC link voltage, capacitor voltage and inductor current form top to bottom respectively. he AC side simulation results are presented in Figure 3.23 and it comprises of output voltage, output current, and device voltage from top to bottom. able 3.5 MBMSPWM with different parameter Parameter Shoot-through duty ratio (Do) MBMSPWM 2 2 Boost Factor (B) ( - ) 3 3 3 M - oltage Gain (G) =M B oltage Stress =B dc 3 3 M - 3 3 G- * dc Modulation index (M i ) 3 3 G - Common Mode oltage ( cmn ) Capacitor oltage ( c ) B - 2 B + 1 ( ) - ( ) 3 3 2 1 - ( ) pn 2 * 2 1 - (1 + n) ( ) 2 dc
75 z/3-2 z/3-2 z/6-1/2 2/2 1/2 z/6-2/2 s/2 s/2 Sap Sbp Scp San Sbn Scn Figure 3.21 Shoot through placement in MBMSPWM scheme Figure 3.22 DC side simulation results of the SI with MBMSPWM control
76 5-5.3.35.4 5-5.3.35.4 3 2 1-1.3 t(s).35.4 Figure 3.23 AC side simulation results of the SI with MBMSPWM control o validate the theoretical concepts and simulation results a 1kW prototype model of -source inverter with maximum boost space vector PWMscheme is developed in the laboratory. It is tested with input voltage of 1, modulation index is.7 and shoot through duty ratio is.255 and boost DC side inverter parameters such as input voltage, inductor current, DC link voltage and capacitor voltage are presented in Figure 3.24 (a). he output voltage, current and device voltage of inverter is presented in Figures 3.24 (b) and Figure 3.24 (c).
77 (a) (b) Figure 3.24 (Continued)
78 (c) Figure 3.24 Experimental results of SI with MBSPWM schemes (a) Inverter input side parameter (b) inverter output (c) Device voltage 3.7 RELIABILIY ESIMAION he reliability of P system mainly depends on power electronic converters used in power conversion stages. Power converter reliability predicted by failure rate of power components are used in this circuit such as transistor, capacitors, inductor and diodes. While designing power electronics converters the various parameters like duty cycle limits, isolation requirement, electromagnetic interference, switching mode, continuous mode (or) discontinuous mode, etc. are to be considered for improving the reliability. he following steps are used to predict the failure rates for electronics devices mentioned in MIL-HDBK 217 handbook. 3.7.1 Step to Calculate Failure Rate 1. p) each components in the circuit p)
79 n p b i i=1 Where b is base failure rate 2. Mean time between failure (MBF) MFB= -1 p 3. Reliability (R) - R=e p 4. If redundancy is included the reliability of power stage in a P system (R p ) R = p m j=1 R j Where R j -individual component reliability in the power stage. Power electronics converter are normally designed with transistors, diode, capacitors and inductors, and the stress factor of these devices are shown in able 3.5. able 3.6 Stress factor of power devices Power device Inductor ransistor Capacitor Diode emperature factor ( ) Yes Quality factor Q) Yes Environmental E) Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Application A) Yes Capacitance C) Yes oltage factor ) Yes Yes S Factor S) Yes
8 ) involves junction temperature for transistor and diode, or hot spot temperature for capacitor and inductor. he temperature stress is mainly due to high voltage across, high current flow through devices and resistance of material used in the devices. he quality factor of device is mentioned in manufacturer data sheet. Environmental factor varies it depends on operating environment like ground (G), seaborne (N), airborne (A), missile (M), etc. Let us consider our environment as ground and factor E= 1. he application factor for non linear power devices greater than 25W is 1. ) S.6 capacitor and its rated voltage. 5 C) = C.23. oltage factor ; S is defined as the ratio between voltage applied to the S depends on the ratio S between the reverse voltages applied to a diode and its rated reverse voltage. It is calculated using the formula 2.43 S s. emperature stress occurs due to application of high voltage stress on power devices. he switching voltage stress in -source inverter is reduced by using proper shoot through duty ratio control. hus the reliability of the SI is improved. oltage stress and voltage gain comparison of source inverter and Z-source inverter (ZSI) are represented in Figure 3.25. It is observed that at gain G 1, SI has lower voltage stress than ZSI because the shoot through time is equally distributed in zero state in SI.
81 Figure 3.25 oltage stress and voltage gain comparison of SI and ZSI able 3.7 oltage stress comparison of Z-source inverter and -source inverter Parameter Z-source inverter -source inverter oltage stress ( s ) 3 3 G- dc 9 3 G - 2 4 dc Where oltage Stress =B dc oltage Gain (G) =MB 3.8 SUMMARY he basic operating modes of -Source inverter based P conversion system with its equivalent circuits were briefly explained. here are five shoot through control methods such as simple boost control, maximum boost control, Maximum constant boost control, modified space vector PWM schemes and maximum boost modified space vector PWM
82 schemes with shoot through placement and these are discussed and compared based on boost factor, voltage gain, common mode voltage and inductor current ripples. From the comparison maximum boost modified space vector PWMis chosen for further analysis due to low voltage stress, high voltage gain, constant common mode voltage and low ripple inductor current. he common mode circuit model of SI is derived and common mode parameters are calculated.