B.E. SEMESTER III (ELECTRICAL) SUBJECT CODE: X30902 Subject Name: Analog & Digital Electronics Sr. No. Date TITLE To From Marks Sign 1 To verify the application of op-amp as an Inverting Amplifier 2 To verify the application of op-amp as an non-inverting Amplifier 3 To verify the application of op-amp as an Integrator 4 To verify the application of op-amp as a Differentiator 5 To verify the application of IC 555 as an Astable Multivibrator 6 To verify the operation of IC 7812 as a 12V voltage regulator. 7 To verify the application of op-amp as a Schmitt Trigger. 8 To study and verify Half adder and Full adder using logic gates 9 To study about the R-S Flip Flop, Clocked R-S Flip-Flop,J-K Flip Flop. 10 To study about various types of logic Gates.
Date: / /2014 PRACTICAL NO: - 1 AIM : To verify the application of op-amp as an Inverting Amplifier. Equipments: - Theory: - - Op-amp trainer Kit - Oscilloscope - Signal Generator The most widely used constant gain amplifier circuit is the inverting amplifier shown in the circuit diagram. The output of the amplifier is obtained by multiplying the input with constant of fixed gain, set by the input resistor R1 and feedback resistor RF. The output is also inverted at the output terminal that is the output has a 180 degree phase shift with the input voltage. The gain of the inverting amplifier is given by the following equation. A V = - (R F / R 1 ) Procedure: - - Connect the circuit as shown in the circuit diagram with R 1 = 1KΩ and R F = 10KΩ. - Use the signal generator to give 0.8V, 1 KHz sine wave supply to the inverting terminal of the op-amp as shown in the circuit diagram. - Observe the output voltage waveform on the Oscilloscope. - Measure the output voltage magnitude and put value of output voltage, R 1 and R F in observation table. - Repeat above steps for the new value of R 1 and R F. - Calculate the gain of amplifier as Av = Vout / Vin. - Compare this value with theoretical value - Av= - R F / R 1. - Draw the Input & Output voltage waveforms.
Observation Table: - V in = 0.8 volts Sr. No. R 1 (Ohms) R F (Ohms) Vin (v) V out (Volts) A v = Theoretical V out gain / V in 1 2 3 4 Calculations: Conclusion: -
Date: / /2014 PRACTICAL NO: - 2 AIM : To verify the application of op-amp as a Non-Inverting Amplifier. Equipments: - - Op-amp trainer Kit - Oscilloscope - Signal Generator Theory: - The circuit diagram bellow shows the op-amp working as a non-inverting amplifier. It should be noted that the inverting amplifier connection is more widely used because it has better frequency stability. In case of the non-inverting amplifier the input is given to the non-inverting terminal of the op-amp. The gain of the non-inverting amplifier is given by the following equation. A V = 1 + (R F /R 1 ) Procedure: - - Connect the circuit as shown in the circuit diagram with R 1 = 1KΩ and R F = 10KΩ. - Use the signal generator to give 1V, 1KHz sine wave supply to the non-inverting terminal of the op-amp as shown in the circuit diagram. - Observe the output voltage waveform on the Oscilloscope. - Measure the output voltage magnitude and put value of output voltage, R 1 and R F in observation table. - Repeat above steps for the new value of R 1 and R F. - Calculate the gain of amplifier as Av = Vout / Vin. - Compare this value with theoretical value = (1 + (R F / R 1 )). - Draw the Input & Output voltage waveforms.
Observation Table: - V in = 1 volt Sr. No. R 1 (Ohms) R F (Ohms) V out (Volts) A v = V out / V in Theoretical gain 1 2 3 4 Calculations: Conclusion: -
Date: / /2014 PRACTICAL NO: - 3 AIM : To verify the application of op-amp as an Integrator. Equipments: - Theory: - - Op-amp trainer Kit - Oscilloscope - Signal Generator. A circuit in which the output voltage waveform is the integral of the input voltage wave form is the integrator or the integration amplifier. Such a circuit is obtained by using a basic inverting amplifier configuration if the feedback resister R F is replaced by a capacitor C F as shown in the figure bellow. The expression for output voltage V 0 can be obtained by writing Kirchhoff s current equation at node v 2, Since I B is negligibly small, i 1 = I B + i F The relation between current through and voltage across the capacitor is Therefore,
However, V 1 = V 2 = 0 V because A is very large. Therefore, The output voltage can be obtained by integrating both sides with respect to time: Therefore, Where C is the integration constant and is proportional to the value of the out put voltage V 0 at the time = 0 second. Equation, above, indicates that the output voltage is directly proportional to the negative integral of the input voltage and inversely proportional to the time constant R 1 C F. for the example, if the input is a sine wave, the output will be a triangular wave. When V in =0, the integrator of figure above works as an open loop amplifier. This is because the capacitor C F acts as an open circuit (Xc F = oo ) to the input offset voltage V io. In the other words, the input offset voltage V io and the part of the input current charging capacitor produce the error voltage at the output of the integrator. Therefore in the practical integrator to reduce the error voltage at the output voltage, R F is connected across the feed back capacitor C F. Thus R F limits the low frequency gain and hence minimizes the variations in the output voltage. Procedure: - - Connect the circuit as shown in the circuit diagram. - Use the signal generator to give 1V, 1.8KHz, Square wave supply to the inverting terminal of the op-amp as shown in the circuit diagram. - Observe the output voltage waveform on the Oscilloscope. - Repeat above steps for the 1 V, 1.8 KHz sine wave and triangular wave supply. - Draw the Input & output wave form for each case. Conclusion: -
Date: / /2014 PRACTICAL NO: - 4 AIM : To verify the application of op-amp as a Differentiator. Equipments: - Theory: - - Op-amp trainer Kit. - Oscilloscope. - Signal Generator. As its name implies, the circuit performs the mathematical operation of the differentiation. That is the output wave form is the derivative of the input wave form. The differentiator may be constructed from a basic inverting amplifier if an input resister R 1 is replaced by a capacitor C 1 as shown in figure bellow. The expression for the output voltage can be obtain from Kirchhoff s current equation written at node V 2 as follows, Since, I C = I B + i F But, V 1 = V 2 = 0V, because A is very large.
Therefore, or Thus the output V 0 is equal to R F C 1 times the negative instantaneous rate of change of the input voltage V in with time. Since the differentiator perform the reverse of the integrator s function, a cosine wave input will produce a sine wave output, or triangular input will produce a square wave output. However the differentiator will not do this because it has some practical problems. The gain of the circuit (R F / X C1 ) increase with increase in frequency at the rate of 20 db/decade. This makes a circuit unstable. Also the input impedance X C1 decreases with increase in frequency, which make the circuit very susceptible to high frequency noise. When amplified, this noise can be completely overriding the differentiated output signal. Both the stability and high frequency noise problems can be corrected by the additional of two components; R 1 and C F, this circuit is a practical differentiator. Procedure: - - Connect the circuit as shown in the circuit diagram. - Use the signal generator to give 5V p-p, 1 KHz, triangular wave supply to the inverting terminal of the op-amp as shown in the circuit diagram. - Observe the output voltage waveform on the Oscilloscope. - Repeat above steps for the 5V p-p, 1 KHz, Sine wave & triangular wave supply. - Draw the Input & output wave form for each case. Conclusion: -
PRACTICAL NO: - 5 Date: / /2014 AIM : To verify the application of IC 555 as an Astable Multivibrator. Equipments: - Theory: - - 555 timer IC (One) - Resistor 10 KΩ (One) - Variable Port 10 KΩ (One) - Capacitor 0.01µF (Two) - Oscilloscope (One) - DC Power supply 5 V (One) Astable Multivibrator, often called a free running Multivibrator, is rectangular wave generating circuit. Unlike the monostable multivibrator, this circuit dose not require an external trigger to change the state of the output, hence the name free running. However, the time during which the output is either high or low is determined by two resistors and a capacitor, which are externally connected to the 555 timer. Astable operation: - With reference to the internal block diagram, initially, when the output is high, capacitor C starts charging towards Vcc through R A & R B. However as soon as voltage across the capacitor equals 2/3 Vcc comparator 1 trigger the flip flop and the output switches low. Now capacitor C starts discharging through R B and transistor Q1. When the voltage across C equals 1/3 Vcc, comparator 2 s output triggers the flip flop and the output goes high. Then the cycle repeats. The output voltage and the capacitor voltage wave form are shown in figure bellow. As shown in the figure, the capacitor is periodically charged and discharged between 2/3 Vcc and 1/3 Vcc respectively. The time during which the capacitor charge from 1/3 Vcc to 2/3 Vcc is equal to the time the output is a high is given by, t c = 0.69(R A + R B ) C
Where R A and R B are in ohms and C is in farads. Similarly the time during which the capacitor discharges from 2/3 Vcc to 1/3 Vcc is equal to the time the output is the low and is given by, t d = 0.69 (R B ) C Where R B is in ohms and C is in farads. Thus the total period of the output wave form is T= t c + t d = 0.69 (R A + 2R B ) C This, in turn, gives the frequency of the oscillation as f o = = The equation above indicates that the frequency f O is independent of the supply voltage Vcc. Procedure: - - Connect the circuit as shown in the circuit diagram. - Give 5 V DC supply to V CC terminal. - Observe the output voltage waveform, at pin 3, on the Oscilloscope. - Calculate the theoretical value of t ON and t OFF & compare it with the values measured on Oscilloscope. t ON = 0.69 (R A + R B ) C 1 t OFF = 0.69 (R B ) C 1 - Observe the charging & discharging wave forms of the capacitor C. - Draw the wave forms. Observation Table: - R A = R B = C 1 = 1 T 1.45 (R A + 2R B ) C Sr. No. 1 Theoretical Value Practical Value t ON t OFF t ON t OFF Conclusion: -
Date: / /2014 PRACTICAL NO: - 6 AIM : To verify the operation of IC 7812 as a 12V voltage regulator. Equipments: - - IC 7812 (One) - IN 4007 diodes (Four) - Transformer: 230V/24V (One) - Capacitor : 200µF (One) - 1- Φ variac (One) - Multi-meter (One) Theory: - The 7800 series consists of three-terminal positive voltage regulator with seven voltage options. The 7812 is one of them. This IC is fixed voltage regulator and with adequate heat sinking can deliver output current in excess of 1 A. This IC also have internal thermal overload protection and internal short-circuit current limiting. Proper operation of this IC requires common ground between input and output. In addition, the difference between input and output voltage (V in V out ), called dropout voltage, must be typically 2.0 V. The typical performance parameters of 7812 are Line Regulation, Load Regulation, Temperature Stability, and Ripple Rejection. Procedure: - - Connect the circuit as shown in the circuit diagram. - Give input to the 7812 that is greater than 14 V and dropout voltage is 2.0V - Measure the output voltage corresponding to the given input. - Note down the reading in the observation table. Observation Table: - Sr. No. 1 2 The I/P AC voltage at the bridge Rectifier Output DC voltage at the 7812 (pin 3) Conclusion: 3
Date: / /2014 PRACTICAL NO: - 7 AIM : To verify the application of op-amp as a Schmitt Trigger. Equipments: - - Op-amp trainer Kit - Oscilloscope - Signal Generator - Power Supply - Connecting wires Theory: - Fig-1 shows an inverting comparator, Schmitt trigger or squaring circuit with positive feedback. This circuit converts an irregular-shaped waveform to a square wave or pulse. The input voltage V in triggers (changes the state of) the output V o every time if exceeds certain voltage levels called upper threshold voltage V ut and threshold voltage V lt, as shown in fig-2. ( Fig-1 ) ( Fig-2 ) ( Fig-3 )
In fig-1 these threshold voltages are obtained by using the voltage divider R 1 -R 2, where the voltage across R 1 is fed back to the (+) input. The voltage across R 1 is a variable reference threshold voltage that depends on the value and priority of the output voltage V o. When V o = +V sat, the voltage across on the R 1 is called upper threshold voltage, V ut. The input voltage V in must be slightly more positive than V ut in order to cause the output V o to switch from +V sat to -V sat. As long as V in < V ut, V o is at +V sat Using the voltage-divider rule. R1 V ut = (+V sat ) - - - - - - - - (1) R1 + R2 Now when V o = -V sat, the voltage across R 1 is referred to as lower threshold voltage, V lt. V in must slightly more negative than V lt in order to cause V o to switch from V sat to +V sat. For V in values greater than V lt. V o is at V sat. V lt is given by the following equation: R1 V lt = (-V sat ) - - - - - - - - (2) R 1 + R2 If the threshold voltages V lt and V lt are made larger than the input noise voltages, the positive feedback will eliminate the false output transitions. Also, the positive feedback, because of its regenerative action, will make V o switch faster between +V sat to V sat. In the fig-1 resistance R OM R1 R2 is used to minimize the offset problems. Fig-2 shows that the output of the Schmitt trigger is a square wave when the input is a sine wave. The comparator with positive feedback is said to exhibit hysteresis, a dead band condition. That is, when the input of the comparator exceeds V ut, its output switches from +V sat to V sat and reverts back to its original state, +V sat, when the input goes below V lt [see fig.-3]. The hysteresis voltage is, of course equal to the difference between V ut and V lt. Therefore, V hy = V ut V lt R1 = (+V sat - (-V sat )) - - - - - - - - (2) R 1 + R 2 Procedure: - - Connect the circuit as shown in the circuit diagram. - Use the signal generator to give 1V p-p, 1 KHz, sine wave supply to the inverting terminal of the op-amp as shown in the circuit diagram. - Observe the output voltage waveform on the Oscilloscope. - Draw the Input & output wave form. - Calculate the values of Vut and Vlt and draw the hysteresis loop. Calculations: - V ut = R 1 (+ V sat ) / (R 1 + R 2 ) -------- --- (1) V lt = R 1 (- V sat ) / (R 1 + R 2 ) ---------------- (2) Conclusion: -
PRACTICAL NO: - 8 Date: / /2014 AIM: To study and verify Half adder and Full adder using logic gates: Equipments: - Theory: Digital IC trainer kit Patch cords Since digital system deal with numbers and codes the need for performing mathematical operation is paramount. In this practical two arithmetic logic circuit are dealt with. Half Adder using logic gates A half adder is the fundamental block used for addition. This is a two input adder as shown in fig. and the truth table is: Half Adder logic circuit
Procedure :( Half Adder); 1. To develop a half adder using gates and verify its operation. 2. Locate the blocks containing the gates on the trainer patch panel and hook up the circuit as in fig. 3. Apply inputs through logic input switches and form the truth table. Full Adder using logic gates Addition of two multidigit binary numbers is performed serially, one column at a time from right to left. When two bits in a column are added, it is necessary that the carry from the addition in previous column is also added. The truth table for a complete addition may be formed as: Full Adder logic circuit CONCLUSION:
PRACTICAL NO: - 9 Date: / /2014 AIM: To study about the R-S Flip Flop, Clocked R-S Flip-Flop,J-K Flip Flop. Theory: Logic circuits can broadly be classified into two types, Combinational circuits and sequential circuits. Combinational circuits are characterized by the property that their outputs depend on their inputs at that particular instant only, whereas for sequential circuits, the output at any instance will depend upon all the previous conditions the circuit attains in sequence. Thus, it is necessary for the circuits to have elements that remember their previous conditions. This is achieved by what are known as flip-flops. Introduction:- FLIP-FLOPS:- The Flip-Flop is a bistable device, i.e., a circuit with only two stable states. A flip-flop circuit can remember or store in binary bit (1 or 0) because of its bistable nature. The flip-flop responds to inputs. If an input causes it to go to its '1' state, it will remain there and remember a 1 until some signal causes it to go to 0 state. Similarly, once placed in the 0 state, it will remain there until told to go to the '1' state. This simple characteristic, the ability of flip-flop to retain its state, makes it the basic memory elements in the digital systems. THE S-R FLIP-FLOP A flip-flop can be built using logic gates. Fig show the same using NAND and NOR gates. Note that the gates are connected to give feedback to each other in such way that its act as a 'latch' to store a '1' or a '0'. The output Q & Q remain at their states (0 and 1) by the input S & R. Table gives the truth table relating S, R, Q & Q. This flip-flop is called SR flip-flop (Set - Reset). The Clocked S-R Flip Flop The flip-flops are usually parts of a large digital sequential system. If both the inputs to the flipflop do not appear at the same instant of time, the output will be unstable till the input stabilizes. This is sufficient, however to cause errors, which are transmitted sequentially resulting in cumulative error. Hence, it is necessary that the state changes take place only during fixed intervals of time, determined by some carefully regulated pulse train or discrete inputs. These inputs are different from the S-R inputs. This additional input is called 'CLOCK' and the various elements in the system work in co-ordination with it. Fig is the clock S-R flip-flop. Output changes takes place only when the clock pulse (or the level) appears. The truth table is given in Table.
The J-K Flip Flops J-K flip-flop makes use of feedback to remove the unpredictability in one of the state of S - R flip-flop. This is shown in Fig and its truth table is given in Table.There is a probable physical difficulty with the J-K flip-flop constructed as in fig. The truth table is based on the combination logic, which assumes that the inputs are independent of outputs. However, because of feedback from Q & Q to the inputs, the inputs will change during a clock pulse, if the output changes the state. Consider the case, J = 1, K = 1, Q = 0. When clock is HIGH, Q becomes 1 after a time t, the propagation delay time through the two NAND gates. Now J = 1, K = 1, Q = 1and the clock is still active (HIGH). So the Q toggle to '0'. Thus, during a clock pulse, the output oscillates between 1 & 0. At the end of the clock pulse, the Q value is ambiguous. This problem is called the ' race around condition'. This race problem can be avoided if the clock pulse width is less than the propagation delay of the gates. However, in practice, clock pulse widths are typically greater than the propagation delays of gates (a few ns). Conclusion:
PRACTICAL NO: - 10 Date: / /2014 AIM: To study about various types of logic Gates. Equipments: - Theory: - Digital IC trainer kit - Patch cords Logic gates are the basic components in digital electronics. They are used to create digital circuits and even complex integrated circuits Logic Gates are circuits made up of transistors, diodes, and resistors. Logic gates process one or more input signals in a logical fashion. Depending on the input value or voltage, the logic gate will either output a value of '1' for ON or a value of '0' for OFF. Types of GATES AND GATE OR GATE NOT GATE NAND GATE NOR GATE EX-OR GATE EX-NOR GATE AND GATE As its name implies, an AND logic gate performs an AND logic operation, which is a multiplication. It has at least two inputs. So, if A and B are its inputs, at the output we will find A x B (also represented as A B). So, AND logic gate can be summarized by the formula Y = A x B (or Y = A B). NAND gate The N letter on NAND stands for NOT, meaning that NAND logic gate is an AND gate with an inverter attached. So, its output is the opposite from AND. Its symbol is the same of AND but with a o (bubble) on its output, meaning that the output is inverted. You can build a NAND gate by connecting an AND is an inverter. ORGATE As its name implies, an OR logic gate performs an OR logic operation, which is an addition. It has at least two inputs. So, if A and B are its inputs, at the output we will find A + B. So, OR logic gate can be summarized by the formula Y = A + B. You can see its symbol on Figure and its truth table right below it.
NOR gate (NOR = Not + OR) The N letter on NOR stands for NOT, meaning that NOR logic gate is an OR gate with an inverter attached. So, its output is the opposite from OR. Its symbol is the same of OR but with a o on its output, meaning that the output is inverted. You can build yourself a NOR gate by connecting an OR gate to an inverter. NOT gate As the name implies, inverter will invert the number entered. If you enter 0, you will get a 1 on its output, and if you enter a 1, you will get a 0 on its output. The inverter symbol you can see on Figure. Inverter gate is also known as NOT and its output is Y = A X-OR XOR stands for exclusive OR. XOR gate compares two values and if they are different its output will be 1. XOR operation is represented by the symbol +. So = A +B. You can see XOR logic gate symbol in figure and its truth table right below it. X-NOR XNOR stands for exclusive NOR and is an XOR gate with its output inverted. So, its output is at 1 when the inputs have the same value and 0 when they are different. XNOR operation is represented by the symbol. So Y = A ( ) B. You can see XNOR logic gate symbol on Figure 20 and its truth table right below it. Conclusion: