L9856. High voltage high-side driver. Features. Description

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Transcription:

High voltage high-side driver Features High voltage rail up to 160 V dv/dt immunity ±50 V/nsec in full temperature range Driver current capability: 500 ma source, 500 ma sink Switching times 100 ns rise/fall with 2.5 nf load CMOS/TTL Schmitt trigger inputs with hysteresis Under voltage lock out Clamping on V CC Loading circuit for external Bootstrap capacitor Inverting input Reset circuitry SO-8 package Description SO-8 The L9856 is an high voltage device, manufactured with the BCD "OFF-LINE" technology. It has the capability of driving N-Channel Power MOS transistors. The upper (floating) section is enabled to work with voltage rail up to 160 V. The logic Inputs are CMOS/TTL compatible for ease of interfacing with controlling devices. Table 1. Device summary Order code Operating temp range, C Package Packing L9856-40 to +125 SO-8 Tube L9856TR -40 to +125 SO-8 Tape and Reel September 2013 Rev 3 1/14 www.st.com 1

Contents L9856 Contents 1 Block diagram andpin description................................ 5 1.1 Block diagram................................................. 5 1.2 Pin description................................................ 5 2 Electrical specifications........................................ 6 2.1 Thermal data.................................................. 6 2.2 Absolute maximum ratings....................................... 6 2.3 Recommended operating conditions............................... 7 2.4 Electrical characteristics......................................... 7 2.5 Logic table................................................... 10 3 Timing diagrams............................................. 11 4 Package information.......................................... 12 5 Revision history.............................................. 13 2/14

List of tables List of tables Table 1. Device summary.......................................................... 1 Table 2. Pin function.............................................................. 5 Table 3. Thermal data............................................................. 6 Table 4. Absolute maximum ratings.................................................. 6 Table 5. Recommended operating conditions.......................................... 7 Table 6. Electrical characteristics.................................................... 7 Table 7. Logic table............................................................. 10 Table 8. Document revision history................................................. 13 3/14

List of figures L9856 List of figures Figure 1. Block diagram............................................................ 5 Figure 2. Pin connection (top view)................................................... 5 Figure 3. Input/output timing diagram................................................ 11 Figure 4. Reset timing diagram..................................................... 11 Figure 5. SO-8 mechanical data and package dimensions................................ 12 4/14

Block diagram andpin description 1 Block diagram andpin description 1.1 Block diagram Figure 1. Block diagram V B V CC Undervoltage RESET VB to VS Pulse Filter FLIP FLOP Break before Make H O Undervoltage RESET VCC to GND V S RES- IN- Logic Pulse Filter Level Shifter "ON" Level Shifter "OFF" Delay Recharge path GND 1.2 Pin description Figure 2. Pin connection (top view) V CC IN- GND RESET- 1 2 3 8 7 V B H O 6 NC 4 5 V S Table 2. Pin function Pin # Pin name Description 1 V CC Driver supply, typical 5V 2 IN- Driver control signal input (negative logic) 3 GND Ground 4 RESET- Driver enable signal input (negative logic) 5 V S MOSFET source connection 6 NC No connection (no bondwire) 7 H O MOSFET gate connection 8 V B Driver output stage supply 5/14

Electrical specifications L9856 2 Electrical specifications 2.1 Thermal data Table 3. Thermal data Symbol Parameter Value Unit R th(j-amb) Thermal resistance junction to ambient Max. 150 C/W 2.2 Absolute maximum ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to GND, all currents are defined positive into any lead. An operation above the absolute maximum limit is not implied and can damage the part. Table 4. Absolute maximum ratings Symbol Parameter Min. Value Max. Units V BS High side floating supply voltage. -0.3 20 V V B High side driver output stage voltage neg. transient: 0.5 ms, external MOSFET off. -5 166 V V S High side floating supply offset voltage neg. transient 0.1 µs, repetitive pulse over lifetime at every switching event. -8 150 V V HO Output voltage gate connection. V S - 0.3 V B + 0.3 V V CC Supply voltage. -0.3 20 V V IN Input voltage. -0.3 V CC + 0.3 V I IN Input injection current. Full function, no latchup; (guaranteed by design). Test at 5 V and 7 V on Eng. Samples. --- +1 ma V RES Reset input voltage. -0.3 V CC + 0.3 V V esd Electrostatic discharge voltage (human body model). 2k V V CDM Charge device model CDM, EOS/ESD Ass. Std 5.3. Number of discharges per pin: 6. 500 V dv/dt Allowable offset voltage slew rate. -50 50 V/nsec T J Junction temperature. -55 150 T stg Storage temperature. -55 150 Lead temperature (Soldering, 10 seconds) 3 T L times Bosch soldering profile acc. to Bosch soldering conditions, Gen. Spec. - 300 C 6/14

Electrical specifications 2.3 Recommended operating conditions For proper operations the device should be used within the recommended conditions. Table 5. Recommended operating conditions Symbol Parameter Min. Value Max. Units V B (1) High side driver output stage voltage VS+4.4 VS+18 V V S High side floating supply offset voltage (25 C) (125 C) V HO Output voltage gate connection V S V B V V CC Supply voltage 4.4 6.5 V V IN Input voltage 0 V CC V V RES Reset input voltage 0 V CC V dv/dt (2) Allowable offset voltage slew rate -50 50 V/nsec F S Switching frequency 200 khz 1. Reset-Logic functional for V BS > 2V, independent from V CC -level. 2. Guaranteed by design. -3.2-2.9 150 150 V 2.4 Electrical characteristics Table 6. Electrical characteristics Unless otherwise specified, V CC = 5 V, V BS = 7 V, V S = 0 V, IN = 0 V, RES = 5 V, load R = 50, C = 2.5 nf. Unless otherwise noted, these specifications apply for an operating ambient temperature range of -40 C < T amb < 125 C. Symbol Parameter Test condition Min. Typ. Max. Unit V CC supply V CCUV+ V CCUV- V CCUVHYS td UVCC V CC supply undervoltage positive going threshold V CC supply undervoltage negative going threshold V CC supply undervoltage lockout hysteresis Undervoltage lockout response time V CC rising from 0 V 4.3 V CC dropping from 5 V 2.8 V CC steps either from 6.5 V to 2.7 V or from 2.7 V to 6.5 V 0.02 0.3 0.6 0.5 20 s I QCC V CC supply current 400 µa V 7/14

Electrical specifications L9856 Table 6. V BS supply V BSUV+ V BSUV- V BSUVHYS td UVBS V BS supply undervoltage positive going threshold V BS supply undervoltage negative going threshold V BS supply undervoltage lockout hysteresis Undervoltage lockout response time V CC rising from 0 V 4.3 V V CC dropping from 5 V 2.8 V BS steps either from 6.5 V to 2.7 V or from 2.7 V to 6.5V I QBS1 V BS supply current static mode, IN = 0 V or 5 V I QBS2 static mode, V BS = 16 V, IN = 0 V or 5 V V BS Electrical characteristics (continued) Unless otherwise specified, V CC = 5 V, V BS = 7 V, V S = 0 V, IN = 0 V, RES = 5 V, load R = 50, C = 2.5 nf. Unless otherwise noted, these specifications apply for an operating ambient temperature range of -40 C < T amb < 125 C. Symbol Parameter Test condition Min. Typ. Max. Unit V BS drop due to output turn-on Gate driver characteristics C BS = 1 µf, td IG-IN = 3 s, t TEST = 100 s 0.02 0.3 0.4 I PKSo1 T j = 25 C 120 250 I PKSo2 70 150 Peak output source current I PKSo3 V BS = 16V, T j = 25 C 250 500 I PKSo4 V BS = 16 V 150 300 0.5 20 µs V 100 µa 200 µa 210 mv I HO,off HO off state leakage current guaranteed by design 1 µa t r1 T j = 25 C 0.2 0.4 t r2 0.3 0.5 Output rise time t r3 V BS = 16 V, T j = 25 C 0.1 0.2 t r4 V BS = 16 V 0.15 0.3 I PKSi1 IN = 5 V, T j = 25 C 120 250 I PKSi2 IN = 5 V 70 150 I PKSi3 Peak output sink current IN = 5 V, T j = 25 C V BS = 16 V 250 500 I PKSi4 IN = 5 V, V BS = 16 V 150 300 t f1 IN = 5 V, T j = 25 C 0.2 0.4 t f2 IN = 5 V, 0.3 0.5 t f3 Output fall time V BS = 16 V, IN = 5 V, T j = 25 C 0.1 0.2 t f4 V BS = 16 V, IN = 5 V, 0.15 0.3 ma s ma µs 8/14

Electrical specifications Table 6. Electrical characteristics (continued) Unless otherwise specified, V CC = 5 V, V BS = 7 V, V S = 0 V, IN = 0 V, RES = 5 V, load R = 50, C = 2.5 nf. Unless otherwise noted, these specifications apply for an operating ambient temperature range of -40 C < T amb < 125 C. Symbol Parameter Test condition Min. Typ. Max. Unit t plhi Input-to-output turn-on propagation delay (50 % input level to 10 % output level) 0.1 0.35 t phli t plhr Input-to-output turn-off propagation delay (50 % input level to 90 % output level) RES-to-output turn-on propagation delay (50 % input level to 10% output level) 0.1 0.4 0.1 0.4 µs t phlr RES-to-output turn-off propagation delay (50 % input level to 90 % output level) 0.1 0.4 Input characteristics V INH High logic level input threshold 0.6 V CC V INL Low logic level input threshold V CC = 5V 0.28 V V CC R IN High logic level input resistance 60 100 250 k I IN High logic level input current V IN = V CC 5 µa High logic level RES input V RESH 0.6 V threshold CC V CC = 5V Low logic level RES input 0.28 V RESL threshold V CC High logic level RES Input R RES 60 100 250 k resistance I RES Low logic level input current V RES = 0 5 µa Recharge characteristics t on_rech t off_rech V RECH Recharge transistor turn-on propagation delay Recharge transistor turn-off propagation delay Recharge output transistor onstate voltage drop V S = 5V 3 6 9 µs 1 ma forced on recharge path on 0.1 0.5 µs 0.5 1.2 V Deadtime characteristics DT HOFF DT HON High side turn-off to recharge gate turn-on Recharge gate turn-off to high side turn-on V CC = 5 V 3 6 9 0.1 0.4 0.7 µs 9/14

Electrical specifications L9856 2.5 Logic table Table 7. Logic table Supply voltages and thresholds Signals V cc V BS RESET- IN- Output Ho Recharge path < V CCUV- X X X OFF ON X X LOW X OFF ON X X X HIGH OFF ON > V CCUV+ > V BSUV+ HIGH LOW ON OFF > V CCUV+ < VB SUV- HIGH LOW OFF OFF Note: X means independent from signal. 10/14

Timing diagrams 3 Timing diagrams Figure 3. Input/output timing diagram IN RES Vs 90% 90% HO 10% 10% tplhi tphli t rx t fx DT HON DT HOFF Recharge OFF ON t off-rech t on-rech Figure 4. Reset timing diagram IN RES HO t plhr t phlr 11/14

Package information L9856 4 Package information In order to meet environmental requirements, ST (also) offers these devices in ECOPACK packages. ECOPACK packages are lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 5. SO-8 mechanical data and package dimensions mm inch DIM. MIN. TYP. MAX. MIN. TYP. MAX. A 1.750 0.0689 A1 0.100 0.250 0.0039 0.0098 A2 1.250 0.0492 b 0.280 0.480 0.0110 0.0189 c 0.170 0.230 0.0067 0.0091 D (1) 4.800 4.900 5.000 0.1890 0.1929 0.1969 E 5.800 6.000 6.200 0.2283 0.2362 0.2441 (2) E1 3.800 3.900 4.000 0.1496 0.1535 0.1575 e 1.270 0.0500 h 0.250 0.500 0.0098 0.0197 L 0.400 1.270 0.0157 0.0500 L1 1.040 0.0409 k 0 8 0 8 ccc 0.100 0.0039 Notes: 1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0.15mm in total (both side). 2. Dimension E1 does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. OUTLINE AND MECHANICAL DATA SO-8 0016023 D 12/14

Revision history 5 Revision history Table 8. Document revision history Date Revision Changes 29-Jun-2007 1 Initial release. 30-May-2008 2 Update Features section on page 1. Updated Table 4: Absolute maximum ratings on page 6. Updated Table 5: Recommended operating conditions on page 7. 20-Sep-2013 3 Updated disclaimer. 13/14

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