RT9231A. Advanced PWM and Triple Linear Power Controller. General Description. Features. Applications. Ordering Information

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Advanced PWM and Triple Linear Power Controller General Description The RT9231A is a 4inone power controller optimized for highperformance microprocessor and computer applications. The IC integrates a PWM controller, triple linear controller as well as monitoring and protection functions into a 28pin SOP package. The PWM controller regulates the microprocessor core voltage with a synchronous buck converter. The first linear controller supplies the computer system's AGP 1.5V or 3.3V bus power. The second linear controller provides power for the 1.5V GTL bus and the 3rd linear controller provides 1.8V power for the North/South Bridge core voltage and/ or cache memory circuits. The RT9231A features an Intelcompatible, TTL 5bit programmable DAC that adjusts the core voltage from 2.1V to 3.5V in 0.1V increments and from 1.3V to 2.05V in 0.05V steps. The 5bit DAC has a typical ±1% tolerance. The first linear controller is userselectable for output level of 1.5V and 3.3V with ±2.5% accuracy. The other two linear controllers provide fixed output voltages of 1.5V ± 3% and 1.8V ±3%. All the three linear controllers drive external NMOSFET or NPNs bipolar for the pass transistor. The RT9231A monitors all the output voltages. A powergood signal is issued when the core voltage is within ±10% of the DAC setting and the other levels are above their undervoltage levels. Additional buildin overvoltage protection for the core output uses the lower MOSFET to prevent output voltage above 115% of the DAC setting. The PWM overcurrent function monitors the output current using the voltage drop across the MOSFET's R DS(ON), which eliminates the need for a current sensing resistor. Features 4inone Regulated Voltages for Microprocessor Core, AGP Bus, North/South Brige and/or Cache Memory, GTL Bus Power Compatible with HIP6021A PowerGood Output Voltage Monitor Switching section 5bit DAC Programmable from 1.3V to 3.5V ±1% DAC Accuracy Fast Transient Response Full 0% to 100% Duty Cycle Driver Fixed 200kHz Switching Frequency Adaptive NonOverlapping Gate Driver OverCurrent Monitor Uses MOSFET R DS(ON) OverVoltage Protection Uses Lower MOSFET Linear Section Fixed or Useradjustable Linear Regulator Output Voltage MOSFET or NPN Driving Capability Ultra Fast Response Speed UnderVoltage Protection Internal Thermal Shutdown RoHS Compliant and 100% Lead (Pb)Free Applications Full Motherboard Power Regulation for Computer Lowvoltage Distributed Power Supplies Ordering Information RT9231A Package Type S : SOP28 Operating Temperature Range C : Commercial Standard P : Pb Free with Commercial Standard Note : RichTek Pbfree products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC JSTD020. Suitable for use in SnPb or Pbfree soldering processes. 100%matte tin (Sn) plating. DS9231A04 March 2004 1

Pin Configurations (TOP VIEW) DRIVE2 FIX VID4 VID3 VID2 VID1 VID0 PG SD VSEN2 SELECT SS FAULT VSEN4 28 2 27 3 26 4 25 5 24 6 23 7 22 8 21 9 20 10 19 11 18 12 17 13 16 14 15 SOP28 UGATE1 SW LGATE1 PGND OCSET VSEN1 FB NC VSEN3 DRIVE3 GND VAUX DRIVE4 Typical Application Circuit 12V 5V 15A 1uH GND 4*1000uF 10 2*1uF 1uF 1000pF 5V 28 16 VAUX OCSET1 23 1.21K 3.3V V OUT2 (3.3V or 1.5V) TYEDET HUF761373S 1000uF 1000uF 1000uF 1 10 11 DRIVE2 VSEN2 UGATE1 SW RT9231A SELECT PG LGATE PGND 8 27 26 25 24 PHB83N03LT PHB95N03LT 4.99K 3.5uH POWERGOOD 10K 7*1000uF V OUT1 1.3V to 3.5V V OUT3 1.5V V OUT4 1.8V RFD3055 1000uF 270uF RFD3055 18 19 15 14 9 2 DRIVE3 VSEN1 VSEN3 FB VID0 DRIVE4 VID1 VSEN4 VID2 VID3 SD VID4 FIX SS GND 22 21 7 6 5 4 3 12 0.039uF 732K 0.68uF 17 2 DS9231A04 March 2004

Function Block Diagram FIX SD VSEN1 OCSET1 PowerOn Reset (POR) 110% 90% PG UGATE1 SW LGATE1 PGND GND 115% Over Voltage VAUX 200uA LUV Linear Under Voltage Upper Drive OV OC1 Inhibit Soft Start & Fault Logic Gate Control Logic PWM COMP1 FAULT PWM1 Error Amp1 Lower Drive TTL D/A Converter (DAC) DACOUT Oscillator Compensation VID4 VID3 VID2 VID1 VID0 DRIVE3 DRIVE4 VSEN4 DRIVE2 VSEN2 SELECT VSEN3 VAUX 28uA 5V SS FB FATLT 75% 1.26V Inhibit 75% 1.5V or 3.6V DS9231A04 March 2004 3

Absolute Maximum Ratings Supply Voltage 15V PGOOD, FAULT and GATE Voltage GND0.3V to V CC 0.3V Input, Output or I/O Voltage GND0.3V to 7V Ambient Temperature Range 0 C to 70 C Junction Temperature Range 0 C to 125 C Storage Temperature Range 65 C to 150 C Lead Temperature (Soldering, 10 sec.) 260 C Package Thermal Resistance SOP28, θ JA 60 C/W Recommended Operating Conditions Supply Voltage 12V ± 10% Ambient Temperature Range 0 C to 70 C Junction Temperature Range 0 C to 125 C CAUTION: Stresses beyond the ratings specified in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Characteristics (V CC = 12V, PGND = 0V, T A = 25 C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Units V CC Supply Current Nominal Supply Current I CC UGATE, LGATE, DRIVE2, DRIVE3, and DRIVE4 Open 10 ma PowerOn Reset V CC Rising Threshold V OCSET = 4.5V 7.5 9.5 V V CC Falling Threshold V OCSET = 4.5V 7 9 V Rising VAUX Threshold V OCSET = 4.5V 2.8 V VAUX Threshold Hysteresys V OCSET = 4.5V 0.5 V Rising V OCSET Threshold 1.25 V DAC and Band Gap Reference DAC (VID0VID4) Input Low Voltage 0.8 V DAC (VID0VID4) Input High Voltage 2.0 V DACOUT Voltage Accuracy 1 1 % Band Gap Reference Voltage V BG 1.240 1.265 1.290 V To be continued 4 DS9231A04 March 2004

Parameter Symbol Test Conditions Min Typ Max Units Oscillator Free Running Frequency 180 200 225 khz Ramp Amplitude V OSC 1.9 V PP Linear Regulators (OUT2, OUT3, and OUT4) VSEN2 Regulation Voltage SELECT < 0.8V 1.462 1.500 1.538 V VSEN2 Regulation Voltage SELECT > 2.0V 3.500 3.600 3.700 V VSEN3 Regulation Voltage 1.455 1.500 1.545 V VSEN4 Regulation Voltage 1.746 1.800 1.854 V UnderVoltage Level (All Linears) (VSEN/VREG) UnderVoltage Hysteresis (All Linears) (VSEN/VREG) VSEN3 Rising 75 % VSEN3 Falling 100 mv Output Drive Current (All Linears) VAUX = 5V 20 40 ma Synchronous PWM Controller Error Amplifier DC Gain 65 db PWM Controller Gate Driver UGATE Source R UGATE V CC = 12V V CC V UGATE = 1V 4 7 Ω UGATE Sink R UGATE V UGATE = 1V 3 7 Ω LGATE Source I LGATE V CC = 12V, V LGATE = 2V 1 A LGATE Sink R LGATE V LGATE = 1V 2 6 Ω Protection V OUT1 OverVoltage Trip VSEN1 Rising 112 115 124 % FAULT Souring Current V FAULT = 8V 10 14 ma OCSET1 Current Source I OCSET V OCSET1 = 4.5V 170 200 230 µa SoftStart Current I SS V SS = 1V 28 µa Power Good V OUT1 Upper Threshold VSEN1 Rising 108 112 % V OUT1 Under Voltage VSEN1 Rising 87 95 % V OUT1 Hysteresis (VSEN1/DACOUT) Upper/Lower Threshold 2 % PGOOD Voltage Low V PGOOD I PGOOD = 4mA 0.5 V DS9231A04 March 2004 5

Functional Pin Description DRIVE2 (Pin 1) Connect this pin to the gate of an external MOSEFT. This pin provides the drive for the AGP regulator's pass transistor. FIX (Pin 2) Grounding this pin bypasses the internal resistor dividers that set the voltage of the 1.5V and 1.8V linear regulators. This way, the output voltage of the two regulators can be adjusted from 1.3V up to the input voltage (3.3V or 5V) by way of an external resistor divider corrected at the corresponding VSEN pin. The new output voltage set by the external resistor divider can be determined using the following formula: R OUT V OUT = 1.265V x (1 ) R GND Where R OUT is the resistor connected from VSEN to the output of the regulator, and R GND is the resistor connected from VSEN to ground. Left open, this pin is pulled high enabling fixed output voltage operation. VID0, VID1, VID2, VID3, VID4 (Pin 7, 6, 5, 4, and 3) VID04 are TTLcompatible the input pins to the 5bit DAC. The state logic of these five pins program the internal voltage reference, DACOUT. The level of DACOUT sets the microprocessor core converter output voltage, as well as the corresponding PGOOD and OVP thresholds. Table 1 specifies the DACOUT voltage of 32 combinations of VID levels. PG (Pin 8) Power Good is an open collector output used to indicate the status of the PWM converter output voltage. This pin is pulled low when the synchronous regulator output is not within ±10% of the DACOUT reference voltage, or when any of the other outputs are below their undervoltage thresholds. SD (Pin 9) This pin shuts down the entire IC. A TTLcompatible, logic level high signal applied at this pin immediately disables all outputs. When reenabled, the IC undergoes a new softstart cycle. Left open, this pin is pulled low by an internal pulldown current source, enabling operation. VSEN2 (Pin 10) Connect this pin to the output of the AGP linear regulator. The voltage at this pin is regulated to the level predetermined by the logiclevel status of the SELECT pin. This pin is also monitored for undervoltage events. SELECT (Pin 11) This pin determines the output voltage of the AGP bus switching regulator. A low TTL input sets the output voltage to 1.5V while a high input sets the output voltage to 3.6V. When the input voltage is 3.3V, DRIVE2 continuously turn on providing a DC current path from the input(3.3v IN ) to output (V OUT2 ) of the AGP controller. SS (Pin 12) Connect a capacitor from this pin to ground. This capacitor, along with an internal 28µA (V SS >1V) current source, sets the softstart interval of the converter. FAULT (Pin 13) This pin is low during normal operation, but it is pulled to 8V (V CC = 12V) in the event of an overvoltage or overcurrent condition. VSEN4 (Pin 14) Connect this pin to the output of the 1.8V regulator. This pin is monitored for undervoltage events. DRIVE4 (Pin 15) Connect this pin to the gate of an external MOSFET. This pin provides the drive for the 1.8V regulator's pass transistor. 6 DS9231A04 March 2004

VAUX (Pin 16) This pin provides boost current for the two linear regulator output drives in the event bipolar NPN transistors (instead of Nchannel MOSFETs) are employed as pass elements. The voltage at this pin is monitored for poweron reset (POR) purpose. GND (Pin 17) Signal ground for the IC. All voltage levels are measured with respect to this pin. DRIVE3 (Pin 18) Connect this pin to the gate of an external MOSFET. This pin provides the drive for the 1.5V regulator's pass transistor. VSEN3 (Pin 19) Connect this pin to the output of the 1.5V linear regulator. This pin is monitored for undervoltage events. FB (Pin 21) This pin is connected to the PWM converter's output voltage. LGATE (Pin 25) Connect LGATE to the PWM converter's lower MOSFET gate. This pin provides the gate drive for the lower MOSFET. SW (Pin 26) Connect the PHASE pin to the PWM converter's upper MOSFET source. This pin represents the gate drive return current path and is used to monitor the voltage drop across the upper MOSFET for overcurrent protection. UGATE (Pin 27) Connect UGATE pin to the PWM converter's upper MOSFET gate. This pin provides the gate drive for the upper MOSFET. (Pin 28) Provide a 12V bias supply for the IC to this pin. This pin also provides the gate bias charge for all the MOSFETs controlled by the IC. The voltage at this pin monitored for poweron reset (POR) purpose. VSEN1 (Pin 22) This pin is connected to the PWM converter's output voltage. The PGOOD and OVP comparator circuits use the signal to report output voltage status and for overvoltage protection. OCSET (Pin 23) Connect a resistor from this pin to the drain of the respective upper MOSFET. This resistor, an internal 200mA current source, and the upper MOSFET onresistance set the converter overcurrent trip point. An overcurrent trip cycles the softstart function. The voltage at this pin is monitored for poweron reset (POR) purpose and pulling this pin low with an open drain device will shut down the IC. PGND (Pin 24) This is the power ground of UGATE. Tie the synchronous PWM converter's lower MOSFET source to this pin. DS9231A04 March 2004 7

Table 1. VOUT1 Voltage Program Pin Name VID4 VID3 VID2 VID1 VID0 Normal OUT1 Voltage DACOUT 0 1 1 1 1 1.30 0 1 1 1 0 1.35 0 1 1 0 1 1.40 0 1 1 0 0 1.45 0 1 0 1 1 1.50 0 1 0 1 0 1.55 0 1 0 0 1 1.60 0 1 0 0 0 1.65 0 0 1 1 1 1.70 0 0 1 1 0 1.75 0 0 1 0 1 1.80 0 0 1 0 0 1.85 0 0 0 1 1 1.90 0 0 0 1 0 1.95 0 0 0 0 1 2.00 0 0 0 0 0 2.05 1 1 1 1 1 2.00 1 1 1 1 0 2.10 1 1 1 0 1 2.20 1 1 1 0 0 2.30 1 1 0 1 1 2.40 1 1 0 1 0 2.50 1 1 0 0 1 2.60 1 1 0 0 0 2.70 1 0 1 1 1 2.80 1 0 1 1 0 2.90 1 0 1 0 1 3.00 1 0 1 0 0 3.10 1 0 0 1 1 3.30 1 0 0 1 0 3.30 1 0 0 0 1 3.40 1 0 0 0 0 3.50 8 DS9231A04 March 2004

Outline Dimension A H M J B F I C D Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 17.704 18.110 0.697 0.713 B 7.391 7.595 0.291 0.299 C 2.362 2.642 0.093 0.104 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.229 0.330 0.009 0.013 I 0.102 0.305 0.004 0.012 J 10.008 10.643 0.394 0.419 M 0.381 1.270 0.015 0.050 28Lead SOP Plastic Package RICHTEK TECHNOLOGY CORP. Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 DS9231A04 March 2004 RICHTEK TECHNOLOGY CORP. Taipei Office (Marketing) 8F1, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com 9