HX1151 GENERAL DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATION. Step-Down Converter. 1.5MHz, 1.3A Synchronous

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1.5MHz, 1.3A Synchronous Step-Down Converter FEATURES High Efficiency: Up to 96% 1.5MHz Constant Frequency Operation 1300mA Output Current No Schottky Diode Required 2.3 to 6 Input oltage Range Adjustable Output oltage Range Options from 0.6 to in 100% Duty Cycle Low Dropout Operation Low Quiescent Current: 35 Slope Compensated Current Mode Control for Excellent Line and Load Transient Response Short Circuit Protection Thermal Fault Protection Inrush Current Limit and Soft Start <1 Shutdown Current Tiny SOT23-5 Package APPLICATIONS Cellular and Smart Phones Wireless and DSL Modems PDAs Digital Still and ideo Cameras MP3 Players GENERAL DESCRIPTION The are high-efficiency, high frequency synchronous step-down DC-DC regulator ICs capable of delivering up to 1.3A output currents. The can operate over a wide input voltage range from 2.3 to 6 and integrates main switch and synchronous switch with very low RDS(ON) to minimize the conduction loss. It is ideal for powering portable equipment that runs from a single cell Lithium-Ion (Li+) battery. The output voltage can be regulated as low as 0.6. The can also run at 100% duty cycle for low dropout operation, extending battery life in portable system. This device offers two operation modes, PWM mode and PFM Mode switching control, which allows a high efficiency over the wider range of the load. The is offered in a low profile (1mm) 5-pin, thin SOT package, and is available in an adjustable version. TYPICAL APPLICATION Figure 1. Typical Application Circuit 1

ABSOLUTE MAXIMUM RATGS (Note 1) Input Supply oltage -0.3 to 6.5 Operating Temperature Range -40 C to +85 C RUN,FB oltages... -0.3 to 6.5 Junction Temperature(Note2)..125 C SW oltage -0.3 to (in+0.3) Storage Temperature Range.. -65 C to 150 C Peak SW Sink and Source Current...2.5A Lead Temperature(Soldering,10s)...+300 C PACKAGE/ORDER FORMATION 1 2 3 4 Part Number SWICHG FREQUENCY Temperature Range PUT OLTAGE () PUT CURRENT (A) 1.5MHz -40 C to +85 C ADJ 1.3 P DESCRIPTION SOT23-5 P NAME FUNCTION 1 RUN 2 GND Ground Pin 3 SW 4 5 FB Chip Enable Pin. Drive RUN above 1.5 to turn on the part. 0.3 to turn it off. Do not leave RUN floating. Drive RUN below Power Switch Output. It is the switch node connection to Inductor. This pin connects to the drains of the internal P-ch and N-ch MOSFET switches. Power Supply Input. Must be closely decoupled to GND with a 10µF or greater ceramic capacitor. Feedback Input. An internal resistive divider divides the output voltage down for comparison to the internal reference voltage. 2

ELECTRICAL CHARACTERISTICS (Note 3) (=RUN=3.6, =1.8, TA = 25 C, unless otherwise noted.) Parameter Conditions M TYP MAX unit Input oltage Range 2.3 6 ULO Threshold 1.7 1.9 2.1 Input DC Supply Current PWM Mode PFM Mode Shutdown Mode Regulated Feedback oltage Reference oltage Line Regulation Output oltage Line Regulation Output oltage Load Regulation Oscillation Frequency (Note 4) out = 90%, ILoad=0mA out = 105%, ILoad=0mA RUN = 0, =4.2 140 35 0.1 300 70 1.0 TA = 25 C 0.588 0.600 0.612 TA = 0 C A 0.586 0.600 0.613 TA = -40 C A 0.585 0.600 0.615 in=2.5 to 6 0.04 0.40 %/ = 2.5 to 6 0.04 0.4 % out=100% out=0 0.5 % 1.5 MHz 300 khz On Resistance of PMOS ISW=100mA 0.13 0.2 ON Resistance of NMOS ISW=-100mA 0.1 0.2 Peak Current Limit = 3, out=90% 2.0 A RUN Threshold 0.30 1.0 1.50 RUN Leakage Current ±0.01 ±1.0 SW Leakage Current RUN=0,=sw=5 ±0.01 ±1.0 Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD) x (250 C/W). Note3: 100% production test at +25 C. Specifications over the temperature range are guaranteed by design and characterization. Note 4: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. 3

TYPICAL PERFORMANCE CHARACTERISTICS PFM MODE 4

FUNCTIONAL BLOCK DIAGRAM Figure 2. Block Diagram FUNCTIONAL DESCRIPTION is a synchronous buck regulator IC that integrates the PWM/PFM control, high-side and low-side MOSFETs on the same die to minimize the switching transition loss and conduction loss. With ultra low RDS(ON) power switches and proprietary PWM control, this regulator IC can achieve the highest efficiency and the highest switch frequency simultaneously to minimize the external inductor and capacitor size, and thus achieving the minimum solution footprint. The requires only three external power components (Cin, Cout and L). The adjustable version can be programmed with external feedback to any voltage, ranging from 0.6 to the input voltage. At dropout operation, the converter duty cycle increases to 100% and the output voltage tracks the input voltage minus the Rdson drop of the high-side MOSFET. The internal error amplifier and compensation provides excellent transient response, load, and line regulation. Soft start function prevents input inrush current and output overshoot during start up. 5

APPLICATIONS FORMATION Setting the Output oltage The internal reference REF is 0.6(Typical).The output voltage is divided by a resistor,r1 and R2 to the FB pin. The output voltage is given by: REF R (1 R Inductor Selection For most designs, the operates with inductors of 1µH to 4.7µH. Low inductance values are physically smaller but require faster switching, which results in some efficiency loss. The inductor value can be derived from the following equation: Where L IL I L f OSC 2 1 is inductor Ripple Current. Large value inductors result in lower ripple current and small value inductors result in high ripple current. For optimum voltage-positioning load transients, choose an inductor with DC series resistance in the 50m to 150m Input Capacitor Selection With the maximum load current at 1.3A, the maximum ripple current through input capacitor is about 0.6Arms. A typical X7R or better grade ceramic capacitor with 6 rating and greater than 10uF capacitance can handle this ripple current well. To minimize the potential noise problem, place this ceramic capacitor really close to the and GND pins. Care should be taken to minimize the loop area formed by C, and /GND pins. ) Output Capacitor Selection The output capacitor is required to keep the output voltage ripple small and to ensure regulation loop stability. The output capacitor must have low impedance at the switching frequency. Ceramic capacitors with X5R or X7R dielectrics are recommended due to their low ESR and high ripple current ratings. The output ripple is determined by: ( f OSC L ) 1 ESR 8fosc C3 A 10µF ceramic Capacitor can satisfy most applications. PC Board Layout Checklist When laying out the printed circuit board, the following checking should be used to ensure proper operation of the. Check the following in your layout: 1. The power traces, consisting of the GND trace, the SW trace and the trace should be kept short, direct and wide. 2. Does the (+) plates of Cin connect to in as closely as possible.this capacitor provides the AC current to the internal power MOSFETs. 3. Keep the switching node, SW, away from the sensitive node. 4. Keep the (-) plates of Cin and Cout as close as possible. 6

PACKAGE DESCRIPTION -1.0 7 Aerosemi Technology Co., Ltd