Questions and Solutions PART-A Unit-1 INTRODUCTION TO OP-AMPS 1. Explain data acquisition system Jan13 DATA ACQUISITION SYSYTEM BLOCK DIAGRAM: Input stage Intermediate stage Level shifting stage Output stage INPUT STAGE: Dual input, balanced output differential amplifier. Provides voltage gain and establishes the input resistance of the op-amp. INTERMEDIATE STAGE: Dual input, unbalanced output differential amplifier. It is driven by the first stage. LEVEL SHIFTING STAGE: The output of the differential amplifier is directly coupled to the input of the intermediate level shifter stage. It is used after the intermediate stage to shift the DC level at the output of the intermediate. This stage has the circuit, called level translator circuit. OUTPUT STAGE: It is a complementary symmetry push-pull amplifier. Raises the output voltage swing and current capability of the op-amp. Provides low output impedance. An Operational Amplifier, or Op Amp, is a dual-input, single-output linear amplifier that exhibits a high open-loop gain, high input resistances, and a low output resistance. One of the inputs of an operational amplifier amp is non-inverting while the other is inverting. The output Vout of an operational amplifier without feedback (also known as open-loop) Page 1
is given by the formula: Vout = A(Vp-Vn) where A is the open-loop gain of the op amp, Vp is the voltage at the non-inverting input, and Vn is the voltage at the inverting input. The open-loop gain of a typical op amp is in the range of 105-106. The operational amplifier got its name from the fact that it can be configured to perform many different mathematical operations. Depending on its feedback circuit and biasing, an op amp can be made to add, subtract, multiply, divide, negate, and, interestingly, even perform calculus operations such as differentiation and integration. Of course, aside from these operations, op amps are also found in a very large number of applications. In fact, many consider the op amp as the foundation of many analog semiconductor products today. Because of the very high resistance exhibited by the inputs of an op amp, the currents flowing through them are very small. The current flowing in or out of an op amp's input pin, known as input bias current, is basically just leakage current at the base or gate of the input transistor of that input, which is why it is very small. When solving voltage/current equations for op amp circuits, the input currents are usually assumed to be zero. For most of the commonly-used opamp circuits, this means that the total output current of the op amp is flowing through the feedback circuit between the output and the inverting input (the feedback is usually connected to the inverting input for operation stability). 2. Write the equivalent circuit for op-amp june13 The op-amp amplifies the difference in the input voltages and not the input voltages themselves and thus the polarity of the output voltage depends on the difference in voltage. Ideal Voltage Transfer Curve: Page 2
because Vo cannot exceed +ve and ve saturation voltages. 3.What is the maximum peal to peak output voltage without clipping? june 13 (a) In Example-1 we have determined the voltage gain of the dual input, balanced output differential amplifier. Substituting this voltage gain (A d = 86.96) and given values of input voltages in (E-1), we get (b) Note that in case of dual input, balanced output difference amplifier, the output voltage v o is measured across the collector. Therefore, to calculate the maximum peak to peak output voltage, we need todetermine the voltage drop across each collector resistor: Substituting I C = I CQ = 0.988 ma, we get This means that the maximum change in voltage across each collector resistor is ± 2.17 (ideally) or 4.34 V PP. In other words, the maximum peak to peak output voltage with out clipping is (2) (4.34) = 8.68 V PP. 4.Consider example-1 of lecture-2. The specifications are given again for the dual input, unbalanced-output differential amplifier: RC = 2.2 kω, RB= 4.7 kω, Rin1 = Rin2= 50Ω, +VCC = 10V, -VEE= -10 V, βdc =100 and VBE= 0.715V. June13 (a). The parameters of the amplifiers are same as discussed in example-1 of lecture-1. The operating point of the two transistors obtained in lecture-1 are given below I CQ = 0.988 ma V CEQ =8.54V The ac emitter resistance Page 3
Therefore, substituting the known values in voltage gain equation (E-2), we obtain b). The input resistance seen from each input source is given by (E-3) and (E-4): (c) The output resistance seen looking back into the circuit from each of the two output terminals is given by (E-5) R o1 = R o2 = 2.2 k Ω 5. Sketch the circuit of capacitor coulpled high Zin non inverting amplifier. Explain design and The design and circuit operation of a capacitor coupled inverting amplifier using single polarity supply(jan 2015,july 2014,july 2013) The various important parameters of OPAMP are follows: 2. Input offset Current: The input offset current I io is the difference between the currents into inverting and non-inverting terminals of a balanced amplifier. I io = I B1 I B2 The I io for the 741C is 200nA maximum. As the matching between two input terminals is improved, the difference between I B1 and I B2 becomes smaller, i.e. the I io value decreases further.for a precision OPAMP 741C, I io is 6 na 3.Input Bias Current: The input bias current I B is the average of the current entering the input terminals of a balanced amplifier i.e. I B = (I B1 + I B2 ) / 2 For 741C I B(max) = 700 na and for precision 741C I B = ± 7 na Page 4
4. Differential Input Resistance: (R i ) R i is the equivalent resistance that can be measured at either the inverting or non-inverting input terminal with the other terminal grounded. For the 741C the input resistance is relatively high 2 MΩ. For some OPAMP it may be up to 1000 G ohm. 5. Input Capacitance: (C i ) C i is the equivalent capacitance that can be measured at either the inverting and noninverting terminal with the other terminal connected to ground. A typical value of C i is 1.4 pf for the 741C. 6. Offset Voltage Adjustment Range: 741 OPAMP have offset voltage null capability. Pins 1 and 5 are marked offset null for this purpose. It can be done by connecting 10 K ohm pot between 1 and 5 as shown in fig. 3. 7. Input Voltage Range : Input voltage range is the range of a common mode input signal for which a differential amplifier remains linear. It is used to determine the degree of matching between the inverting and noninverting input terminals. For the 741C, the range of the input common mode voltage is ± 13V maximum. This means that the common mode voltage applied at both input terminals can be as high as +13V or as low as 13V. 8. Common Mode Rejection Ratio (CMRR). CMRR is defined as the ratio of the differential voltage gain A d to the common mode voltage gain A CM CMRR = A d / A CM. For the 741C, CMRR is 90 db typically. The higher the value of CMRR the better is the matching between two input terminals and the smaller is the output common mode voltage. 9. Supply voltage Rejection Ratio: (SVRR) SVRR is the ratio of the change in the input offset voltage to the corresponding change in power supply voltages. This is expressed in V / V or in decibels, SVRR can be defined as V io / V Where V is the change in the input supply voltage and io is the corresponding change in the offset voltage. Page 5
For the 741C, SVRR = 150 µ V / V. For 741C, SVRR is measured for both supply magnitudes increasing or decreasing simultaneously, with R 3 10K. For same OPAMPS, SVRR is separately specified as positive SVRR and negative SVRR. 6.With a neat circuit diagram. Explain circuit operation of a high input impedance capacitor coupled Voltage follower Derive Zi(jan 2014,jan 2015) C = 100 PF=100 x 10-12 F I = 150 µa = 150 x 10-6 A Slew rate is 1.5 V / µs. 7.Briefly discuss the upper cut off frequency of an Op-amp circuit and show how the cut off frequency can be set for inverting amplifier (jan2014, July 2013) The slew rate of an operational amplifier is As for output free of distribution, the slews determines the maximum frequency of operation fmax for a desired output swing. so So bandwidth = 26.5 khz. Page 6