ICS553 LOW SKEW 1 TO 4 CLOCK BUFFER. Description. Features. Block Diagram DATASHEET

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DATASHEET ICS553 Description The ICS553 is a low skew, single input to four output, clock buffer. Part of IDT s ClockBlocks TM family, this is our lowest skew, small clock buffer. See the ICS552-02 for a 1 to 8 low skew buffer. For more than eight outputs, see the MK74CBxxx Buffalo TM series of clock drivers. IDT makes many non-pll and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Features Extremely low skew outputs (50 ps maximum) Packaged in 8-pin SOIC Available in Pb (lead) free package Low power CMOS technology Operating voltages of 2.5 V to 5 V Output Enable pin tri-states outputs 5 V tolerant input clock Commercial (0 to +70 C) and Industrial (-40 to +85 C) temperature ranges available NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 Block Diagram Q0 ICLK Q1 Q2 Q3 Output Enable IDT / ICS 1 ICS553 REV M 121809

Pin Assignment VDD 1 8 OE Q0 2 7 Q3 Q1 3 6 Q2 GND 4 5 ICLK 8-pin SOIC Pin Descriptions Pin Number Pin Name Pin Type Pin Description 1 VDD Power Connect to +2.5 V, +3.3 V or +5.0 V. 2 Q0 Output Clock output 0. 3 Q1 Output Clock output 1. 4 GND Power Connect to ground. 5 ICLK Input Clock input, 5 V tolerant input. 6 Q2 Output Clock Output 2. 7 Q3 Output Clock Output 3. 8 OE Input Output Enable. Tri-states outputs when low. Connect to VDD for normal operation. External Components A minimum number of external components are required for proper operation. A decoupling capacitor of 0.01 µf should be connected between VDD on pin 1 and GND on pin 4, as close to the device as possible. A 33 Ω series terminating resistor may be used on each clock output if the trace is longer than 1 inch. To achieve the low output skew that the ICS553 is capable of, careful attention must be paid to board layout. Essentially, all four outputs must have identical terminations, identical loads and identical trace geometries. If they do not, the output skew will be degraded. For example, using a 30Ω series termination on one output (with 33Ω on the others) will cause at least 15 ps of skew. IDT / ICS 2 ICS553 REV M 121809

Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS553. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD Output Enable and All Outputs ICLK Ambient Operating Temperature (commercial) Ambient Operating Temperature (industrial) Storage Temperature Junction Temperature Soldering Temperature Rating 7 V -0.5 V to VDD+0.5 V -0.5 V to 5.5 V 0 to +70 C -40 to +85 C -65 to +150 C 125 C 260 C Recommended Operation Conditions Parameter Min. Typ. Max. Units Ambient Operating Temperature (commercial) 0 +70 C Ambient Operating Temperature (industrial) -40 +85 C Power Supply Voltage (measured in respect to GND) +2.375 +5.25 V DC Electrical Characteristics VDD=2.5 V ±5%, Ambient temperature -40 to +85 C, unless stated otherwise Operating Voltage VDD 2.375 2.625 V Input High Voltage, ICLK V IH Note 1 VDD/2+0.5 5.5 V Input Low Voltage, ICLK V IL Note 1 VDD/2-0.5 V Input High Voltage, OE V IH 1.8 VDD V Input Low Voltage, OE V IL 0.7 V Output High Voltage V OH I OH = -16 ma 2 V Output Low Voltage V OL I OL = 16 ma 0.4 V Operating Supply Current IDD No load, 135 MHz 25 ma Nominal Output Impedance Z O 20 Ω Input Capacitance C IN ICLK, OE pin 5 pf Short Circuit Current I OS ±28 ma IDT / ICS 3 ICS553 REV M 121809

DC Electrical Characteristics (continued) VDD=3.3 V ±5%, Ambient temperature -40 to +85 C, unless stated otherwise Operating Voltage VDD 3.15 3.45 V Input High Voltage, ICLK V IH Note 1 VDD/2+0.7 5.5 V Input Low Voltage, ICLK V IL Note 1 VDD/2-0.7 V Input High Voltage, OE V IH 2 VDD V Input Low Voltage, OE V IL 0.8 V Output High Voltage V OH I OH = -25 ma 2.4 V Output Low Voltage V OL I OL = 25 ma 0.4 V Output High Voltage (CMOS Level) V OH I OH = -12 ma VDD-0.4 V Operating Supply Current IDD No load, 135 MHz 35 ma Nominal Output Impedance Z O 20 Ω Input Capacitance C IN ICLK, OE pin 5 pf Short Circuit Current I OS ±50 ma VDD=5 V ±5%, Ambient temperature -40 to +85 C, unless stated otherwise Operating Voltage VDD 4.75 5.25 V Input High Voltage, ICLK V IH Note 1 VDD/2+1 5.5 V Input Low Voltage, ICLK V IL Note 1 VDD/2-1 V Input High Voltage, OE V IH 2 VDD V Input Low Voltage, OE V IL 0.8 V Output High Voltage V OH I OH = -35 ma 2.4 V Output Low Voltage V OL I OL = 35 ma 0.4 V Output High Voltage (CMOS Level) V OH I OH = -12 ma VDD-0.4 V Operating Supply Current IDD No load, 135 MHz 45 ma Nominal Output Impedance Z O 20 Ω Input Capacitance C IN ICLK, OE pin 5 pf Short Circuit Current I OS ±80 ma Notes: 1. Nominal switching threshold is VDD/2 IDT / ICS 4 ICS553 REV M 121809

AC Electrical Characteristics VDD = 2.5 V ±5%, Ambient Temperature -40 to +85 C, unless stated otherwise Input Frequency 0 200 MHz Output Rise Time t OR 0.8 to 2.0 V, C L =15 pf 1.0 1.5 ns Output Fall Time t OF 2.0 to 0.8 V, C L =15 pf 1.0 1.5 ns Propagation Delay Note 1 2.2 3 5 ns Additive Period Jitter 1 ps Output to Output Skew Note 2 Rising edges at VDD/2 0 50 ps Device to Device Skew Rising edges at VDD/2 500 ps VDD = 3.3 V ±5%, Ambient Temperature -40 to +85 C, unless stated otherwise Input Frequency 0 200 MHz Output Rise Time t OR 0.8 to 2.0 V, C L =15 pf 0.6 1.0 ns Output Fall Time t OF 2.0 to 0.8 V, C L =15 pf 0.6 1.0 ns Propagation Delay Note 1 2.0 2.4 4 ns Additive Period Jitter 1 ps Output to Output Skew Note 2 Rising edges at VDD/2 0 50 ps Device to Device Skew Rising edges at VDD/2 500 ps VDD = 5 V ±5%, Ambient Temperature -40 to +85 C, unless stated otherwise Input Frequency 0 200 MHz Output Rise Time t OR 0.8 to 2.0 V, C L =15 pf 0.3 0.7 ns Output Fall Time t OF 2.0 to 0.8 V, C L =15 pf 0.3 0.7 ns Propagation Delay Note 1 1.8 2.5 4 ns Additive Period Jitter 1 ps Output to Output Skew Note 2 Rising edges at VDD/2 0 50 ps Device to Device Skew Rising edges at VDD/2 500 ps Notes: 1. With rail to rail input clock 2. Between any 2 outputs with equal loading. 3. Duty cycle on outputs will match incoming clock duty cycle. Consult IDT for tight duty cycle clock generators. IDT / ICS 5 ICS553 REV M 121809

Thermal Characteristics Thermal Resistance Junction to θ JA Still air 150 C/W Ambient θ JA 1 m/s air flow 140 C/W θ JA 3 m/s air flow 120 C/W Thermal Resistance Junction to Case θ JC 40 C/W IDT / ICS 6 ICS553 REV M 121809

Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters Inches* 8 Symbol Min Max Min Max A 1.35 1.75.0532.0688 A1 0.10 0.25.0040.0098 B 0.33 0.51.013.020 INDEX AREA E H C 0.19 0.25.0075.0098 D 4.80 5.00.1890.1968 E 3.80 4.00.1497.1574 e 1.27 BASIC 0.050 BASIC 1 2 H 5.80 6.20.2284.2440 h 0.25 0.50.010.020 D L 0.40 1.27.016.050 α 0 8 0 8 A *For reference only. Controlling dimensions in mm. h x 45 A1 - C - C e Ordering Information B SEATING PLANE.10 (.004) C Part / Order Number Marking Shipping Packaging Package Temperature 553MLF 553MLF Tubes 8-pin SOIC 0 to +70 C 553MLFT 553MLF Tape and Reel 8-pin SOIC 0 to +70 C 553MI* 553MI Tubes 8-pin SOIC -40 to +85 C 553MIT* 553MI Tape and Reel 8-pin SOIC -40 to +85 C 553MILF 553MILF Tubes 8-pin SOIC -40 to +85 C 553MILFT 553MILF Tape and Reel 8-pin SOIC -40 to +85 C *NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. L IDT / ICS 7 ICS553 REV M 121809

Innovate with IDT and accelerate your future networks. Contact: www.idt.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 For Tech Support www.idt.com/go/clockhelp Corporate Headquarters Integrated Device Technology, Inc. www.idt.com 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA