THE Max-Planck-Institut Halbleiterlabor (HLL) has established

A New High-Speed, Single Photon Imaging CCD for the Optical Peter Holl, Robert Andritschke, Rouven Eckhardt, Robert Hartmann, Christian Koitsch, Gerhard Lutz, Norbert Meidinger, Rainer H. Richter, Gerhard Schaller, Heike Soltau, Lothar Strüder, George Vâlceanu Abstract We report on first measurements from test structures verifying a new design concept of a single photon imaging CCD for the optical. The results confirm the sensitivity of a novel avalanche diode to single electrons. Details of this structure which can be combined with a back illuminated sensor are described, measurement results include I-V curves, dark rate and temperature dependency. In addition an avalanche diode with MOSFET readout will be presented as well as an ultra low noise pnccd which is process compatible. The successful testing of these components proves the feasibility to produce a backilluminated single photon sensitive CCD with high frame rates and high sensitivity in a wide wavelength range. paper deals with the goal of a single photon imaging CCD. Its targeted applications include focal plane instrumentation for High Time Resolution Astrophysics (HTRA) and wave front sensing for Adaptive Optics (AO). The obvious advantage is the significantly improved quantum efficiency (taking into account all effects we expect up to 80 %). It should also be noted that the avalanche probability which is a function of the wavelength in front illuminated devices is constant and always maximal for back illumination, since every signal charge passes the same length of the high-field region. I. Introduction THE Max-Planck-Institut Halbleiterlabor (HLL) has established a double sided silicon technology and produces devices with outstanding performance with respect to quantum efficiency, speed, spectroscopic resolution and radiation hardness. Among these devices are drift detectors, active pixel sensors and pnccds like the 6 cm 6 cm imager aboard the X- ray satellite XMM-Newton[1]. The high quantum efficiency is a direct result of the double sided processing allowing back illumination and full depletion. Thus the entrance window is a completely homogeneous pn-junction free of any obstructing layers with a 100% fill factor. For optical applications it can be optimized for an application specific wave length range to achieve quantum efficiencies close to 100%. CCD image and frame store area Avalanche amplifiers MOSFET amplifiers Bondwires A new development has started at the HLL combining back illuminated devices with an avalanche readout to detect single optical photons. This research aims in two directions, one being Silicon-Photo-Multiplier type devices with good time and moderate position resolution primarily for the use in astroparticle experiments like the Major Atmospheric Gamma Imaging Cherenkov telescope (MAGIC [2]). This Cross section in Fig. 2 Multiplexing ASIC Amplifier (CAMEX) Output Manuscript received November 27, 2006. Peter Holl (pxh@hll.mpg.de, corresponding author), Rouven Eckhardt, Robert Hartmann, Christian Koitsch, Gerhard Lutz and Heike Soltau are with PNSensor GmbH, Römerstraße 28, D 80803 München Robert Andritschke, Norbert Meidinger, Gerhard Schaller, Lothar Strüder and George Vâlceanu are with Max-Planck-Institut für extraterrestrische Physik, Giessenbachstraße, D 85748 Garching Rainer H. Richter is with Max-Planck-Institut für Physik, Föhringer Ring 6, D 80805 München All authors are members of the MPI Halbleiterlabor, Otto-Hahn- Ring 6, D 81739 München, Germany Figure 1: Schematic view (not to scale) of a pnccd with avalanche cells in the readout chain. Figure 1 shows the concept of such an avalanche-readout pnccd. It has an image store and a frame store area of typically 256 256 pixels each as well as a column-wise parallel read-out. The avalanche diode is connected to an on-chip MOSFET. This additional amplification allows to work with a moderate avalanche voltage to avoid optical crosstalk. Since the charge multiplication statistics of the avalanche process does not allow to distinguish the signals generated by one or

Φ 3 Φ 2 Φ 3 ~3µm pnccd - - buried channel E 0 A R Q (on-chip) 8 µm high field region avalanche cell p-channel MOSFET G S D Figure 2: Cross section (not to scale) through a pnccd with the last transfer registers (three phases), the avalanche cell and readout MOS- FET. The quenching resistor R Q is also realized on-chip by a poly-silicon structure. The light shield might cover part of the pixel area if it is used as a frame store. Entrance window Back contact/light shield a few photo-electrons, the device is optimized for fast readout (at least 1000 frames per second) to avoid signal pileup. Intensity measurement is achieved by counting how often a pixel has shown a signal above a given threshold. It is not possible and not foreseen to distinguish whether one or more photons have hit a pixel. Thus the occurrence of single photon events must be verified by evaluating pixel patterns. Two or more neighboring pixel showing a signal are an indication that this condition is not fulfilled anymore. In this case the photon rate would be so high that the CCD could be switched to a different operating mode, using longer integration time and nonmultiplicative but proportional amplification. Figure 2 shows a cross section of the readout region. In the CCD pixel area each signal electron is transferred within a buried channel in a depth of about 3 µm by a three phase register structure. After the last register they arrive at the avalanche diode and are collected in the high field region. The connection to the gate of a MOSFET in source follower configuration is also shown. In the following we will analyze the key components of this device. We report results from a new pnccd in Chapter II. Although it still uses conventional JFET readout, its design has been optimized for ultra low noise performance, smaller pixels and compatibility with an avalanche readout. Chapter III summarizes the properties of the entrance window of back illuminated devices and the resulting quantum efficiency. First results from avalanche diodes are listed in chapter IV. They were obtained from test-structures of a prove-of-principle production. A complete read-out chain consisting of an avalanche cell with a MOSFET is presented and in chapter V. II. Ultra low noise pnccd The changes to adapt the existing pnccd design to an avalanche readout are defined by design compatibility, maximum possible reduction of bulk leakage current and general requirements for optical applications. We have recently included an experimental CCD in a regular production of X- ray CCDs for the erosita mission and tested new aspects as far as possible within the given design and fabrication rules. One was the reduction of the pixel dimension in transfer direction to 36 µm (so far 51 µm 51 µm was the smallest pixel size ever realized for pnccds). This was achieved by introducing polysilicon layers in the registers. The lateral dimension defining the width of a pixel column was kept at 51 µm to allow coupling with the existing readout electronics. A reduction also in that dimension will easily be possible with the new avalanche readout which can be realized much smaller due to the implementation of a MOSFET (the X-ray CCDs use circular on-chip JFETs with a diameter of 48 µm). Figure 3 shows an X-ray spectrum obtained with that CCD and proves the full functioning of the device. Operating temperature was -64ºC (209 K), an 55 Fe radioactive source was used for flat field exposure. The overall (i.e. using all patterns involving up to 6 pixels) energy resolution was 134.8 ev FWHM for the Mn K a peak with a charge transfer efficiency (CTE) of 99.9996 %. An important consequence of the smaller pixels besides an improved geometrical resolution is the possibility to decrease the depth of the buried channel. Currently signal electrons are stored and transferred in a depth of 7 µm. For the coupling of the CCD to an avalanche readout this will be reduced to about 3 µm. Registers with a 12 µm pitch will still create a sufficient electric field for the fast transfer of charges in this shallower channel. The design variation of the 36 µm CCD also significantly reduces the bulk leakage current. A comparison is shown in Figure 4 between that new type and a conventional CCD with 75 µm 75 µm pixels from the same batch. The data were obtained by operating these two CCDs at various relatively high temperatures, and deriving the leakage current from the noise with the simplified formula 2 2 1 1 Ileakage = ( enc( T ) -enc0 ) A t where enc(t) is the average equivalent noise charge of each pixel, measured as a function of the temperature. Its value was determined from the offset fluctuations of empty pixels and calibrated with X-ray photons. The term enc 0 approximately accounts for the noise contributions not induced by leakage current, i.e. from the on-chip JFET and the CAMEX multiplexing readout amplifier. It was set to pixel cycle q

C11_S12_37_060518_05 1600 Total counts: 281781 Multi-hits: 23 36488 60915 169759 12700 1896 threshold: 4 σ 1400 CTE correction: 0.999996 Cluster size: [1, 6] 1200 1000 800 600 400 200 K α escape peak @ 4.154 kev Mn K α @ 5.894 kev Mn K β @ 6.490 kev 0 4000 4500 5000 5500 6000 6500 7000 Figure 3: Spectrum obtained with an 55 Fe source by flat field exposure of all 128 256 CCD-pixels with about 10 counts/frame, 57.8 ms cycle time, 209.2 K operating temperature. Due to the small pixels only split event exist i.e. charges are collected in more than one pixel. The majority of events (60 %) were shared among four pixels. A software pattern recognition and reconstruction was applied. Despite the fact that the noise increases with the square root of the number of pixels in an event cluster, the FWHM of the Mn K a line is still only 134.8 ev. 10000 1000 100 10 1 0.1 I [pa/cm 2 ] classical CCD I [pa/cm 2 ] new type I [pa/cm 2 ] 1000 100 10 1 III. Entrance Window and Quantum Efficiency The entrance window of back illuminated devices is formed by a shallow pn-junction. It is completely uniform without any obstructing layers. The effective dead-layer is only about few nanometer and enhances the response to short optical wavelengths while sensitivity is maximized up to the near infrared by the fully depleted and sensitive bulk. Depending on a specific scientific application the entrance window can be further tailored. A thin aluminum layer can operate as a light shield for observations in X-ray astronomy. The choice of implantation parameters can increase radiation hardness. An Anti Reflective Coating (ARC) can optimize response to optical photons. All above measures are part of the HLL silicon technology and use the techniques of the detector fabrication without further impact on the general performance of the device. They are undergoing a continuous improvement, moreover, a physical model has been developed which can predict with high precision the behavior of a particular entrance window configuration [5,6]. Figure 5a shows that the measured internal quantum efficiency in the range from 150 nm to 1000 nm is above 95 %. Figure 5b shows the quantum efficiency for four different ARC configurations taking into account all effects (reflections on the surface, absorption in insensitive layers and transparency for longer wavelengths). One has been chosen for extreme blue enhancement (as e.g. needed for Cherenkov light detection of air showers from cosmic rays). The others have peak sensitivity at 420 nm, 600 nm and 740 nm. The photon detection efficiency P d of an avalanche CCD can be calculated by P d = QE CTE(y) P a where QE is the quantum efficiency of the CCD taking into 0.01 Temperature [K] 0.001 180 200 220 240 260 280 300 Figure 4: Leakage current comparison. Blue diamonds: calculated current densities from an erosita type CCD with classical design; magenta squares: from the novel 36 µm CCD. The two values at 23ºC within a green frame were measured by a picoamperemeter applying full depletion voltage at the entrance window diode. The erosita CCD has a 256 512 pixels. enc 0 = 1.9 electrons which corresponds to the value remaining constant at temperatures below -64ºC. A pixel is the pixel area (36 µm 51 µm and 75 µm 75 µm respectively) and t cycle is the cycle time of the readout, i.e. the sum of the image integration and the readout time. Finally q is the elementary charge. Figure 4 shows for the new CCD type a significant reduction of the leakage current by about a factor of ten. This is underestimated since the simple model above does not take into account the increase of enc 0 with temperature which affects more the measurements of the lower leakage currents. The values are also consistent with static I-V measurements done at room temperature with a picoamperemeter. Figure 5a: Internal quantum efficiency in the wavelength range from 150 nm to 1000 nm. Below 300 nm a quantum yield above unity is achieved, i.e. more than one electron-hole pair is generated per incident photon. The drop beyond 950 nm is due to the beginning transparency of silicon in the infrared. The detector thickness for these measurements was 300 µm (from [5]).

readout anode high voltage supply high electric field (direction for electrons) avalanche region interconnect region Figure 5b: Measured and calculated quantum efficiencies in the optical and NIR region for different kinds of anti-reflective-coatings [6]. The diamonds represent measurements of a detector, whose sensitivity was optimized for a detection of the sodium line at 580 nm, while the squares represent a device with a maximum quantum efficiency in the red and near infrared. Using the same model but adjusting the layer stack of the coating, detectors with optimized quantum efficiencies at shorter wavelengths might be build as well (dark and light blue lines). symmetry axis (cylindrical) electron trajectories Figure 6: Generic avalanche cell created by the technology simulator DIOS. The buried p-region (blue) is moderated in its depth to confine the high field to a small area below the anode (red). The part shown extends to a depth of about 6 µm into the silicon bulk (green). Electron trajectories apply only for the final device which is depleted from the back surface. An implanted quench resistor is connected to the anode (not shown). account all effects fill factor, reflectivity and absorption of the image area. It can be extracted from the characteristics in Figure 5b. The term CTE(y) (Charge Transfer Efficiency) is the probability that a signal charge reaches the readout system. It is a function of the pixel coordinate y, which corresponds to the number of transfers within the pixel structure. P a is the probability that the signal after avalanche multiplication is above the detection threshold. Since the charge transfer inefficiency is typically 4 10-6 or smaller CTE(y) is between 99.90 % and 99.79 % after 256 and 512 transfers respectively. P a is the least known term, yet it can dominate the value of photon detection efficiency. If we assume a conservative value of 80 % the photon detection efficiency P d of the avalanche CCD will be between 72 % and 80 % peak sensitivity. IV. Avalanche diode A test-production of a new avalanche diode structure was completed in summer 2006 and is currently being evaluated. The production is aimed for the proof-of-principle of a novel topology to create the high field region, which is compatible with back illumination [7,8,9]. For the sake of a fast turnaround only a single sided processing was carried out. The basic structure to be studied is shown in Figure 6. A circular high-field region is created between a shallow n + anode implant and a deep p-type implant. This deep p-implant (corresponding to the E 0 electrode in Figure 2) has a depth profile to limit the area where avalanche breakdown shall occur. This avalanche region is kept small (typically 10 µm in diameter) to minimize the capacitance and make the device more robust against production inhomogeneities. 1.00E-05 9.00E-06 8.00E-06 7.00E-06 6.00E-06 5.00E-06 4.00E-06 3.00E-06 2.00E-06 1.00E-06 Highfield region Highfield region+extra implant Interconnect region Interconnect+extra implant 0.00E+00 0 10 20 30 40 50 60 70 80 1.00E-05 1.00E-06 1.00E-07 1.00E-08 1.00E-09 1.00E-10 1.00E-11 Highfield region Highfield region+extra implant Interconnect region Interconnect+extra implant 1.00E-12 0 10 20 30 40 50 60 70 80 Figure 7: I-V characteristics (linear upper, logarithmic lower) of 1 mm 2 test diodes with four different implants. The current was limited by a 1 MΩ series resistor.

Breakdown characteristics was mainly studied by I-V measurements of 1 mm2 test diodes. Figure 7 shows the results from four structures differing in the depth of the deep p-implant and the presence and absence of an additional shallower n-implant. Two important results can be derived from this measurements. 1) There is more than 20 V difference before breakdown occurs in the interconnect region, i.e. the confinement of the avalanche region can be fully controlled. 2) A statistical evaluation of the breakdown voltages over many such measurements shows that sufficient homogeneity was achieved. The breakdown voltage fluctuations of test diodes of the same type about 6 mm apart was 20 mv rms, while it was 100 mv rms over the full 150 mm wafer diameter. Dark rate measurements show that the observed current increase is indeed caused by avalanche multiplication. From the measurement in Figure 8 we can derive that the current increases by a factor of two with every temperature increase of about 7.3 K which corresponds to the expected value. Also the current calculated from the dark count rate is compatible with the I-V measurements of test diodes. Cathode (R0) Anode Source Avalanche Diode Drain Ring 1 Gate 12 µm Figure 9: Layout plot overlaid by a photo-micrograph of an avalanche diode connected to an n-channel MOSFET. The effective diameter of the avalanche diode is 10 µm. The anode contact is biased via an integrated 4 MΩ resistor outside this viewing area. 100kHz Dark Rate 10kHz 1kHz 100Hz 10Hz 0 25 50 75 100 125 150 175 200 225 250 275 Figure 8: Dark rate as function of the output signal amplitude for various temperatures. A 36 µm diameter avalanche cell was read out Figure 10: The ID-VDS characteristics of the depletion type NMOS. v. avalanche diode with n-channel mosfet readout voltage VTH is about -15.8 V for VDP= -50 V applied at the NMOS p-well. The current-voltage characteristics is shown in Figure 10. The second part of the avalanche amplifier test structure is an n-channel depletion type MOSFET transistor. Two heavily doped n-type regions, Source (S) and Drain (D), are implanted in a deep p-well, situated close to the avalanche photo diode (APD) p-well. The aluminum deposited on top of a thin oxide layer forms the Gate (G) of the transistor which is connected directly to the anode (A) of the APD, see Figure 9. The transistor is a depletion type NMOSFET meaning that a shallow n-channel is implanted under the gate and therefore current flows between drain and source also at VGS = 0 V. A negative voltage, smaller then the threshold voltage VTH, must be applied between gate and source to completely deplete the channel of its charge carriers. For this transistor the threshold The transistor is configured as a source follower using an external load resistor RL of 250 kω (the condition RL >> 1/gm is satisfied). The output signal read at the Source is amplified using an external electronics board with an AMPTEK A250 preamplifier (Figure 11). This board consists of two amplifying stages with a total amplification of about 14. A single electron signal read with an oscilloscope after the amplifier board is shown in figure 12. It has 400 ns rise and 2.5 µs fall time. For -16 V applied between gate and source the only current flowing between drain and source is a leakage current of about 20 pa. The transconductance gm, defined as the derivative of the drain current over gate voltage, has a value of 20 µs for VDS= 10 V.

V A(V G)=-10V R Q V D=10V D SCOPE V R0 A G V DP=-50V S AMP A250 MCA PC R L V =-20V CC Figure 11: A schematic of the avalanche amplifier and the readout stage. VI. Summary The suggested concept of a high-speed, single photon imaging CCD for optical photons appears feasible after all critical components have been analyzed. A prototype production has been started and will include full featured devices. Single photon counting capabilities with SiPM structures which use the same avalanche building cell has meanwhile been demonstrated [10]. Figure 12: The signal read after the amplifier board (AMP) for APD bias at -37.2 V. Capacitive loads and coupling of the source follower output to the AMPTEK A250 preamplifier on the amplifier board (AMP) are responsible for the slow signal rise time. Acknowledgment The authors like to thank Jelena Ninkovic, Adrian Niculae and Nepomuk Otte for their valuable help with the experimental setup to measure the avalanche test structures, and Johannes Treis and Danilo Mießner for their skillful wafer cutting and chip mounting. References [1] L. Strüder et al., The European Photon Imaging Camera in XMM Newton: The pn-ccd camera, A&A 365, L18-L26 (2001). [2] MAGIC collaboration home page: http://magic.mppmu.mpg.de [3] N. Meidinger et al., First measurements with DUO/ROSITA pnccds, Proc. SPIE 5898, pp.58980w-1 W-9, 2005. [4] W. Buttler et al., Evolution in the criteria that underlie the design of a monolithic preamplifier system for microstrip detectors, Nucl. Instr. & Meth. A, Vol. 288, p. 140, 1997. [5] R. Hartmann et al., Results of a fast pnccd Detector System, Proc. SPIE 5903, pp. N1-N9, 2005. [6] R. Hartmann et al., The Quantum Efficiency of pn-detectors in the Spectral Range between 1 nm and 1000 nm, Nucl. Instr. & Meth. A, Vol. 439, pp. 216 220, 2000. [7] G. Lutz et al., The Avalanche Drift Diode: A New Detector Concept for Single Photon Detection, IEEE TNS 52, pp. 1156 1459 (2005). [8] G. Lutz et al., Development of Avalanche-Drift and Avalanche Pixel Detectors for Single Photon Detection and Imaging in the Optical Regime, Nucl. Instr. & Meth. A, Vol. 567, pp.129 132, 2006. [9] G. Lutz, R.H. Richter, L. Strüder, Avalanche Strahlungsdetektor, German Patent DE102004022948B4 (2006). [10] C. Merck et al., Avalanche Drift Diode A Novel Detector for Single Photon Counting, contribution N42-3 at IEEE-NSS 2006, this conference record.